uart.c

samsung 最新芯片2450 的测试程序.

			else 
			{
				*pUartRxStr[ch] = NULL;			    	printf("\n");				
				isRxDone[ch] = 1;		
				rINTSUBMSK |= (BIT_UART_RXD<<SUBINTOFFSET);							
			}					
		}		
	}		
	if(g_bIsLevelInt)		rSUBSRCPND = (BIT_UART_ERROR<<SUBINTOFFSET)|(BIT_UART_TXD<<SUBINTOFFSET)|(BIT_UART_RXD<<SUBINTOFFSET);				
	ClearPending(BIT_UART);	
}

#endif

//ARM disables IFQ in CPSR  When it enters ISR, There is no need to masking SUBMASK or MASK registers
void __irq UartIsr0(void)
{
	UartSubIsr(0);
}

void __irq UartIsr1(void)
{
	UartSubIsr(1);
}

void __irq UartIsr2(void)
{
	UartSubIsr(2);
}

void __irq UartIsr3(void)
{
	UartSubIsr(3);
}

//txmode 2 : tx 0,  3 : tx1
//rxmode 2 : rx 0, 3 : rx1
void __irq DmaIsr(void) // only one for test
{
	unsigned char ch;
	volatile unsigned int i;
	
	if (rSUBSRCPND&BIT_SUB_DMA0)//0
	{	
		rDMASKTRIG0=0;	// Stop Dma0		
		ch = ((rDMAREQSEL0>>1) -19)/2;
		
		if(g_pUartConTx->cTxMode == 2) isTxDone[ch] = 1;
		if(g_pUartConRx->cRxMode == 2) isRxDone[ch] = 1;
		
		//end of dma
		rINTSUBMSK |= (BIT_SUB_DMA0);		
		rSUBSRCPND = BIT_SUB_DMA0;
		ClearPending(BIT_DMA);
	}

	if (rSUBSRCPND&BIT_SUB_DMA1)//1
	{	
		rDMASKTRIG1=0;	// Stop Dma1
		
		ch = ((rDMAREQSEL1>>1) -19)/2;
		
		if(g_pUartConTx->cTxMode == 3) isTxDone[ch] = 1;
		if(g_pUartConRx->cRxMode == 3) isRxDone[ch] = 1;
		
		//end of dma
		rINTSUBMSK |= BIT_SUB_DMA1;
		rSUBSRCPND = BIT_SUB_DMA1;
		ClearPending(BIT_DMA);	
	}

}






//////////////////////////////////////////////////////
//
//    Custom Functions for test
//
///////////////////////////////////////////////////////

void __irq UART_TxFifotestINTIsr(void)
{
	unsigned char fifocnt;
	bool bufferempty;

	 fifocnt = (g_pUartRegsTx->rUfStat>>8) & 0x3f;
	 bufferempty = (g_pUartRegsTx->rUtrStat>>1) & 0x1;
	
	if(  !g_bLeveltypeTx )	rSUBSRCPND = (BIT_UART_TXD<<SUBINTOFFSETDUPLEX0);		//pulse type

	printf("tx isr:%d  cnt:%d  bufferempty%d\n",fifocnt, g_UART_TXdatacnt, bufferempty);
	
	if (g_FifoEnableTx) TxFifoSubISR(g_UART_portTx);// 1 : fifo enable (fifo mode)
	else TxNonFifoSubISR(g_UART_portTx);// 0 : fifo disable (non fifo mode)
	
		
	if(  g_bLeveltypeTx  )	rSUBSRCPND = (BIT_UART_TXD<<SUBINTOFFSETDUPLEX0);//level type	
	
	ClearPending(BIT_UART_DUPLEX0);
}



bool UART_TxFifotestINT(unsigned char ch)
{	
	switch(ch)
	{
		case 0: pISR_UART0 = (unsigned)UART_TxFifotestINTIsr; break;
		case 1: pISR_UART1 = (unsigned)UART_TxFifotestINTIsr; break;
		case 2: pISR_UART2 = (unsigned)UART_TxFifotestINTIsr; break;
		case 3: pISR_UART3 = (unsigned)UART_TxFifotestINTIsr;	 break;
	}
	
	rINTSUBMSK &= ~(BIT_UART_TXD << SUBINTOFFSETDUPLEX0);								
	rINTMSK &= ~(BIT_UART_DUPLEX0);	
	//tx will be started
	
	//for pulse mode
	g_pUartRegsTx->rUCon= (g_pUartRegsTx->rUCon&~0xc ) ;
	g_pUartRegsTx->rUCon|= 0x4 ;
	
	//, interrupt
	//interrupt will be occur.
	while(!isTxDone[ch])
	{
		
	}
		
	rINTMSK |= (BIT_UART_DUPLEX0);
	rINTSUBMSK |= (BIT_UART_TXD<<SUBINTOFFSETDUPLEX0);	
	
	return 1;
}










void __irq UART_RxFifotestINTIsr()
{
	volatile unsigned int uSubSrcPnd= rSUBSRCPND;		

//	printf("source pend%x\n", rSRCPND);
	
	// receive Errors ISR
	if (uSubSrcPnd & (BIT_UART_ERROR<< SUBINTOFFSETDUPLEX1))
	{	
		rSUBSRCPND = (BIT_UART_ERROR<<SUBINTOFFSETDUPLEX1);		
		printf("error %x\n", g_pUartRegsRx->rUerStat);		
	}
	// Rx ISR		
	if (uSubSrcPnd & (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1))
	{	
		 unsigned char fifocnt =  g_pUartRegsRx->rUfStat & 0x3f;

		if(   !g_bLeveltypeRx )	rSUBSRCPND = (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1);//pulse type

		if (g_FifoEnableRx) RxFifoSubISR(g_UART_portRx);// 1 : fifo enable (fifo mode) 
		else 			RxNonFifoSubISR(g_UART_portRx);// 0 : fifo disable(non fifo mode)

		printf("current rx  fifocnt : :%d  updated datacnt:%d\n",fifocnt, (pUartRxStr[g_UART_portRx]-g_pRxString));
		
		if(  g_bLeveltypeRx )	rSUBSRCPND = (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1);//level type
	}
	ClearPending(BIT_UART_DUPLEX1);	
}

void __irq UART_RxFifoNothing0()
{
	printf("uart 0 ISR\n");
}

void __irq UART_RxFifoNothing1()
{
	printf("uart 1 ISR\n");
}
void __irq UART_RxFifoNothing2()
{
	printf("uart 2 ISR\n");
}
void __irq UART_RxFifoNothing3()
{
	printf("uart 3 ISR\n");
}


bool UART_RxFifotestINT(unsigned char Txch, unsigned char Rxch)
{	
	pISR_UART0 = (Rxch==0)?(unsigned)UART_RxFifotestINTIsr : (unsigned)UART_RxFifoNothing0;
	pISR_UART1 = (Rxch==1)?(unsigned)UART_RxFifotestINTIsr : (unsigned)UART_RxFifoNothing1;
	pISR_UART2 = (Rxch==2)?(unsigned)UART_RxFifotestINTIsr : (unsigned)UART_RxFifoNothing2;
	pISR_UART3 = (Rxch==3)?(unsigned)UART_RxFifotestINTIsr : (unsigned)UART_RxFifoNothing3;
	
	rINTSUBMSK &= ~((BIT_UART_RXD << SUBINTOFFSETDUPLEX1)|(BIT_UART_ERROR << SUBINTOFFSETDUPLEX1) );
	rINTMSK &= ~(BIT_UART_DUPLEX1);	
	//tx will be started
	printf("press 0 to send tx by manual\n");
	//, interrupt
	//interrupt will be occur.
	while(!isRxDone[Rxch])
	{
		//if(pUartRegs->rUtrStat &0x4) {
		if( g_pUartRegsTx->rUtrStat &0x2 ) {
		
			if(g_UART_TXdatacnt<120)
			{
				g_pUartRegsTx->rUtxh = *pUartTxStr[Txch];
				
				g_UART_TXdatacnt ++;
				//if(g_UART_TXdatacnt > g_UART_TXdatasize) break;							
				pUartTxStr[Txch]++;				
			}
			else
			if(Uart_GetKey()=='0')
			{
				g_pUartRegsTx->rUtxh = *pUartTxStr[Txch];
				
				g_UART_TXdatacnt ++;
				//if(g_UART_TXdatacnt > g_UART_TXdatasize) break;							
				pUartTxStr[Txch]++;				
			}
		}
	}
		
	rINTMSK |= (BIT_UART_DUPLEX1);
	rINTSUBMSK |= (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1) | (BIT_UART_ERROR << SUBINTOFFSETDUPLEX1);	
	return 1;
}


void __irq UART_RxFifotestINTTimeoutIsr()
{
	unsigned char fifocnt;
	volatile unsigned int uSubSrcPnd= rSUBSRCPND;		

	//printf("source pend%x\n", rSRCPND);
	
	// receive Errors ISR
//	if (uSubSrcPnd & (BIT_UART_ERROR<< SUBINTOFFSET))
//	{	
//		rSUBSRCPND = (BIT_UART_ERROR<<SUBINTOFFSET);		
//		printf("error %x\n", pUartRegs->rUerStat);		
//	}
	// Rx ISR		
	if (uSubSrcPnd & (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1))
	{	
		 fifocnt = g_pUartRegsRx->rUfStat & 0x3f;

		//pulse type
		if(   !g_bLeveltypeRx )	rSUBSRCPND = (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1);		

		//fifo mode
		//if(g_UART_RXdatacnt >= 0 )//fifo trigger 1
		if(g_UART_RXdatacnt >= g_RxTrigNum )//fifo trigger 8,16,32		
		{
				//Delay(700); //70ms to check delay func,. : ok
			rGPHDAT = (rGPHDAT & (1<<14) )? 0x355f: 0x755f;//high->low, low->high				

		}

//		if(g_UART_RXdatacnt < g_RxTrigNum )//for monitoring continous timeout condition
		if(1)//to monitor once of timeout condition, see clear pending is ok.
		{
			while (g_pUartRegsRx->rUfStat & 0x3f) //until rx fifo count 0			
			{
				*pUartRxStr[g_UART_portRx]++ = (unsigned char)(g_pUartRegsRx->rUrxh);	
				g_UART_RXdatacnt++;
			}				
			
			//delay until pending is clear after 1 uart baudrate , in case level interrupt.
			if(g_UART_RXdatacnt > g_RxTrigNum )
			{
			// baudrate 9.09ms, if 110bps, %16 clock 568us
				//no delay - pending one more				
				//Delay(10); //1ms - not ok. 
				//Delay(20); //2ms - ok
				//Delay(40); //4ms ok
				//Delay(60); //6ms ok
				//Delay(70); //7ms ok.
				//Delay(90); //9ms ok.
				//Delay(6); - pending one more
				
			// if 20bps, %16 clock 3.125ms, baudrate 50ms
				//Delay(31); //3.1ms not ok.
				//Delay(32); //3.2ms ok. 
				//Delay(60); //6ms ok.
				//Delay(300); //30ms ok
			}
		}
		else
		{
			if (g_pUartRegsRx->rUfStat & 0x3f) //just read one byte for test
			{
				*pUartRxStr[g_UART_portRx]++ = (unsigned char)(g_pUartRegsRx->rUrxh);	
				g_UART_RXdatacnt++;
			}	
			
		}

		printf("current rx fifocnt : :%d  updated datacnt:%d\n",fifocnt, g_UART_RXdatacnt);		
		
		//level type		
		if(  g_bLeveltypeRx )	rSUBSRCPND = (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1);			
	}
	ClearPending(BIT_UART_DUPLEX1);	
}




void __irq UART_RxFifotestINTTimeoutIsrShort()
{
	if(g_UART_RXdatacnt >= g_RxTrigNum ) 	rGPHDAT = (rGPHDAT & (1<<14) )? 0x355f: 0x755f;//high->low, low->high				

	while (g_pUartRegsRx->rUfStat & 0x3f) //until rx fifo count 0			
	{
		*pUartRxStr[g_UART_portRx]++ = (unsigned char)(g_pUartRegsRx->rUrxh);	
		g_UART_RXdatacnt++;
		
		//if(g_UART_RXdatacnt > g_RxTrigNum ) Delay(1);//5.4us, 100us min. => ok.
	}
	rSUBSRCPND = (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1);//level type
	ClearPending(BIT_UART_DUPLEX1);	
}


bool UART_RxFifotestTimeoutINT(unsigned char Txch, unsigned char Rxch)
{	

	//pISR_UART0 = (Rxch==0)?(unsigned)UART_RxFifotestINTTimeoutIsrShort : (unsigned)UART_RxFifoNothing0;//11520
	pISR_UART0 = (Rxch==0)?(unsigned)UART_RxFifotestINTTimeoutIsr : (unsigned)UART_RxFifoNothing0;//110,20
	pISR_UART1 = (Rxch==1)?(unsigned)UART_RxFifotestINTTimeoutIsr : (unsigned)UART_RxFifoNothing1;
	pISR_UART2 = (Rxch==2)?(unsigned)UART_RxFifotestINTTimeoutIsr : (unsigned)UART_RxFifoNothing2;
	pISR_UART3 = (Rxch==3)?(unsigned)UART_RxFifotestINTTimeoutIsr : (unsigned)UART_RxFifoNothing3;

	//Delay(0);//calibrate

	rGPHCON = (rGPHCON & ~(3<<28) ) | (1<<28);//out(clockout1 tp 5)
	rGPHUDP = rGPHUDP  & ~(0x3<<28)|(0x0<<28);//pullup/down disable
	rGPHDAT = (rGPHDAT & ~(1<<14) ) | (0<<14);//init-low
	//rGPHDAT = 0x355f;low 
	
	
	//Delay(10000); // 1000ms
	//rGPHDAT = (rGPHDAT & (1<<14) )? 0x355f: 0x755f;//high->low, low->high	
	//rGPHDAT = (rGPHDAT & (1<<14) )? 0x355f: 0x755f;//high->low, low->high	

	rINTSUBMSK &= ~((BIT_UART_RXD << SUBINTOFFSETDUPLEX1)|(BIT_UART_ERROR << SUBINTOFFSETDUPLEX1) );
	rINTMSK &= ~(BIT_UART_DUPLEX1);	
	//tx will be started
	printf("press x to quit, 1 to send one more data\n");
	//, interrupt
	//interrupt will be occur.
	while(!isRxDone[Rxch])
	{
		//if(pUartRegs->rUtrStat &0x4) {
		if( g_pUartRegsTx->rUtrStat &0x2 ) {
		
			if(g_UART_TXdatacnt<g_RxTrigNum)
			{
				g_pUartRegsTx->rUtxh = *pUartTxStr[Txch];
				
				g_UART_TXdatacnt ++;
				pUartTxStr[Txch]++;
				
			}
			//else if(g_UART_TXdatacnt == g_RxTrigNum )//fifo trigger 1
			else if(g_UART_TXdatacnt < (g_RxTrigNum+4 ) )//fifo trigger 8,16,32
			{
				g_pUartRegsTx->rUtxh = *pUartTxStr[Txch];
			
				g_UART_TXdatacnt ++;
				pUartTxStr[Txch]++;

				//if(g_UART_TXdatacnt == (g_RxTrigNum+1) )//fifo trigger 1
				if(g_UART_TXdatacnt == (g_RxTrigNum+4) )//fifo trigger 8,16,32
				rGPHDAT = (rGPHDAT & (1<<14) )? 0x355f: 0x755f;//high->low, low->high				
				
				
			}
			else if(Uart_GetKey()=='x')
			{
				isRxDone[Rxch] = 1;
				rINTSUBMSK |= (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1);
			}
			else if(Uart_GetKey()=='1')
			{
				g_pUartRegsTx->rUtxh = *pUartTxStr[Txch];				
				g_UART_TXdatacnt ++;
				pUartTxStr[Txch]++;
				rGPHDAT = (rGPHDAT & (1<<14) )? 0x355f: 0x755f;//high->low, low->high
			}
		}		
	}
		
	rINTMSK |= (BIT_UART_DUPLEX1);
	rINTSUBMSK |= (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1) | (BIT_UART_ERROR << SUBINTOFFSETDUPLEX1);	
	
	return 1;
}

bool UART_gpiotest(unsigned char Txch, unsigned char Rxch)
{
	int i;

	for(i=0; i<11; i++)
	{
		rGPHCON	&= ~((0xf<<12)|(0xf<<8)|(0xf<<4)|(0xf<<0));
		Delay(1);//1 is 100us. => 0.1ms -> 10000bps.
		rGPHCON	|=  ((0xa<<12)|(0xa<<8)|(0xa<<4)|(0xa<<0));
		Delay(1*9);//1 is 100us. => .1ms -> 10000bps.		
		
	//	rGPHCON = (rGPHCON & ~0xffff ) | 0xaaaa;



		printf("UCON0:%x, UCON1:%x, UON2:%x, UCON3:%x\n",		rUCON0, rUCON1, rUCON2, rUCON3);
		printf("UFSTAT0:%x, UFSTAT1:%x, UFSTAT2:%x, UFSTAT3:%x\n",rUFSTAT0,rUFSTAT1,rUFSTAT2,rUFSTAT3);		
	}
}