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📄 uart.c

📁 samsung 最新芯片2450 的测试程序.
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				pUartTxStr[ch]++;
			}
		}

		if(isRxDone[ch])
		{

			if(pUartRegs->rUtrStat&0x1) 
			{
				*pUartRxStr[ch] = (unsigned char)(pUartRegs->rUrxh) ;
				if(*pUartRxStr[ch] == '\r') 	isRxDone[ch] = 0;				
				pUartRxStr[ch]++;
			}
		}
	}


	//rx
	pUartRxStr[ch] =(char *)(UART_BUF+0x200000);
		
	while(1) 
	{
		printf("%c",*pUartRxStr[ch]);
		if(*pUartRxStr[ch] == '\r')
			break;
		
		pUartRxStr[ch]++;
	}
		


	printf("TX done\n");
	
	UartClose(ch, UART_DUPLEX0);
	SetDbgUart(1); // change channel setting for debug port set

}


//////////////////////////////////////////////////////////////////////////////////////////////////////////
//    TX / RX  Set, Start, test Routine
// 

//////////////////////////////////////////////////////////////////////////////////////////
// Set
void TxStringSet(unsigned char Txch, char *Txstr)
{
	g_pUartConTx = &UartCon[Txch];	
	isTxDone[Txch] = 0;
	pUartTxStr[Txch] = Txstr;
	g_UART_TXdatacnt = 0;
	g_cntfivepercentTX=g_UART_TXdatasize/20;
	g_cntfivepercentTX=(!g_cntfivepercentTX)?1:g_cntfivepercentTX;

	g_pUartRegsTx = ( UART_REGS *)(UART_REG_BASE+UART_REG_OFFSET*Txch);	
	g_TxTrigNum =   ( (g_pUartRegsTx->rUfCon & 0xc0)==0xc0 )? 48 : 
				   ( (g_pUartRegsTx->rUfCon & 0xc0)==0x80 )? 32 :
				   ( (g_pUartRegsTx->rUfCon & 0xc0)==0x40 )? 16 : 0;	
	g_FifoEnableTx = g_pUartRegsTx->rUfCon & 1;	
	g_bLeveltypeTx =  ( g_pUartRegsTx->rUCon >>9) & 0x1;
}

void RxStringSet(unsigned char Rxch, char *Rxstr)
{
	g_pUartConRx = &UartCon[Rxch];
	isRxDone[Rxch] = 0;
	pUartRxStr[Rxch] = ( char *)Rxstr;	
	g_UART_RXdatacnt =0;
	g_cntfivepercentRX=g_UART_RXdatasize/20;
	g_cntfivepercentRX=(!g_cntfivepercentRX)?1:g_cntfivepercentRX;	

	g_pUartRegsRx = ( UART_REGS *)(UART_REG_BASE+UART_REG_OFFSET*Rxch);
	g_RxTrigNum = ( (g_pUartRegsRx->rUfCon & 0x30)==0x30 )? 32 : 
			   ( (g_pUartRegsRx->rUfCon & 0x30)==0x20 )? 16 :
			   ( (g_pUartRegsRx->rUfCon & 0x30)==0x10 )? 8 : 1;		
	g_FifoEnableRx = g_pUartRegsRx->rUfCon & 1;
	g_bLeveltypeRx = ( g_pUartRegsRx->rUCon >>8) & 0x1; 
}


////////////////////////////////////////////////////////////////////////////////////////
//  TX Polling 
void TxStringTestPolling(unsigned char ch, int bytesize)
{	
	if (g_FifoEnableTx)// fifo enable (fifo mode)
	{
		while(!isTxDone[ch])
		{			
			while (  ( (g_pUartRegsTx->rUfStat>>8) & 0x3f)  >  g_TxTrigNum) ;//wait during tx fifo data over the tx fifo trigger level			
			TxFifoSub(ch);
		}
	}
	else//non fifo mode
	{ 
		while(!isTxDone[ch])
		{
			TxNonFifoSub(ch);	
		}
	}
}

////////////////////////////////////////////////////////////////////////////////////////
//  TX Interrupt
void TxStringStartINT(unsigned char ch)
{	
	if(ch == 1){	SUBINTOFFSETDUPLEX0 = 3;	SRCPNDOFFSETDUPLEX0 = 23;}
	else if(ch == 2){	SUBINTOFFSETDUPLEX0 = 6;		SRCPNDOFFSETDUPLEX0 = 15;}
	else if(ch == 3){	SUBINTOFFSETDUPLEX0 = 24;	SRCPNDOFFSETDUPLEX0 = 18;}
	else {	SUBINTOFFSETDUPLEX0 = 0;	SRCPNDOFFSETDUPLEX0 = 28;}// CH 0 default		

	rSUBSRCPND |= (BIT_UART_TXD << SUBINTOFFSETDUPLEX0);				
	ClearPending(BIT_UART_DUPLEX0);
	StartStopwatchExtendStart(0);
}

void TxStringTestINT(unsigned ch)
{	
	rINTSUBMSK &= ~(BIT_UART_TXD << SUBINTOFFSETDUPLEX0);								
	rINTMSK &= ~(BIT_UART_DUPLEX0);	
	//tx will be started
	
	//for pulse mode
	g_pUartRegsTx->rUCon= (g_pUartRegsTx->rUCon&~0xc ) ;
	g_pUartRegsTx->rUCon|= 0x4 ;	
	
	//, interrupt
	while(!isTxDone[ch])
	{
		;
	};	
		
	rINTMSK |= (BIT_UART_DUPLEX0);
	rINTSUBMSK |= (BIT_UART_TXD<<SUBINTOFFSETDUPLEX0);	
}

////////////////////////////////////////////////////////////////////////////////////////
//  TX DMA
//can be selectable with burst, hand, demans, single.
void TxStringSetDMA(unsigned char ch, char * str, unsigned char cTxMode)
{
	int multiple;
	uDMA *pDMA;
	int iDmaNumber= cTxMode-2;
	unsigned char cDmaTxDMD_HS = g_pUartConTx->cDmaRxDMD_HS;
	unsigned char cDmaTxTSZ = g_pUartConTx->cDmaRxTSZ;

	pDMA = ( !iDmaNumber )?(void *)&rDISRC0 : (void *)&rDISRC1;
	
	g_UART_TXdatasize = (g_UART_TXdatasize>0xfffff)?0xfffff:g_UART_TXdatasize;
	
	if(g_TxTrigNum>0)
	{
		printf( " tx requested size : %d\n", g_UART_TXdatasize);
		multiple= g_UART_TXdatasize %g_TxTrigNum;
		if(multiple!=0)
		g_UART_TXdatasize = g_UART_TXdatasize - multiple + g_TxTrigNum;
		printf( " tx fifo trigger level : %d   adjusted size : %d\n", g_TxTrigNum, g_UART_TXdatasize);
	}

	pDMA->DISRC = (unsigned int)str;	// Start address
	pDMA->DISRCC = (0<<1)|(0);		// AHB,Increment
	pDMA->DIDST = (unsigned int)(&g_pUartRegsTx->rUtxh); 	// Memory buffer Address
	pDMA->DIDSTC = (1<<1)|(1);		// APB,Fixed
	pDMA->DCON = (cDmaTxDMD_HS<<31)|(0<<30)|(1<<29)|(cDmaTxTSZ<<28)|(0<<27)|(1<<22)|(0<<20)| g_UART_TXdatasize;
	//handshake, sync PCLK, TC int, single tx, single service,auto-reload off, Byte size Tx, Tx count value
	if(!iDmaNumber)	pDMA->DMAREQSEL = ((19+ch*2)<<1)|1;//0
	else 			pDMA->DMAREQSEL = ((20+ch*2)<<1)|1;//1

}


void TxStringStartDMA(unsigned char cTxMode)
{	
	int iDmaNumber = cTxMode-2;
	
	// Clear Int Pending and Unmask    		
	rSUBSRCPND = (!iDmaNumber)?(BIT_SUB_DMA0):(BIT_SUB_DMA1);
	ClearPending(BIT_DMA);	
	StartStopwatchExtendStart(0);
}


void TxStringTestDMA(unsigned ch, unsigned char cTxMode)
{	
	uDMA *pDMA;
	int iDmaNumber = cTxMode-2;
	int i=0;
	pDMA = ( !iDmaNumber )?(void *)&rDISRC0 : (void *)&rDISRC1;

	rINTSUBMSK &= (!iDmaNumber)? ~(BIT_SUB_DMA0) : ~(BIT_SUB_DMA1);
	rINTMSK &= ~(BIT_DMA);	
	pDMA->DMASKTRIG = (0<<2)|(1<<1)|(0);    //no-stop, DMA0 channel on, no-SW trigger 	
	//tx will be started	

	while(!isTxDone[ch])
	{
		 if( i++%0x200000==0) putchar('#');				 
	};	
	//rINTMSK |= (BIT_DMA);
	rINTSUBMSK |= (!iDmaNumber)?(BIT_SUB_DMA0) : (BIT_SUB_DMA0);
}



////////////////////////////////////////////////////////////////////////////////////////
//  RX Polling 
//g_UART_RXdatacnt should be 0
void RxStringTestPolling(unsigned char ch)
{	
	int i=0;
	
	//rx fifo reset done at initialize uart(firmware code)
	
	
	if (g_FifoEnableRx)// fifo enable (fifo mode)
	{
		while(!isRxDone[ch])
		{			
			i=0;
			while (  (g_pUartRegsRx->rUfStat & 0x3f)  <  g_RxTrigNum)//wait during rx fifo data less the rx fifo trigger level				
			{
				//rx timeout emulate in polling mode
				if(  (g_pUartRegsRx->rUfStat & 0x3f) > 0 ) 
				{
					i++;
					if(i>21000000) break;//for min baudrate 1000, for max cpu speed 1000Mhz, for 3 word 
					//for 3*7/1000 sec ,   1sec / 1000 000 000 i++
				}
			};
				
			RxFifoSub(ch);
		}
	}
	else//non fifo mode
	{ 
		while(!isRxDone[ch])
			RxNonFifoSub(ch);
	}
}

////////////////////////////////////////////////////////////////////////////////////////
//  RX Interrupt

void RxStringStartINT(unsigned char ch)
{	

	if(ch == 1){	SUBINTOFFSETDUPLEX1 = 3;	SRCPNDOFFSETDUPLEX1 = 23;}
	else if(ch == 2){	SUBINTOFFSETDUPLEX1 = 6;		SRCPNDOFFSETDUPLEX1 = 15;}
	else if(ch == 3){	SUBINTOFFSETDUPLEX1 = 24;	SRCPNDOFFSETDUPLEX1 = 18;}
	else {	SUBINTOFFSETDUPLEX1 = 0;	SRCPNDOFFSETDUPLEX1 = 28;}// CH 0 default		
		
	rSUBSRCPND |= (BIT_UART_RXD << SUBINTOFFSETDUPLEX1)  | (BIT_UART_ERROR << SUBINTOFFSETDUPLEX1);
	//rSUBSRCPND |= (BIT_UART_TXD << SUBINTOFFSETDUPLEX1);
	ClearPending(BIT_UART_DUPLEX1);
}

void RxStringTestINT(unsigned ch)
{	
	//rx fifo reset done at initialize uart(firmware code)

	rINTSUBMSK &= ~((BIT_UART_RXD << SUBINTOFFSETDUPLEX1)|(BIT_UART_ERROR << SUBINTOFFSETDUPLEX1) );
	rINTMSK &= ~(BIT_UART_DUPLEX1);	
	//Rx will be started
	
	//for pulse mode
	g_pUartRegsRx->rUCon= (g_pUartRegsRx->rUCon&~0x3 ) ;
	g_pUartRegsRx->rUCon|= 0x1 ;
	
	
	//, interrupt
	while(!isRxDone[ch])
	{
		;
	};	
		
	rINTMSK |= (BIT_UART_DUPLEX1);
	rINTSUBMSK |= (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1) | (BIT_UART_ERROR << SUBINTOFFSETDUPLEX1) ;	
}

////////////////////////////////////////////////////////////////////////////////////////
//  RX DMA
//pUartRegs->rUrxh, ,pUartCon->cRxTrig, pUartCon->cDmaRxDMD_HS, pUartCon->cDmaRxTSZ
void RxStringSetDMA(unsigned char ch, char * str)
{
	uDMA *pDMA;
	int iDmaNumber= g_pUartConRx->cRxMode-2;
	unsigned char cDmaRxDMD_HS = g_pUartConRx->cDmaRxDMD_HS;
	unsigned char cDmaRxTSZ = g_pUartConRx->cDmaRxTSZ;
	
	pDMA = ( !iDmaNumber )?(void *)&rDISRC0 : (void *)&rDISRC1;
	
	g_UART_RXdatasize = (g_UART_RXdatasize>0xfffff)?0xfffff:g_UART_RXdatasize;	
	printf( " rx requested size(adjusted) : %d\n", g_UART_RXdatasize);
	g_UART_RXdatasize = (cDmaRxTSZ == 1)? g_UART_RXdatasize/4 : g_UART_RXdatasize;
			
	printf("\nIn DMA rxstring mode");	
	pDMA->DISRC=(unsigned int)(&g_pUartRegsRx->rUrxh);	// Start address
	pDMA->DISRCC=(1<<1)|(1);		// APB,Fixed
	pDMA->DIDST=(unsigned int)str;
	pDMA->DIDSTC= (0<<1)|(0);		// AHB,Increment
	pDMA->DCON=(cDmaRxDMD_HS<<31)|(0<<30)|(1<<29)|(cDmaRxTSZ<<28)|(0<<27)|(1<<22)|(0<<20)| g_UART_RXdatasize;
	//handshake, sync PCLK, TC int, single rx, single service,auto-reload off, Byte size Rx, Rx count value
	if(iDmaNumber==2)	pDMA->DMAREQSEL = ((19+ch*2)<<1)|1;//0
	else 				pDMA->DMAREQSEL = ((20+ch*2)<<1)|1;//1

}
void RxStringStartDMA(unsigned char cRxMode)
{	
	int iDmaNumber = cRxMode-2;
	
	// Clear Int Pending and Unmask    		
	rSUBSRCPND = (!iDmaNumber)?(BIT_SUB_DMA0):(BIT_SUB_DMA1);
	ClearPending(BIT_DMA);	
}


void RxStringTestDMA(unsigned ch, unsigned char cRxMode)
{
	uDMA *pDMA;
	int iDmaNumber = cRxMode-2;
	int i=0;
	pDMA = ( !iDmaNumber )?(void *)&rDISRC0 : (void *)&rDISRC1;

	//rx fifo reset done at initialize uart(firmware code)

	rINTSUBMSK &= (!iDmaNumber)? ~(BIT_SUB_DMA0) : ~(BIT_SUB_DMA1);
	rINTMSK &= ~(BIT_DMA);	
	pDMA->DMASKTRIG = (0<<2)|(1<<1)|(0);    //no-stop, DMA0 channel on, no-SW trigger 	
	//rx will be started	

	while(!isRxDone[ch])
	{
		i++;
		 if( i%0x2000000==0) putchar('#');				 
	};	
	//rINTMSK |= (BIT_DMA);
	rINTSUBMSK |= (!iDmaNumber)?(BIT_SUB_DMA0) : (BIT_SUB_DMA0);	
	
}


////////////////////////////////////////////////////////////////////////////////////////
//  TX & RX Polling
void TxRxStringTestPolling(unsigned char Txch, unsigned char Rxch)
{	
	int j=0;
	while( ! (isTxDone[Txch] && isRxDone[Rxch] ) )
	{



		if(!isTxDone[Txch])
		{
			if (g_FifoEnableTx)// fifo enable (fifo mode)
			{
				while (  ( (g_pUartRegsTx->rUfStat>>8) & 0x3f)  >  g_TxTrigNum) ;//wait during tx fifo data over the tx fifo trigger level			
				TxFifoSub(Txch);
			}
			else TxNonFifoSub(Txch);	//non fifo mode
		}
		
		if(!isRxDone[Rxch])
		{
			if (g_FifoEnableRx)// fifo enable (fifo mode)
			{
				int i=0;
				while (  (g_pUartRegsRx->rUfStat & 0x3f)  <  g_RxTrigNum)//wait during rx fifo data less the rx fifo trigger level				
				{
					//rx timeout emulate in polling mode
					if(  (g_pUartRegsRx->rUfStat & 0x3f) > 0 ) 
					{
						i++;
						if(i>21000000) break;//for min baudrate 1000, for max cpu speed 1000Mhz, for 3 word 
						//for 3*7/1000 sec ,   1sec / 1000 000 000 i++
					}
				};						
				RxFifoSub(Rxch);
			}
			else	RxNonFifoSub(Rxch);//non fifo mode			
		}		
		//if(g_UART_TXdatacnt%261244==1) putchar('T');
		//if(g_UART_RXdatacnt%cntfivepercent==1) putchar('R');
		
		if(isTxDone[Txch])
		{
			j++;
			if(j>21000000) break;
		}
	}
}

////////////////////////////////////////////////////////////////////////////////////////
//  TX & RX Interrupt
void TxRxStringTestINT(unsigned Txch, unsigned Rxch)
{	
	int j=0;

	rINTSUBMSK &= ~((BIT_UART_RXD << SUBINTOFFSETDUPLEX1)|(BIT_UART_ERROR << SUBINTOFFSETDUPLEX1) );
	rINTMSK &= ~(BIT_UART_DUPLEX1);	//Rx will be started	
	rINTSUBMSK &= ~(BIT_UART_TXD << SUBINTOFFSETDUPLEX0);	
	rINTMSK &= ~(BIT_UART_DUPLEX0);	//tx will be started
	
	//for pulse mode
	g_pUartRegsTx->rUCon= (g_pUartRegsTx->rUCon&~0xc ) ;
	g_pUartRegsTx->rUCon|= 0x4 ;		
	
	// interrupt
	while( ! (isTxDone[Txch] && isRxDone[Rxch] ) )
	{
		if(isTxDone[Txch])
		{
			j++;
			if(j>21000000) break;
		}		 
	};	
	
	rINTMSK |= (BIT_UART_DUPLEX0);	
	rINTSUBMSK |= (BIT_UART_TXD<<SUBINTOFFSETDUPLEX0);	
	
	rINTMSK |= (BIT_UART_DUPLEX1);
	rINTSUBMSK |= (BIT_UART_RXD<<SUBINTOFFSETDUPLEX1) | (BIT_UART_ERROR << SUBINTOFFSETDUPLEX1) ;
}

	
		
	
	



//////////////////////////////////////////////////////////////////////////////////////////////////////////
//    TX / RX, TX&RX  Main Routine
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