📄 drv_serial.h
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/****************************************************************************
** $Header: /project/cs/wl_gshdsl/feature/csif_sh8/sbus/inc/Serial.h,v 1.1.1.12 2004/12/21 05:04:42 mayun Exp $
**
** Copyright (c) 1999, UTStarcom, Inc.
** All Rights Reserved.
**
** Subsystem : CSIFSH8 Board Firmware
** File : serial.h
** Created By : Ma Yun
** Created On : 07/22/2004
**
** Purpose:
** This file provides function defines that communicate with SCM
**
****************************************************************************/
#ifndef __SERIAL__H
#define __SERIAL__H
#include "common.h"
#define IO_COMM_CTL (1<<6) /* P6, output low to enable USART0, output high to disable USART0 */
#define DNLD_BOARD_TYPE 0xde /* the download type, all boards are same */
#define DNLD_VER_TYPE 0x47 /* the download ver type, PCSI is 0x47, ACSI is 0x34 */
#define APP_BOARD_TYPE 0xd7 /* the application type */
#define BOARD_TYPE_INFO 0x47 /* the board type information, PCSI is 0x47, ACSI is 0x34 */
#define NULL 0
#define ACK 0xfa
#define NACK 0xf1
#define FAST_BLINK 40
#define NORMAL_BLINK 100
#define ALIVE_BLINK 500
/* boot loader running for download application */
/* Single byte cmd definition */
#define DL_INQ_MSG 0x01
#define CMD_DL_INQ 0x10
/* Multi bytes cmd msg code */
#define MUTI_BYTE_MSG 0x00
/*length offset = length - dl_cmd - brd_type - seq -addr(16bits)*/
#define DATA_LEN_OFFSET 0x05
#define DL_INQ_RES 0xD1 /*response for 0x10*/
#define DL_INQ_NRES 0x00 /* in fact, this message won't be send since the PCSI don't receive the inquiry */
#define DL_ACK 0xD2 /*response for DL_CMD*/
#define DL_NACK 0xF1
#define CMD_DLD_CMD 0xf0
#define CMD_DLD_END 0xf1
/* application running */
/* Single byte cmd definition */
#define LINE_SYNC_MSG 0x02
#define PORT_ACT_MSG 0x04
#define RECFG_PORT_MSG 0x05
#define BOARD_TEST_MSG 0x09
#define QUERY_INFO_MSG 0x0f
/* Two bytes cmd msg code definition */
#define CHAN_CNTL_MSG 0x0a
#define HWY_ASGN_MSG 0x0b
#define U_LOOPBACK_MSG 0x0c
#define BOARD_RST_MSG 0x0d
/* Multi bytes cmd msg code */
#define RMT_PWR_CMD 0x05
#define DATA_CALL_CMD 0x0a
#define CMD_TURN_OFF_ALL_LED 0x01
#define CMD_SYSTEM_TEST 0x02
#define CMD_ENABLE_HWY 0x03
#define CMD_EXIT_DIAG 0x04
#define CMD_TURN_ON_ALL_LED 0x09
#define CMD_GET_SELF_RES 0x0a
#define CMD_DISABLE_HWY 0x0b
#define CMD_ENTER_DIAG 0x0c
#define CMD_GET_BOARD_INFO 0x03
#define CMD_GET_VERSION_INFO 0x04
#define CMD_GET_MODE_INFO 0x06
#define CMD_GET_POWER_INFO 0x07
#define CMD_U_LPBK_B1 0x80
#define CMD_U_LPBK_B2 0x40
#define CMD_U_LPBK_2B_D 0x20
#define CMD_U_LPBK_TRANS 0x10
#define CMD_IDL2_LPBK_B1 0x08
#define CMD_IDL2_LPBK_B2 0x04
#define CMD_IDL2_LPBK_2B_D 0x02
#define CMD_IDL2_LPBK_TRANS 0x01
#define CMD_LPBK_EXIT 0x00
#define PORT_STATUS_MASK 0x08
#define PORT_NUM_MASK 0x07
#define CMD_MASK 0x0f
/* SBUS serial port operation function*/
#define release_bus AT91F_PIO_SetOutput( AT91C_BASE_PIO, IO_COMM_CTL );
#define seize_bus AT91F_PIO_ClearOutput( AT91C_BASE_PIO, IO_COMM_CTL );
#define enable_rcv AT91F_US_EnableIt(USART_COMM_BASE, AT91F_US_GetIt(USART_COMM_BASE) |AT91C_US_RXRDY)
#define disable_rcv AT91F_US_DisableIt(USART_COMM_BASE, (~(AT91F_US_GetIt(USART_COMM_BASE))) |AT91C_US_RXRDY)
#define enable_tx {AT91F_US_EnableIt(USART_COMM_BASE, AT91F_US_GetIt(USART_COMM_BASE) |AT91C_US_TXEMPTY);tx_enable=1;}
#define disable_tx {AT91F_US_DisableIt(USART_COMM_BASE, (~(AT91F_US_GetIt(USART_COMM_BASE))) |AT91C_US_TXEMPTY);tx_enable=0;}
#define enable_pare AT91F_US_EnableIt(USART_COMM_BASE, AT91F_US_GetIt(USART_COMM_BASE) |AT91C_US_PARE)
#define disable_pare AT91F_US_DisableIt(USART_COMM_BASE, (~(AT91F_US_GetIt(USART_COMM_BASE))) |AT91C_US_PARE)
/* serial receive and transmit buffer MACROs */
#define XMT_BUF 255 /* Max length of one packet */
#define XMT_QUE 16
#define XMT_ROUND ((XMT_QUE*(XMT_BUF+1))-1)
#define RCV_BUF 255 /* Max length of one packet */
#define RCV_QUE 16
#define RCV_ROUND ((RCV_QUE*(RCV_BUF+1))-1)
#define BUF_LENGTH (XMT_QUE*(XMT_BUF+1))+(RCV_QUE*(RCV_BUF+1))
#define reset_xmt_ptr(x) {x &=(~XMT_BUF);}
#define inc_xmt_ptr(x) {x &=(~XMT_BUF); x +=(XMT_BUF+1); x &= XMT_ROUND; x +=(RCV_QUE*(RCV_BUF+1));}
#define init_xmt_ptr(x) {x =(RCV_QUE*(RCV_BUF+1));}
#define inc_rcv_ptr(x) {x &=(~RCV_BUF); x +=(RCV_BUF+1); x &= RCV_ROUND; ;}
#define reset_rcv_ptr(x) {x &=(~RCV_BUF);}
#define init_rcv_ptr(x) {x = 0;}
/* local MACROs */
enum serial_state{
STATE_IDLE, /* state0,idle state, waiting for RB8=1 */
STATE_RCV_SLOT, /* state1,waiting for the second slot address */
STATE_RCV_LENGTH, /* state2,Second Slot received, waiting for the length field */
STATE_RCV_DATA, /* state3,length received, receiving data bytes */
STATE_RCV_1STCHECK, /* state4,data received, waiting for first checksum byte */
STATE_RCV_2NDCHECK, /* state5,waiting for second checksum byte */
STATE_XMT_BOARD, /* state7,send board type to master when there is no data to be sentin response to length=0xff command */
STATE_XMT_1STBOARD, /* state13,send board type in response to length=0xff command */
STATE_XMT_2NDBOARD, /* state7,send board type complement to master */
STATE_XMT_SLOT, /* state8,send slot number to master */
STATE_XMT_MSG, /* state9,state10,state11,state12,state14,send message bytes to master */
STATE_XMT_NACK, /* state7,send NACK to master to request retransmission */
STATE_WAIT_ACK /* state6,waiting for ACK from master after data packet sent to master */
};
/* FW download */
enum fw_state{
DWNL_IDLE, /*DWNL IDLE*/
DWNL_INQUIRY, /*After Inquiry*/
DWNL_CMD /*DWNL FW data*/
};
extern void serial_init (void);
extern void serial_receive_process_boot(void);
extern void serial_receive_process_ap(void);
extern UINT8 dispatch_to_serial(UINT8 length, UINT8 *ptr);
extern void serial_process_unknown_cmd (UINT8 cmd,UINT8 length, UINT8 *ptr);
#ifdef DEBUG
extern INT8 *byte2hexstr(UINT8 value);
extern INT8 *byte2decstr(UINT8 value);
#endif
#endif
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