driver.c

这是某个项目中使用的ARM7TDMI平台上ucos系统的bootloader

{
    INT8 ret = ERROR;
    UINT8 buf = (UINT8)act_area;
    UINT16 addr = 0;

    switch (sw_type)
    {
        case AP_PRG:
            addr = ACT_AP_PRG_ADDR;
            break;
        case FPGA_PRG:
            addr = ACT_FPGA_PRG_ADDR;
            break;
        default:
            return ERROR;
            break;
    }
    e2prom_disable_wp(CTL_BOARD);
    ret = e2prom_write_block(CTL_BOARD, addr, 1, &buf);
    e2prom_enable_wp(CTL_BOARD);
    if (OK!= ret)
        return ERROR;
    
    return OK;

}

/*******************************************************************************
**
** FUNCTION NAME: hal_nvm_get_act_prog
**
** Description:
** get system's active program area 
**
** Argument             Type        I/O           Description
** -------------  ----------------  ---  ---------------------------------------
** sw_type        sw_type_e          I   appoint solftware type
** act_area       nvm_area_e *       O   return active program area No.
**
** Return Value:  INT8                   OK: get success
**                                       ERROR:  get fail
**
*******************************************************************************/
INT8 hal_sng_get_act_prog(sw_type_e sw_type, nvm_area_e *act_area)
{
    INT8 ret = ERROR;
    UINT8 buf;
    UINT16 addr = 0;

    switch (sw_type)
    {
        case AP_PRG:
            addr = ACT_AP_PRG_ADDR;
            break;
        case FPGA_PRG:
            addr = ACT_FPGA_PRG_ADDR;
            break;
        default:
            return ERROR;
            break;
    }
    ret = e2prom_read_block(CTL_BOARD, addr, 1, &buf);
    if (OK!= ret)
        return ERROR;

    switch (buf)
    {
        case PRG_AREA_1:
        case PRG_AREA_2:
            break;
        default:
            buf = (UINT8)PRG_AREA_1;
            break;
    }

    *act_area = (nvm_area_e)buf;
    return OK;
}

/*******************************************************************************
**
** FUNCTION NAME: hal_sng_get_prog_size
**
** Description:
** get system's program data length 
**
** Argument             Type        I/O           Description
** -------------  ----------------  ---  ---------------------------------------
** sw_type        sw_type_e          I   appoint solftware type
** act_area       nvm_area_e         I   appoint program area No.
** size           UINT32             O   return the program size
**
** Return Value:  INT8                   OK: get success
**                                       ERROR:  get fail
**
*******************************************************************************/
INT8 hal_sng_get_prog_size(sw_type_e sw_type, nvm_area_e area, UINT32 *size)
{
    INT8 ret = ERROR;
    UINT8 buf[PRG_HEAD_MAX_LEN];
    UINT32 addr = 0;

    switch (area)
    {
        case PRG_AREA_1:
            addr = PRG1_HEAD_ADDR;
            break;
        case PRG_AREA_2:
            addr = PRG2_HEAD_ADDR;
            break;
        default:
            return ERROR;
            break;
    }
    ret = pflash_read_block(addr, PRG_HEAD_MAX_LEN/2, (UINT16*)&buf[0]);
    if (OK!= ret)
        return ERROR;

    switch (sw_type)
    {
        case AP_PRG:
            addr = APP_LEN_OFFSET;
            break;
        case FPGA_PRG:
            addr = FPGA_LEN_OFFSET;
            break;
        default:
            return ERROR;
            break;
    }

    *size = *((UINT32*)&buf[addr]);
    return OK;
}

/*******************************************************************************
**
** FUNCTION NAME: hal_sng_get_prog_addr
**
** Description:
** get system's program data start address 
**
** Argument             Type        I/O           Description
** -------------  ----------------  ---  ---------------------------------------
** sw_type        sw_type_e          I   appoint solftware type
** act_area       nvm_area_e         I   appoint program area No.
** addr           UINT32             O   return the program address
**
** Return Value:  INT8                   OK: get success
**                                       ERROR:  get fail
**
*******************************************************************************/
INT8 hal_sng_get_prog_addr(sw_type_e sw_type, nvm_area_e area, UINT32 *addr)
{
    INT8 ret = ERROR;
    UINT8 buf[PRG_HEAD_MAX_LEN];
    UINT32 tmpaddr = 0;
    
    switch (area)
    {
        case PRG_AREA_1:
            tmpaddr = PRG1_HEAD_ADDR;
            break;
        case PRG_AREA_2:
            tmpaddr = PRG2_HEAD_ADDR;
            break;
        default:
            return ERROR;
            break;
    }
    ret = pflash_read_block(tmpaddr, PRG_HEAD_MAX_LEN/2, (UINT16*)&buf[0]);
    if (OK!= ret)
        return ERROR;

    switch (sw_type)
    {
        case FPGA_PRG:
            *addr = tmpaddr + *((UINT32*)&buf[FPGA_STA_ADD_OFFSET]);
            break;
        case AP_PRG:
            *addr = tmpaddr
                      + *((UINT32*)&buf[FPGA_STA_ADD_OFFSET]) 
                      + *((UINT32*)&buf[FPGA_LEN_OFFSET]);
            break;
        default:
            return ERROR;
            break;
    }
    return OK;
}

/*******************************************************************************
**
** FUNCTION NAME: hal_sng_check_prog_sum
**
** Description:
** check program data's checksum
**
** Argument             Type        I/O           Description
** -------------  ----------------  ---  ---------------------------------------
** sw_type        sw_type_e          I   appoint solftware type
** act_area       nvm_area_e         I   appoint program area No.
**
** Return Value:  INT8                   OK: checksum check success
**                                       ERROR:  checksum check fail
**
*******************************************************************************/
INT8 hal_sng_check_prog_sum(sw_type_e sw_type, nvm_area_e area)
{
    UINT32 crc,tmp_crc = 0;
    INT8 ret = ERROR;
    UINT8 buf[PRG_HEAD_MAX_LEN];
    UINT32 tmpaddr = 0;
    UINT32 check_len;

    switch (area)
    {
        case PRG_AREA_1:
            tmpaddr = PRG1_HEAD_ADDR;
            break;
        case PRG_AREA_2:
            tmpaddr = PRG2_HEAD_ADDR;
            break;
        default:
            return ERROR;
            break;
    }
    ret = pflash_read_block(tmpaddr, PRG_HEAD_MAX_LEN/2, (UINT16*)&buf[0]);
    if (OK!= ret)
        return ERROR;

    crc = *((UINT32*)&buf[CRC_OFFSET]);
    tmpaddr = tmpaddr + CRC_START_OFFSET;
    check_len = PRG_HEAD_MAX_LEN - CRC_START_OFFSET + *((UINT32*)&buf[FPGA_LEN_OFFSET]) + *((UINT32*)&buf[APP_LEN_OFFSET]);
    if (check_len > EXT_PRG_MAX_LEN)
        return ERROR;

    memcpy((void*)PRG_CHECK_BASE, (void*)tmpaddr, check_len);
    ret = boot_crc_gen(PRG_CHECK_BASE, check_len, &tmp_crc);
    memset((void*)PRG_CHECK_BASE, 0, check_len);
    if (OK != ret)
        return ERROR;

    return (crc == tmp_crc? OK: ERROR);
}

/*******************************************************************************
**
** FUNCTION NAME: hal_sng_is_coldboot
**
** Description:
** judge if system boot type is cold boot
**
** Argument             Type        I/O           Description
** -------------  ----------------  ---  ---------------------------------------
** NONE
**
** Return Value:  INT8                   OK: cold boot
**                                       ERROR:  not cold boot
**
*******************************************************************************/
#define FPGA_REG_BASE		0x00580000
#define FPGA_TIMEOUT		1000
#define FPGA_TEST_REG		0x04	/* FPGA test register */
INT8 hal_sng_is_coldboot(void)
{
	UINT8 *reg_addr;
	UINT32 i = 0;
	UINT32 j = 0;
	
	reg_addr = (UINT8 *)(FPGA_REG_BASE + FPGA_TEST_REG);	
	*reg_addr = 0x55;	
	
	while ( i < FPGA_TIMEOUT )
	{
		for (j = 0; j < 8; j++);   /* delay */
		
		if ( 0xAA == *reg_addr )
			break;

		i++;	
	}

	if ( i < FPGA_TIMEOUT )
	{
		return ( OK );
	}
	else
	{
		return ( ERROR );
	}
}

/* file end */