📄 ac97.c

📁 ARM嵌入式系统关于LCDC控制器问题基于c语言实验代码
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		}
	}
	
	Util_DelayUs(1);
	if (XsDmaControlRegsP->DCSR[channel] & 0x08)
	{
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		PrintfUartDef("dma stops: [DDADR]0x%x\n", DDADR);
	}
	if (XsAc97CtrlRegsP->POSR & 0x00000010)
	{
		//XsDmaControlRegsP->DCSR[channel] &= 0x7FFFFFFF;	// RUN = 0
		//while (!(XsDmaControlRegsP->DCSR[channel] & 0x08))	DM_WaitUs(1);
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
		DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
		DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
		tmp = XsDmaControlRegsP->DCSR[channel];
		PrintfUartDef("fifo error:\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
	}
	goto restart;
}



//Line In Loopback

UINT32 initac97audiocodec_lineinloopback()
{
	UINT32 status;
	
	// disable loopback mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_GPR, 0);
	if (status)	return status;

	// SL[10:8] 100=Line In L; SR[2:0] 100=Line In R
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_RSR, UCB_RSR_SR_LINE | UCB_RSR_SL_LINE);
	if (status)	return status;

	//set record gain
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_RGR, 0x0707);
	if (status)	return status;

	//enable Variable Rate Audio mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_EASCR, UCB_EAIDR_VRA);
	if (status)	return status;

	//48 kHz
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_ADR, UCB_DR_48000);
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_AAR, UCB_DR_48000);
	if (status)	return status;

	//set volume: bit13~8 - ML; bit5~0 - MR
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_MVR, 0x303); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_HVR, 0x303); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_MNVR, 0x303); 
	if (status)	return status;
	
	//Mute PCM out
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_POUTVR, 0x8303); 
	if (status)	return status;

	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_LINVR, 0x0303); 
	if (status)	return status;

	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_ACMCR,  ACMCR_DDM); 
	if (status)	return status;
	// enable loopback mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_GPR, GPR_LPBK);
	if (status)	return status;
	return status;
}


void LineInLoopback(void)
{
	UINT32 DDADR, DSADR, DTADR, DCMD, tmp;
	XsDmaDescriptorGroupT * pdesc;
	
	StopDMAALL();
    
    PrintfUartDef("Line In Loopback!\r\n");
	
	
	PrintfUartDef("     To init AC97 codec\r\n");
	initac97audiocodec_lineinloopback();
	return;
	while (1);
	
	// The below code is for debug
restart:
	XsAc97CtrlRegsP->POSR |= 0x00000010;
	tmp = XsDmaControlRegsP->DCSR[channel];
	tmp = XsDmaControlRegsP->DCSR[channel] & 0x08;
	if (tmp)
	{
		startdma(channel);
		while (XsDmaControlRegsP->DCSR[channel] & 0x08)
		{
			DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
			DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
			DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
			DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
			PrintfUartDef("dma not run\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
		}
	}
	
	Util_DelayUs(1);
	if (XsDmaControlRegsP->DCSR[channel] & 0x08)
	{
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		PrintfUartDef("dma stops: [DDADR]0x%x\n", DDADR);
	}
	if (XsAc97CtrlRegsP->POSR & 0x00000010)
	{
		//XsDmaControlRegsP->DCSR[channel] &= 0x7FFFFFFF;	// RUN = 0
		//while (!(XsDmaControlRegsP->DCSR[channel] & 0x08))	DM_WaitUs(1);
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
		DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
		DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
		tmp = XsDmaControlRegsP->DCSR[channel];
		PrintfUartDef("fifo error:\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
	}
	goto restart;
}

//Line In DMA Loopback
UINT32 initac97audiocodec_lineindmaloopback() 
{
	UINT32 status;
	
	// disable loopback mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_GPR, 0);
	if (status)	return status;

	// SL[10:8] 100=Line In L; SR[2:0] 100=Line In R
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_RSR, UCB_RSR_SR_LINE | UCB_RSR_SL_LINE);
	if (status)	return status;
	
	//set record gain
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_RGR, 0x0707);
	if (status)	return status;

	//enable Variable Rate Audio mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_EASCR, UCB_EAIDR_VRA);
	if (status)	return status;

	//48 kHz
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_ADR, UCB_DR_48000);
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_AAR, UCB_DR_48000);
	if (status)	return status;

	//set volume: bit13~8 - ML; bit5~0 - MR
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_MVR, 0x303); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_HVR, 0x303); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_MNVR, 0x303); 
	if (status)	return status;
	
	//Mute PCM out
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_POUTVR, 0x8303); 
	if (status)	return status;
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_GPR,  0x0000); 
	if (status)	return status;
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_ACMCR,  ACMCR_DDM); 
	if (status)	return status;
	// enable loopback mode
	return status;
}

void LineInDMALoopback(void)
{
	UINT32 DDADR, DSADR, DTADR, DCMD, tmp;
	XsDmaDescriptorGroupT * pdesc;
	XsDmaDescriptorGroupT * pdescin;
    
	StopDMAALL();

    PrintfUartDef("Line In DMA Loopback!\r\n");
    pdesc = initdesc(PCM_OUT);
	if (!pdesc)	
		return;
    pdescin = initdesc(PCM_IN);
	if (!pdescin)	
		return;
	

	PrintfUartDef("     To init AC97 codec\r\n");
	initac97audiocodec_lineindmaloopback();

	PrintfUartDef("     To init AC97 dma\r\n");
	

	//Waiting for current DMA End	
  	tmp = XsDmaControlRegsP->DCSR[channel];
	XsDmaControlRegsP->DCSR[channel] &= 0x7FFFFFFF;	// RUN = 0

	tmp = 0;
    PrintfUartDef("     Waiting channel to be not busy (channel %d)\r\n",channel);
	while (!tmp)
	{
		tmp = XsDmaControlRegsP->DCSR[channel] & 0x08;
		Util_DelayUs(1);
	}
	PrintfUartDef("     Channel vacant\r\n");
	XsDmaControlRegsP->DCSR[channel] = 0x00000008;
	XsDmaControlRegsP->DDG[channel].DDADR = ((UINT32)pdesc);// | 0xA0000001;
	XsDmaControlRegsP->DRCMR[XSDMA_DRCMR_ID_AC97_AUDIO_TX] = channel | 0x080u;
	
	//Waiting for current DMA End	
  	tmp = XsDmaControlRegsP->DCSR[channelin];
	XsDmaControlRegsP->DCSR[channelin] &= 0x7FFFFFFF;	// RUN = 0

	tmp = 0;
    PrintfUartDef("     Waiting channel to be not busy (channelin %d)\r\n",channelin);
	while (!tmp)
	{
		tmp = XsDmaControlRegsP->DCSR[channelin] & 0x08;
		Util_DelayUs(1);
	}
	PrintfUartDef("     Channel vacant\r\n");
	XsDmaControlRegsP->DCSR[channelin] = 0x00000008;
	XsDmaControlRegsP->DDG[channelin].DDADR = ((UINT32)(pdescin));// | 0xA0000001;
	XsDmaControlRegsP->DRCMR[XSDMA_DRCMR_ID_AC97_AUDIO_RX] = channelin | 0x080u;

	XsAc97CtrlRegsP->POSR |= 0x00000010;
	
	PrintfUartDef("     To start dma\r\n");
	startdma(channelin);
	startdma(channel);
	
	PrintfUartDef("Exit playpcm\r\n");
	return;
	while (1);
	
	// The below code is for debug
restart:
	XsAc97CtrlRegsP->POSR |= 0x00000010;
	tmp = XsDmaControlRegsP->DCSR[channel];
	tmp = XsDmaControlRegsP->DCSR[channel] & 0x08;
	if (tmp)
	{
		startdma(channel);
		while (XsDmaControlRegsP->DCSR[channel] & 0x08)
		{
			DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
			DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
			DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
			DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
			PrintfUartDef("dma not run\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
		}
	}
	
	Util_DelayUs(1);
	if (XsDmaControlRegsP->DCSR[channel] & 0x08)
	{
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		PrintfUartDef("dma stops: [DDADR]0x%x\n", DDADR);
	}
	if (XsAc97CtrlRegsP->POSR & 0x00000010)
	{
		//XsDmaControlRegsP->DCSR[channel] &= 0x7FFFFFFF;	// RUN = 0
		//while (!(XsDmaControlRegsP->DCSR[channel] & 0x08))	DM_WaitUs(1);
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
		DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
		DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
		tmp = XsDmaControlRegsP->DCSR[channel];
		PrintfUartDef("fifo error:\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
	}
	goto restart;
}


//Mono Out


UINT32 initac97audiocodec_monoout()
{
	UINT32 status;
	
	// disable loopback mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_GPR, 0);
	if (status)	return status;

	// SL[10:8] 100=Line In L; SR[2:0] 100=Line In R
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_RSR, UCB_RSR_SR_LINE | UCB_RSR_SL_LINE);
	if (status)	return status;
	
	//set record gain
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_RGR, 0);
	if (status)	return status;

	//enable Variable Rate Audio mode
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_EASCR, UCB_EAIDR_VRA);
	if (status)	return status;

	//48 kHz
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_ADR, UCB_DR_48000);
	if (status)	return status;
	
	//set volume: bit13~8 - ML; bit5~0 - MR
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_MVR, 0x303); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_HVR, 0x303); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_MNVR, 0x0); 
	if (status)	return status;
	
	status = XsAc97CtrlWriteCodecReg(XS_AC97CTRL_CM_ID_PRI_CODEC, 
		UCB_POUTVR, 0x0303); 
	if (status)	return status;

	return status;
}

void MonoOut(void)
{
	UINT32 DDADR, DSADR, DTADR, DCMD, tmp;
	XsDmaDescriptorGroupT * pdesc;
    
	StopDMAALL();
    PrintfUartDef("Mono out!\r\n");
	

	PrintfUartDef("     To init AC97 codec\r\n");
	initac97audiocodec_monoout();

	return;
	while (1);
	
	// The below code is for debug
restart:
	XsAc97CtrlRegsP->POSR |= 0x00000010;
	tmp = XsDmaControlRegsP->DCSR[channel];
	tmp = XsDmaControlRegsP->DCSR[channel] & 0x08;
	if (tmp)
	{
		startdma(channel);
		while (XsDmaControlRegsP->DCSR[channel] & 0x08)
		{
			DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
			DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
			DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
			DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
			PrintfUartDef("dma not run\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
		}
	}
	
	Util_DelayUs(1);
	if (XsDmaControlRegsP->DCSR[channel] & 0x08)
	{
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		PrintfUartDef("dma stops: [DDADR]0x%x\n", DDADR);
	}
	if (XsAc97CtrlRegsP->POSR & 0x00000010)
	{
		//XsDmaControlRegsP->DCSR[channel] &= 0x7FFFFFFF;	// RUN = 0
		//while (!(XsDmaControlRegsP->DCSR[channel] & 0x08))	DM_WaitUs(1);
		DDADR = XsDmaControlRegsP->DDG[channel].DDADR;
		DSADR = XsDmaControlRegsP->DDG[channel].DSADR;
		DTADR = XsDmaControlRegsP->DDG[channel].DTADR;
		DCMD = XsDmaControlRegsP->DDG[channel].DCMD;
		tmp = XsDmaControlRegsP->DCSR[channel];
		PrintfUartDef("fifo error:\n\t[DDADR]0x%x\n\t[DSADR]0x%x\n\t[DTADR]0x%x\n\t[DCMD]0x%x\n", DDADR, DSADR, DTADR, DCMD);
	}
	goto restart;
}

void StopDMAALL(void)
{
	stopdma(channel);
	stopdma(channelin);
}
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💿 文件大小 2866 K
👤 上传用户 archimedes88
📂 所属分类嵌入式/单片机编程
🏷️ 相关标签

#LCDC #ARM #嵌入式系统 #c语言
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