1004.ide.patch

sm86xx内核源包括补丁（ GPL ）的

+	else
+#endif
+		pio = xferspeed - XFER_PIO_0;
+
+	return ide_config_drive_speed(drive, xferspeed);
+}
+
+static void tangox_hw_setup(hw_regs_t *hw, unsigned long data_port,
+		     unsigned long ctrl_port)
+{
+	int i;
+	unsigned long reg;
+
+	memset(hw, 0, sizeof (*hw));
+
+	/* setup io_ports */
+	reg = data_port;
+	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += 4;
+	}
+
+	hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+}
+
+
+/*
+ * init function, ide controller is registred here
+ */
+extern int tangox_bmide_enabled(void);
+
+int __init tangox_bmide_init(void)
+{
+        ide_hwif_t *hwif;
+	hw_regs_t hw;
+	int index;
+	if (!tangox_bmide_enabled()) {
+		printk(KERN_NOTICE PFX "bmide support is disabled\n");
+		return -1;
+	}
+
+	/* Enable bus master IDE interface */
+	WR_HOST_REG32(IDECTRL_pri_idectl, 0x8400);
+
+	/* no skew : normal IORDY, normal data */
+	WR_HOST_REG32(IDECTRL_idesrc, 0);
+
+	/* Enable non-PRD mode */
+	WR_HOST_REG32(IDECTRL_bmic, 0x4);
+
+	/*
+	 * set register offset for our controller
+	 */
+	tangox_hw_setup(&hw, REG_BASE_host_interface_BMIDE,
+			REG_BASE_host_interface + IDECTRL_pri_ctrlblock);
+	hw.dma = NO_DMA;
+	/*
+	 * Tango   has   two   interrupts   for   IDE   controller   :
+	 * IRQ_IDECTRL_IDE,  IRQ_IDECTRL_IDEDMA
+	 *
+	 * IRQ_IDECTRL_IDEDMA is to be used for DMA transfer but it is
+	 * almost same with IRQ_IDECTRL_IDE interrupt.  Tango triggers
+	 * IDEDMA interrupt  after DMA FIFO  is flushed, and  it stays
+	 * high   until  BMIS   register  bit   2  is   cleared.   Use
+	 * IRQ_IDECTRL_IDE interrupt for both of PIO and DMA.
+	 */
+	hw.irq = IRQ_IDECTRL_IDE;
+
+	/*
+	 * register our controller
+	 */
+	if ((index = ide_register_hw(&hw, &hwif)) < 0) {
+		printk("failed to register SMP863x/SMP865x BM IDE controller\n");
+		return -1;
+	}
+
+	printk("%s: SMP863x/SMP865x Bus Mastering IDE controller\n", hwif->name);
+
+	/*
+	 * fill controller callbacks
+	 */
+
+        /* set up local I/O function entry points */
+        hwif->INB = tangox_bmide_inb;
+        hwif->INW = tangox_bmide_inw;
+        hwif->INSW = tangox_bmide_insw;
+        hwif->OUTB = tangox_bmide_outb;
+        hwif->OUTW = tangox_bmide_outw;
+        hwif->OUTBSYNC = tangox_bmide_outbsync;
+        hwif->OUTSW = tangox_bmide_outsw;
+
+	hwif->tuneproc = &tangox_bmide_tune_drive;
+        hwif->speedproc = &tangox_bmide_tune_chipset;
+
+	hwif->drives[0].autotune = 1;
+	hwif->drives[1].autotune = 1;
+
+#ifdef CONFIG_BLK_DEV_BMIDE_TANGOX_DMA
+	/* enable dma of both ide drives */
+	hwif->drives[0].autodma = noautodma ? 0 : 1;
+	hwif->drives[1].autodma = noautodma ? 0 : 1;
+	hwif->rqsize = 256;
+
+	/* we will do autotune at dmacheck time */
+	if (noautodma == 0) {
+		hwif->drives[0].autotune = 0;
+		hwif->drives[1].autotune = 0;
+	}
+
+	/* enable  all  ultra dma  and  multiword  dma operation,  but
+	 * disable single */
+#ifdef CONFIG_BLK_DEV_BMIDE_TANGOX_UDMA
+	hwif->ultra_mask = 0x7f; /* enable UDMA */
+#else
+	hwif->ultra_mask = 0x0; /* disable UDMA */
+#endif
+	hwif->udma_four = 1;
+	hwif->mwdma_mask = 0x07;
+	hwif->swdma_mask = 0x0;
+
+ 	hwif->autodma = 1;
+ 	hwif->atapi_dma = 1;
+
+	/* dma callbacks */
+	hwif->ide_dma_on = tangox_bmide_dma_on;
+	hwif->ide_dma_check = tangox_bmide_dma_check;
+	hwif->ide_dma_off_quietly = tangox_bmide_dma_off_quietly;
+	hwif->ide_dma_host_on = tangox_bmide_dma_host_on;
+	hwif->ide_dma_host_off = tangox_bmide_dma_host_off;
+
+	hwif->ide_dma_test_irq = tangox_bmide_dma_test_irq;
+	hwif->ide_dma_lostirq = tangox_bmide_dma_lostirq;
+	hwif->ide_dma_timeout = tangox_bmide_dma_timeout;
+
+	hwif->dma_setup = tangox_dma_setup;
+	hwif->dma_exec_cmd = tangox_dma_exec_cmd;
+	hwif->dma_start = tangox_dma_start;
+	hwif->ide_dma_end = tangox_bmide_dma_end;
+
+	hwif->dma_command = REG_BASE_host_interface + IDECTRL_bmic;
+	hwif->dma_status = REG_BASE_host_interface + IDECTRL_bmis;
+
+	em86xx_mbus_init();
+#endif
+	return 0;
+}
+
+static void __exit tangox_bmide_exit(void)
+{
+        return;
+}
+
+
+#ifdef MODULE
+module_init(tangox_bmide_init);
+module_exit(tangox_bmide_exit);
+#endif
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SMP86xx BM IDE driver");
+
+#ifdef CONFIG_RUNTIME_CLK_CALC
+/* The following is for runtime calculation of register value based on the mode and given
+ * system frequency by Ivan K. */
+static unsigned int CalcRegValTiming_PIO_DMA(j2_tim_pio_dma_t *t, unsigned long ide_clock)
+{
+	unsigned int dwRet;
+	unsigned int cycle_clks;	// ide clocks / cycle
+	unsigned int active_clks;	// ide clocks for active strobe
+	unsigned int recov_clks;	// ide clocks for recovery
+	unsigned int setup_clks;	// ide clocks for setup
+	unsigned int hold_clks;	// ide clocks for hold
+
+	// pio_timings in ns
+	cycle_clks	= (ide_clock * t->cycle_time)/1000;
+	active_clks	= (ide_clock * t->active_time)/1000;
+	recov_clks	= (ide_clock * t->recovery_time)/1000;
+	setup_clks	= (ide_clock * t->setup_time)/1000;
+	hold_clks	= (ide_clock * t->hold_time)/1000;
+
+	if(cycle_clks>0x7F) {
+		cycle_clks = 0x7F;
+	}
+	
+	if(active_clks>0x3F) {
+		active_clks = 0x3F;
+	}
+
+	if(recov_clks>0x3F) {
+		recov_clks = 0x3F;
+	}
+
+	if(setup_clks>0xF) {
+		setup_clks = 0xF;
+	}
+	
+	if(hold_clks>0x7) {
+		setup_clks = 0x7;
+	}
+	
+	dwRet	= (1<<31) | (cycle_clks<<24) | (active_clks<<16) | (recov_clks<<8) | (setup_clks<<4) | (hold_clks);
+
+	return dwRet;
+}
+
+static unsigned int CalcRegValTiming1_UDMA(j2_tim_udma_t *t, unsigned long ide_clock)
+{
+	unsigned int dwRet;
+	unsigned int t_zah,t_mli,t_ack,t_env,t_rp,t_cyc;
+
+	// pio_timings in ns
+	t_zah	= (ide_clock * t->t_zah)/1000;
+	t_mli	= (ide_clock * t->t_mli)/1000;
+	t_ack	= (ide_clock * t->t_ack)/1000;
+	t_env	= (ide_clock * t->t_env)/1000;
+	t_rp	= (ide_clock * t->t_rp) /1000;
+	t_cyc	= (ide_clock * t->t_cyc)/1000;
+
+	if ( t_zah > 0x0F ) {
+		t_zah = 0x0F;
+	}
+	if ( t_mli > 0x0F ) {
+		t_mli = 0x0F;
+	}
+	if ( t_ack > 0x0F ) {
+		t_ack = 0x0F;
+	}
+	if ( t_env > 0x0F) {
+		t_env = 0x0F;
+	}
+	if ( t_rp > 0x3F ) {
+		t_rp = 0x3F;
+	}
+	if ( t_cyc > 0x3F ) {
+		t_cyc = 0x3F;
+	}
+	
+	dwRet	= (t_zah<<28) | (t_mli<<24) | (t_ack<<20) | (t_env<<16) | (t_rp<<8) | (t_cyc);
+
+	return dwRet;
+}
+
+static unsigned int CalcRegValTiming2_UDMA(j2_tim_udma_t *t, unsigned long ide_clock)
+{
+	unsigned int dwRet;
+	unsigned int t_cvh,t_cvs;
+	
+	// pio_timings in ns
+	t_cvh	= (ide_clock * t->t_cvh)/1000;
+	t_cvs	= (ide_clock * t->t_cvs)/1000;
+
+	if ( t_cvh > 0x03 ) {
+		t_cvh = 0x03;
+	}
+	if ( t_cvs > 0x3F ) {
+		t_cvs = 0x3F;
+	}
+
+	dwRet	= (t_cvh<<8) | (t_cvs);
+
+	return dwRet;
+}
+#endif /* CONFIG_RUNTIME_CLK_CALC */
+
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linux-2.6.15.ref/drivers/ide/tangox/tangox-ide.h linux-2.6.15/drivers/ide/tangox/tangox-ide.h
--- linux-2.6.15.ref/drivers/ide/tangox/tangox-ide.h	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.15/drivers/ide/tangox/tangox-ide.h	2007-06-16 17:05:09.000000000 -0700
@@ -0,0 +1,16 @@
+
+#ifndef __TANGOX_IDE_H
+#define __TANGOX_IDE_H
+
+#ifdef CONFIG_TANGO2
+#include <asm/tango2/hardware.h>
+#include <asm/tango2/tango2_gbus.h>
+#include <asm/tango2/tango2api.h>
+#elif defined(CONFIG_TANGO3)
+#include <asm/tango3/hardware.h>
+#include <asm/tango3/tango3_gbus.h>
+#include <asm/tango3/tango3api.h>
+#endif
+
+#endif /* __TANGOX_IDE_H */
+
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linux-2.6.15.ref/drivers/ide/tangox/tangox-pbide.c linux-2.6.15/drivers/ide/tangox/tangox-pbide.c
--- linux-2.6.15.ref/drivers/ide/tangox/tangox-pbide.c	1969-12-31 16:00:00.000000000 -0800
+++ linux-2.6.15/drivers/ide/tangox/tangox-pbide.c	2007-06-16 17:05:09.000000000 -0700
@@ -0,0 +1,540 @@
+/*
+ * driver/ide/tangox/tangox_pbide.c
+ * TANGOX PB IDE driver
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/ide.h>
+#include "tangox-ide.h"
+
+extern int tangox_isaide_irq_map(void);
+extern int tangox_isaide_enabled(void);
+extern int tangox_isaide_cs_select(void);
+extern int tangox_isaide_timing_slot(void);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SMP86xx PB IDE driver");
+
+static unsigned long g_regbase_read, g_regbase_write;
+
+/*
+ * io helpers for PIO access
+ */
+static void tangox_pbide_outb(u8 data, unsigned long port)
+{
+	gbus_writew(port, data);
+}
+
+static void tangox_pbide_outw(u16 data, unsigned long port)
+{
+	gbus_writew(port, data);
+}
+
+static void tangox_pbide_outbsync(ide_drive_t *drive, u8 data, unsigned long port)
+{
+	gbus_writew(port, data);
+}
+
+static u8 tangox_pbide_inb(unsigned long port)
+{
+	u8 val;
+
+	val = ((u8)(gbus_readw(port) & 0xff));
+	return val;
+}
+
+static u16 tangox_pbide_inw(unsigned long port)
+{
+	u16 val;
+
+	val = ((u16)(gbus_readw(port) & 0xffff));
+	return val;
+}
+
+static void tangox_pbide_insw(unsigned long port, void *addr, u32 count)
+{
+	while (count--) {
+		*(u16 *)addr = (u16)(gbus_readw(port) & 0xffff);
+		addr += 2;
+	}
+}
+
+static void tangox_pbide_outsw(unsigned long port, void *addr, u32 count)
+{
+	while (count--) {
+		gbus_writew(port, *(u16 *)addr);
+		addr += 2;
+	}
+}
+
+//
+// data structure initialization
+//
+static void tangox_pbide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, 
+					unsigned long ctrl_port, int *irq)
+{
+	int i;
+	unsigned long reg;
+
+	memset(hw, 0, sizeof(*hw));
+
+	// setup io_ports
+	for (i = IDE_DATA_OFFSET, reg = data_port; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += 4;
+	}
+
+	hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+	hw->dma = NO_DMA;
+
+	if (irq) 
+		*irq = tangox_isaide_irq_map();
+}
+
+/*
+ * tangox_pbide_tune_drive
+ */
+static void tangox_pbide_tune_drive(ide_drive_t *drive, u8 pio)
+{
+        ide_hwif_t *hwif = HWIF(drive);
+
+        if (pio == 255)
+                pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
+        hwif->speedproc(drive, pio + XFER_PIO_0);
+}
+
+#ifdef CONFIG_BLK_DEV_PBIDE_TANGOX_DMA
+static int tangox_pbide_dma_off_quietly(ide_drive_t *drive)
+{
+        drive->using_dma = 0;
+        return 0;
+}
+
+static int tangox_pbide_dma_test_irq(ide_drive_t *drive)
+{
+        return 1;
+}