📄 1006.usb.patch
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+#include <asm/tangox/tangox_gbus.h>+#endif++#define NON_CACHED(x) KSEG1ADDR((u32)(x))+#define CACHED(x) KSEG0ADDR((u32)(x))+++#define TANGOX_EHCI_BASE_ADDR /*NON_CACHED*/(REG_BASE_host_interface + 0x1400)+#define TANGOX_OHCI_BASE_ADDR /*NON_CACHED*/(REG_BASE_host_interface + 0x1500)+#define TANGOX_USB_CTL_STATUS_REG_BASE /*NON_CACHED*/(REG_BASE_host_interface + 0x1700)+#define TANGOX_EHCI_IRQ IRQ_CONTROLLER_IRQ_BASE + LOG2_CPU_USB_EHCI_INT+#define TANGOX_OHCI_IRQ IRQ_CONTROLLER_IRQ_BASE + LOG2_CPU_USB_OHCI_INT++/* tangox ehci */+#define TANGOX_EHCI_BUS_NAME "tangox-ehci-bus"+#define TANGOX_EHCI_PRODUCT_DESC "TangoX Integrated USB 2.0"+#define hcd_name "tangox-ehci-hcd"+/* tangox ohci */+#define ohci_hcd_name "tangox-ohci-hcd"+#define TANGOX_OHCI_BUS_NAME "tangox-ohci-bus"+++static u32 __inline__ tangox_read_reg( u32 Reg )+{+#ifdef CONFIG_TANGOX+ u32 data = gbus_readl(Reg);+#else+ u32 data = __raw_readl(Reg);+#endif++// printk("read data=0x%08x from addr=0x%08x\n", data, Reg);+ return data;+}++static void __inline__ tangox_write_reg( u32 Reg, u32 Data )+{+// printk("write data=0x%08x to addr=0x%08x\n", Data, Reg);+#ifdef CONFIG_TANGOX+ gbus_writel(Reg, Data);+#else+ __raw_writel(Data,Reg);+#endif+}++static __inline__ void wait_ms(unsigned int ms)+{+ if(!in_interrupt()) {+ current->state = TASK_UNINTERRUPTIBLE;+ schedule_timeout(1 + ms * HZ / 1000);+ }+ else+ mdelay(ms);+}+#ifdef CONFIG_TANGOX_XENV_READ+extern int tangox_usb_enabled(void);+#endif+extern int is_tango2_es89(void);+extern void tangox_usb_init (void);+#endifdiff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linux-2.6.15.ref/drivers/usb/host/ehci.h linux-2.6.15/drivers/usb/host/ehci.h--- linux-2.6.15.ref/drivers/usb/host/ehci.h 2006-01-25 20:51:42.000000000 -0800+++ linux-2.6.15/drivers/usb/host/ehci.h 2007-06-20 12:15:13.000000000 -0700@@ -245,7 +245,14 @@ #define PORT_WKOC_E (1<<22) /* wake on overcurrent (enable) */ #define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */ #define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */+ /* 19:16 for port testing */+#define PORT_TEST_J (1<<16)+#define PORT_TEST_K (2<<16)+#define PORT_TEST_SE0_NAK (3<<16)+#define PORT_TEST_PACKET (4<<16)+#define PORT_TEST_FORCE_ENABLE (5<<16)+ #define PORT_LED_OFF (0<<14) #define PORT_LED_AMBER (1<<14) #define PORT_LED_GREEN (2<<14)@@ -636,6 +643,25 @@ #define ehci_port_speed(ehci, portsc) (1<<USB_PORT_FEAT_HIGHSPEED) #endif ++static struct list_head * qh_urb_transaction (+ struct ehci_hcd *ehci,+ struct urb *urb,+ struct list_head *head,+ gfp_t flags);++static int submit_async (+ struct ehci_hcd *ehci,+ struct usb_host_endpoint *ep,+ struct urb *urb,+ struct list_head *qtd_list,+ gfp_t mem_flags);++static inline void ehci_qtd_free (+ struct ehci_hcd *ehci,+ struct ehci_qtd *qtd);++ /*-------------------------------------------------------------------------*/ #ifndef DEBUGdiff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linux-2.6.15.ref/drivers/usb/host/ehci-hub.c linux-2.6.15/drivers/usb/host/ehci-hub.c--- linux-2.6.15.ref/drivers/usb/host/ehci-hub.c 2006-01-25 20:51:42.000000000 -0800+++ linux-2.6.15/drivers/usb/host/ehci-hub.c 2007-06-20 12:16:04.000000000 -0700@@ -28,8 +28,36 @@ /*-------------------------------------------------------------------------*/ -#ifdef CONFIG_PM +#ifdef CONFIG_TANGOX++#define COMPANION_PORT 2 /* For B+ or ES7+, set to 0 instead */++extern int is_tango2_es89(void);+extern int is_tango3_chip(void);++static int is_tangox_ehci(struct usb_hcd *hcd)+{+ if (!strcmp(hcd->product_desc,"TangoX USB 2.0"))+ return 1;+ else+ return 0;+}++/* 0: no companion port to be set to+ 1: companion port#0+ 2: companion port#1+*/+static int set_to_companion_port(struct usb_hcd *hcd)+{+ if (!is_tangox_ehci(hcd) || is_tango2_es89() || is_tango3_chip()) + return 0;+ else + return COMPANION_PORT;+}+#endif /* CONFIG_TANGOX */++#if 1//def CONFIG_PM static int ehci_bus_suspend (struct usb_hcd *hcd) { struct ehci_hcd *ehci = hcd_to_ehci (hcd);@@ -239,15 +267,23 @@ spin_lock_irqsave (&ehci->lock, flags); for (i = 0; i < ports; i++) { temp = readl (&ehci->regs->port_status [i]);- if (temp & PORT_OWNER) {- /* don't report this in GetPortStatus */- if (temp & PORT_CSC) {- temp &= ~PORT_RWC_BITS;- temp |= PORT_CSC;- writel (temp, &ehci->regs->port_status [i]);++#ifdef CONFIG_TANGOX+ if (!set_to_companion_port(hcd)){+#endif+ if (temp & PORT_OWNER) {+ /* don't report this in GetPortStatus */+ if (temp & PORT_CSC) {+ temp &= ~PORT_RWC_BITS;+ temp |= PORT_CSC;+ writel (temp, &ehci->regs->port_status [i]);+ }+ continue; }- continue;+#ifdef CONFIG_TANGOX }+#endif+ if (!(temp & PORT_CONNECT)) ehci->reset_done [i] = 0; if ((temp & (PORT_CSC | PORT_PEC | PORT_OCC)) != 0@@ -319,6 +355,12 @@ u32 temp, status; unsigned long flags; int retval = 0;+#ifdef CONFIG_TANGOX+ int companion_port;+#endif+#ifdef CONFIG_USB_EHSET+ u32 temp1;+#endif /* * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.@@ -344,8 +386,15 @@ goto error; wIndex--; temp = readl (&ehci->regs->port_status [wIndex]);- if (temp & PORT_OWNER)- break;++#ifdef CONFIG_TANGOX+ if (!set_to_companion_port(hcd)) {+#endif+ if (temp & PORT_OWNER)+ break;+#ifdef CONFIG_TANGOX+ }+#endif switch (wValue) { case USB_PORT_FEAT_ENABLE:@@ -466,9 +515,26 @@ temp = check_reset_complete (ehci, wIndex, readl (&ehci->regs->port_status [wIndex])); }+ +#ifdef CONFIG_TANGOX+ if ((companion_port = set_to_companion_port(hcd)) != 0) {+ /* transfer companion_port to the tangox ohci */+ if ((temp & PORT_CONNECT) && ((wIndex+1) & companion_port)) { + temp &= ~PORT_RWC_BITS;+ temp |= PORT_OWNER;+ writel (temp, &ehci->regs->port_status [wIndex]);+ ehci_info(ehci, "Transfer port %d to companion host controller.\n", wIndex);+ temp = readl (&ehci->regs->port_status [wIndex]);+ }+ }+#endif // don't show wPortStatus if it's owned by a companion hc- if (!(temp & PORT_OWNER)) {+ if (!(temp & PORT_OWNER) +#ifdef CONFIG_TANGOX+ || companion_port+#endif+ ) { if (temp & PORT_CONNECT) { status |= 1 << USB_PORT_FEAT_CONNECTION; // status may be from integrated TT@@ -504,10 +570,11 @@ } break; case SetPortFeature:- if (!wIndex || wIndex > ports)++ if (!wIndex || (wIndex&0xFF) > ports) goto error; wIndex--;- temp = readl (&ehci->regs->port_status [wIndex]);+ temp = readl (&ehci->regs->port_status [wIndex&0xFF]); if (temp & PORT_OWNER) break; @@ -520,12 +587,12 @@ if (hcd->remote_wakeup) temp |= PORT_WAKE_BITS; writel (temp | PORT_SUSPEND,- &ehci->regs->port_status [wIndex]);+ &ehci->regs->port_status [wIndex&0xFF]); break; case USB_PORT_FEAT_POWER: if (HCS_PPC (ehci->hcs_params)) writel (temp | PORT_POWER,- &ehci->regs->port_status [wIndex]);+ &ehci->regs->port_status [wIndex&0xFF]); break; case USB_PORT_FEAT_RESET: if (temp & PORT_RESUME)@@ -550,18 +617,298 @@ * caller must wait, then call GetPortStatus * usb 2.0 spec says 50 ms resets on root */- ehci->reset_done [wIndex] = jiffies+ ehci->reset_done [wIndex&0xFF] = jiffies + msecs_to_jiffies (50); }- writel (temp, &ehci->regs->port_status [wIndex]);+ writel (temp, &ehci->regs->port_status [wIndex&0xFF]); break;+#ifdef CONFIG_USB_EHSET+ case USB_PORT_FEAT_TEST:++ ehci_info (ehci, "running EHCI test %x on port %x\n",+ ((wIndex>>8)&0xFF), (wIndex&0xFF)+1);++ /* EHCI spec. 4.14 Port Test Modes*/+ temp1 = ((wIndex)>>8)&0xFF;+ if(temp1 < (EHSET_HS_HOST_PORT_SUSPEND_RESUME&0xFF)){++ /* Disable Periodic and async schedules*/+ temp1 = readl (&ehci->regs->command);+ temp1 &= ~(CMD_ASE | CMD_PSE);+ writel (temp1, &ehci->regs->command);++ /* Suspend the ports*/+ spin_unlock_irqrestore (&ehci->lock, flags);+ ehci_bus_suspend (hcd);+ spin_lock_irqsave (&ehci->lock, flags);++ /* stop the host controller*/+ temp1 = readl (&ehci->regs->command);+ temp1 &= ~CMD_RUN;+ writel (temp1, &ehci->regs->command);+ handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);+ }++ switch (((wIndex)>>8)&0xFF) {+ case USB_PORT_TEST_J:+ ehci_info (ehci, "Testing J State\n");+ writel (temp|PORT_TEST_J,+ &ehci->regs->port_status+ [wIndex&0xFF]);+ break;+ case USB_PORT_TEST_K:+ ehci_info (ehci, "Testing K State\n");+ writel (temp|PORT_TEST_K,+ &ehci->regs->port_status+ [wIndex&0xFF]);+ break;+ case USB_PORT_TEST_SE0_NAK:+ ehci_info (ehci, "Testing SE0_NAK\n");+ writel (temp|PORT_TEST_SE0_NAK,+ &ehci->regs->port_status+ [wIndex&0xFF]);+ break;+ case USB_PORT_TEST_PACKET:+ ehci_info (ehci, "Sending Test Packets\n");+ writel (temp|PORT_TEST_PACKET,+ &ehci->regs->port_status+ [wIndex&0xFF]);+ break;+ case USB_PORT_TEST_FORCE_ENABLE:+ ehci_info (ehci, "Testing FORCE_ENABLE\n");+ writel (temp|PORT_TEST_FORCE_ENABLE,+ &ehci->regs->port_status+ [wIndex&0xFF]);+ break;+ case (EHSET_HS_HOST_PORT_SUSPEND_RESUME&0xFF):+ {+ spin_unlock_irqrestore (&ehci->lock, flags);+ ehci_info (ehci, "Testing SUSPEND RESUME\n");
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