1006.ide.patch

sm86xx内核源包括补丁（ GPL ）的

 	if (IDE_CONTROL_REG) {
 		/* take a deep breath */
+#ifndef CONFIG_SD_IDE_FASTPROBE
 		ide_delay_50ms();
+#endif
 		a = hwif->INB(IDE_ALTSTATUS_REG);
 		s = hwif->INB(IDE_STATUS_REG);
 		if ((a ^ s) & ~INDEX_STAT) {
@@ -308,7 +351,9 @@
 			hd_status = IDE_ALTSTATUS_REG;
 		}
 	} else {
+#ifndef CONFIG_SD_IDE_FASTPROBE
 		ide_delay_50ms();
+#endif
 		hd_status = IDE_STATUS_REG;
 	}
 
@@ -326,6 +371,9 @@
 		/* ask drive for ID */
 		hwif->OUTB(cmd, IDE_COMMAND_REG);
 	}
+#ifdef CONFIG_SD_IDE_FASTPROBE
+	ide_wait_stat_sd(hwif, hd_status, BUSY_STAT, 0, 0);
+#else
 	timeout = ((cmd == WIN_IDENTIFY) ? WAIT_WORSTCASE : WAIT_PIDENTIFY) / 2;
 	timeout += jiffies;
 	do {
@@ -339,9 +387,10 @@
 
 	/* wait for IRQ and DRQ_STAT */
 	ide_delay_50ms();
+#endif
+
 	if (OK_STAT((hwif->INB(IDE_STATUS_REG)), DRQ_STAT, BAD_R_STAT)) {
 		unsigned long flags;
-
 		/* local CPU only; some systems need this */
 		local_irq_save(flags);
 		/* drive returned ID */
@@ -381,7 +430,6 @@
 		/* enable device irq */
 		hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
 	}
-
 	retval = actual_try_to_identify(drive, cmd);
 
 	if (autoprobe) {
@@ -448,6 +496,7 @@
 		if ((drive->media != ide_disk) && (cmd == WIN_IDENTIFY))
 			return 4;
 	}
+
 #ifdef DEBUG
 	printk("probing for %s: present=%d, media=%d, probetype=%s\n",
 		drive->name, drive->present, drive->media,
@@ -457,15 +506,32 @@
 	/* needed for some systems
 	 * (e.g. crw9624 as drive0 with disk as slave)
 	 */
+#ifdef CONFIG_SD_IDE_FASTPROBE
+	ide_wait_stat_sd(hwif, IDE_STATUS_REG, BUSY_STAT, 0, 1);
+#else
 	ide_delay_50ms();
+#endif
 	SELECT_DRIVE(drive);
+#ifdef CONFIG_SD_IDE_FASTPROBE
+	if (hwif->INB(IDE_SELECT_REG) != drive->select.all)
+		return 3;
+	// do not check READY (for CDROM)
+	// if ((hwif->INB(IDE_STATUS_REG) & READY_STAT) == 0)
+	// 	return 3;
+#else
 	ide_delay_50ms();
+#endif
+
 	if (hwif->INB(IDE_SELECT_REG) != drive->select.all && !drive->present) {
 		if (drive->select.b.unit != 0) {
 			/* exit with drive0 selected */
 			SELECT_DRIVE(&hwif->drives[0]);
 			/* allow BUSY_STAT to assert & clear */
+#ifdef CONFIG_SD_IDE_FASTPROBE
+			ide_wait_stat_sd(hwif, IDE_STATUS_REG, BUSY_STAT, 0, 1);
+#else
 			ide_delay_50ms();
+#endif
 		}
 		/* no i/f present: mmm.. this should be a 4 -ml */
 		return 3;
@@ -510,7 +576,11 @@
 	if (drive->select.b.unit != 0) {
 		/* exit with drive0 selected */
 		SELECT_DRIVE(&hwif->drives[0]);
+#ifdef CONFIG_SD_IDE_FASTPROBE
+		ide_wait_stat_sd(hwif, IDE_STATUS_REG, BUSY_STAT, 0, 1);
+#else
 		ide_delay_50ms();
+#endif
 		/* ensure drive irq is clear */
 		(void) hwif->INB(IDE_STATUS_REG);
 	}
@@ -645,13 +715,16 @@
 	if (hwif->mmio == 2)
 		return 0;
 	addr_errs  = hwif_check_region(hwif->io_ports[IDE_DATA_OFFSET], 1);
-	for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET; i++)
+	for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
 		addr_errs += hwif_check_region(hwif->io_ports[i], 1);
-	if (hwif->io_ports[IDE_CONTROL_OFFSET])
+	}
+	if (hwif->io_ports[IDE_CONTROL_OFFSET]) {
 		addr_errs += hwif_check_region(hwif->io_ports[IDE_CONTROL_OFFSET], 1);
+	}
 #if defined(CONFIG_AMIGA) || defined(CONFIG_MAC)
-	if (hwif->io_ports[IDE_IRQ_OFFSET])
+	if (hwif->io_ports[IDE_IRQ_OFFSET]) {
 		addr_errs += hwif_check_region(hwif->io_ports[IDE_IRQ_OFFSET], 1);
+	}
 #endif /* (CONFIG_AMIGA) || (CONFIG_MAC) */
 	/* If any errors are return, we drop the hwif interface. */
 	hwif->straight8 = 0;
@@ -913,7 +986,6 @@
 		enable_irq(irqd);
 		
 	ide_tune_drives(hwif);
-
 }
 
 EXPORT_SYMBOL(probe_hwif);
@@ -1078,9 +1150,9 @@
 	 */
 	if (!match || match->irq != hwif->irq) {
 		int sa = SA_INTERRUPT;
-#if defined(__mc68000__) || defined(CONFIG_APUS)
+#if defined(__mc68000__) || defined(CONFIG_APUS) || defined(CONFIG_TANGO2)
 		sa = SA_SHIRQ;
-#endif /* __mc68000__ || CONFIG_APUS */
+#endif /* __mc68000__ || CONFIG_APUS || CONFIG_TANGO2 */
 
 		if (IDE_CHIPSET_IS_PCI(hwif->chipset)) {
 			sa = SA_SHIRQ;
@@ -1136,6 +1208,7 @@
 	spin_unlock_irqrestore(&io_request_lock, flags);
 #endif
 
+
 #if !defined(__mc68000__) && !defined(CONFIG_APUS) && !defined(__sparc__)
 	printk("%s at 0x%03lx-0x%03lx,0x%03lx on irq %d", hwif->name,
 		hwif->io_ports[IDE_DATA_OFFSET],
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/drivers/ide/Makefile linuxmips-2.4.30/drivers/ide/Makefile
--- linuxmips-2.4.30.ref/drivers/ide/Makefile	2004-04-15 20:14:15.000000000 -0700
+++ linuxmips-2.4.30/drivers/ide/Makefile	2007-05-08 10:41:54.000000000 -0700
@@ -11,14 +11,14 @@
 
 export-objs := ide-iops.o ide-taskfile.o ide-proc.o ide.o ide-probe.o ide-probe-mini.o ide-dma.o ide-lib.o setup-pci.o ide-io.o ide-disk.o
 
-all-subdirs	:= arm legacy pci ppc raid
-mod-subdirs	:= arm legacy pci ppc raid
+all-subdirs	:= arm legacy pci ppc raid tango2
+mod-subdirs	:= arm legacy pci ppc raid tango2
 
 obj-y		:=
 obj-m		:=
 ide-obj-y	:=
 
-subdir-$(CONFIG_BLK_DEV_IDE) += legacy ppc arm raid pci
+subdir-$(CONFIG_BLK_DEV_IDE) += legacy ppc arm raid pci tango2
 
 # First come modules that register themselves with the core
 
@@ -55,6 +55,7 @@
   obj-y		+= legacy/idedriver-legacy.o
   obj-y		+= ppc/idedriver-ppc.o
   obj-y		+= arm/idedriver-arm.o
+  obj-y		+= tango2/idedriver-tango2.o
 else
   ifeq ($(CONFIG_BLK_DEV_HD_ONLY),y)
 	subdir-$(CONFIG_BLK_DEV_HD_ONLY) += legacy
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/drivers/ide/setup-pci.c linuxmips-2.4.30/drivers/ide/setup-pci.c
--- linuxmips-2.4.30.ref/drivers/ide/setup-pci.c	2003-08-13 10:19:17.000000000 -0700
+++ linuxmips-2.4.30/drivers/ide/setup-pci.c	2007-05-08 10:41:54.000000000 -0700
@@ -228,6 +228,7 @@
 			case PCI_DEVICE_ID_AMD_VIPER_7409:
 			case PCI_DEVICE_ID_CMD_643:
 			case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
+			case PCI_DEVICE_ID_PROMISE_20246:
 				simplex_stat = hwif->INB(dma_base + 2);
 				hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
 				simplex_stat = hwif->INB(dma_base + 2);
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/drivers/ide/tango2/em86xx_bm.c linuxmips-2.4.30/drivers/ide/tango2/em86xx_bm.c
--- linuxmips-2.4.30.ref/drivers/ide/tango2/em86xx_bm.c	1969-12-31 16:00:00.000000000 -0800
+++ linuxmips-2.4.30/drivers/ide/tango2/em86xx_bm.c	2007-05-08 10:41:54.000000000 -0700
@@ -0,0 +1,1058 @@
+/*
+ * driver/ide/em86xx/em86xx_bm.c
+ * 
+ * EM86XX Bus Master IDE driver
+ *
+ * PIO mode support by Ho Lee 01/15/2004
+ * Multi-word DMA mode support by Ho Lee 01/29/2004
+ */
+
+/*
+ * Tango Bus Master IDE interface is different from that of Japser
+ * Japser's IDE controller is compatible wtih PCI-based IDE controller,
+ * and Tango's IDE controller is based on Japser's, but it doesn't make 
+ * use of PRD table for bus mastering and DMA transfer must go through
+ * MBUS. So device driver for Tango bus master IDE controller with DMA
+ * support looks similar to that of Mambo's ISA IDE controller. 
+ *
+ * So this implementation has many duplicated code with em86xx_isa.c
+ * But I would like to have separate file to keep clean code for that,
+ * because em86xx_isa.c contains some experimental code which is not used,
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <linux/ide.h>
+#include <asm/tango2/hardware.h>
+#include <asm/tango2/tango2api.h>
+#include "em86xx_ide.h"
+
+#ifdef MODULE
+#include <linux/module.h>
+MODULE_AUTHOR("Craig Qu");
+MODULE_DESCRIPTION(" Tango2 BM IDE driver");
+MODULE_LICENSE("GPL");
+#endif
+
+
+#ifdef CONFIG_BLK_DEV_TANGO2_BMIDEDMA
+// handlers
+static int em86xx_bmide_dma_read(ide_drive_t *drive);
+static int em86xx_bmide_dma_write(ide_drive_t *drive);
+static int em86xx_bmide_dma_begin(ide_drive_t *drive);
+static int em86xx_bmide_dma_end(ide_drive_t *drive);
+static int em86xx_bmide_dma_check(ide_drive_t *drive);
+static int em86xx_bmide_dma_host_on(ide_drive_t *drive);
+static int em86xx_bmide_dma_host_off(ide_drive_t *drive);
+static int em86xx_bmide_tune_chipset(ide_drive_t *drive, u8 speed);
+static int em86xx_bmide_dma_lostirq(ide_drive_t *drive);
+static int em86xx_bmide_dma_timeout(ide_drive_t *drive);
+
+// helper functions
+static struct buffer_head *em86xx_bmide_dma_setup(int read, struct request *rq, int stop_if_fragment);
+static int em86xx_bmide_rwdma(ide_drive_t *drive, int read, struct request *rq);
+static int em86xx_bmide_dma_end_io(ide_drive_t *drive);
+static ide_startstop_t em86xx_bmide_dma_intr(ide_drive_t *drive);
+
+// switchbox and MBUS
+static int g_sbox_port_read = -1, g_sbox_port_write = -1;
+static unsigned int g_regbase_read, g_regbase_write;
+static int g_irq_read, g_irq_write;
+
+// Misc
+static struct request *crq = NULL;
+static int crq_ntransfer = 0;
+
+#define CONFIG_RUNTIME_CLK_CALC
+
+#ifdef CONFIG_RUNTIME_CLK_CALC
+typedef struct {
+	unsigned long cycle_time;
+	unsigned long active_time;
+	unsigned long recovery_time;
+	unsigned long setup_time;
+	unsigned long hold_time;
+} j2_tim_pio_dma_t;
+
+typedef struct {
+	unsigned long t_zah;//
+	unsigned long t_mli;//
+	unsigned long t_ack;//
+	unsigned long t_env;//
+	unsigned long t_rp;	//
+	unsigned long t_cyc;//
+	unsigned long t_cvh;//
+	unsigned long t_cvs;//
+} j2_tim_udma_t;
+
+static j2_tim_pio_dma_t	j2_pio_timings[] = 
+{
+//	 cycle	, active, recov	, setup	, hold
+	{600	, 165	, 70	, 70	, 30	},
+	{383	, 125	, 70	, 50	, 20	},
+	{240	, 100	, 70	, 30	, 15	},
+	{180	, 80	, 70	, 30	, 10	},
+	{120	, 70	, 25	, 25	, 10	},
+};
+
+static j2_tim_pio_dma_t	j2_dma_timings[] =
+{
+//	 cycle	, active, recov	, setup	, hold
+	{480	, 215	, 215	, 50	, 20	},
+	{150	, 80	, 50	, 30	, 15	},
+	{120	, 70	, 25	, 25	, 10	},
+};
+
+// We round 16.8 to 17 - Ex: mode 5, t_cyc=16.8!!!
+static j2_tim_udma_t j2_udma_timings[] =
+{
+//	 t_zah,  t_mli, t_ack,  t_env,  t_rp,  t_cyc   t_cvh   t_cvs
+	{ 20,	 20,	 20,	20,		160,	112,	  7,	 70	},
+	{ 20,	 20,	 20,	20,		125,	 73,	  7,	 48	},
+	{ 20,	 20,	 20,	20,		100,	 54,	  7,	 31	},
+	{ 20,	 20,	 20,	20,		100,	 39,	  7,	 20	},
+	{ 20,	 20,	 20,	20,		100,	 25,	  7,	  7	},
+	{ 20,	 20,	 20,	20,		 85,	 17,	 10,	 10	},
+	{ 20,	 20,	 20,	20,		 85,	 13,	 10,	 10	},
+	{ 20,	 20,	 20,	20,		 85,	 13,	 10,	 10	},
+};
+
+static unsigned int CalcRegValTiming_PIO_DMA(j2_tim_pio_dma_t *t, unsigned long ide_clock);
+static unsigned int CalcRegValTiming1_UDMA(j2_tim_udma_t *t, unsigned long ide_clock);
+static unsigned int CalcRegValTiming2_UDMA(j2_tim_udma_t *t, unsigned long ide_clock);
+#endif /* CONFIG_RUNTIME_CLK_CALC */
+
+/* Merge BH as much as possible */
+#define EM86XX_BMIDE_DMA_MERGE_BH
+
+// bounce buffer
+#define DMA_BOUNCE_BUF_ORDER		(19 - PAGE_SHIFT)	// maximum = 128 sectors = 2^7 sectors = 2^7 * 2^9 bytes = 2^16 bytes
+static unsigned char *g_bounce_buf = NULL;
+#endif
+
+// helper functions
+static void em86xx_bmide_tune_chipset_drive(int drive, int speed, int verbose);
+
+//
+// data structure initialization
+//
+
+void em86xx_bmide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
+{
+	int i;
+	ide_ioreg_t reg;
+
+	memset(hw, 0, sizeof(*hw));
+
+	// setup io_ports
+	for (i = IDE_DATA_OFFSET, reg = data_port; i <= IDE_STATUS_OFFSET; i++) {
+		hw->io_ports[i] = reg;
+		reg += 4;
+	}
+
+	hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
+	hw->dma = NO_DMA;
+
+	// Tango has two interrupts for IDE controller : IRQ_IDECTRL_IDE, IRQ_IDECTRL_IDEDMA
+	// IRQ_IDECTRL_IDEDMA is to be used for DMA transfer but it is almost same with 
+	// IRQ_IDECTRL_IDE interrupt.  Tango triggers IDEDMA interrupt after DMA FIFO is
+	// flushed, and it stays high until BMIS register bit 2 is cleared. 
+	// Use IRQ_IDECTRL_IDE interrupt for both of PIO and DMA.
+	if (irq) 
+		*irq = IRQ_IDECTRL_IDE;
+}
+
+//
+// initialize IDE driver
+//
+
+int __init em86xx_bmide_init(void)
+{
+	int index, i;
+	ide_hwif_t *hwif;
+	hw_regs_t hw;
+
+#if defined(CONFIG_TANGO2_SIG_BLOCK) || defined(CONFIG_TANGO2_XENV)
+	extern int tango2_bmide_enabled(void);
+	if (tango2_bmide_enabled() == 0)
+		return 0;
+#endif
+	// Enable bus master IDE interface
+	gbus_write_uint32(pGBus, REG_BASE_host_interface + IDECTRL_pri_idectl, 0x8400);
+	// no skew : normal IORDY, normal data
+	gbus_write_uint32(pGBus, REG_BASE_host_interface + IDECTRL_idesrc, 0);
+	// Enable non-PRD mode
+	gbus_write_uint32(pGBus, REG_BASE_host_interface + IDECTRL_bmic, 0x4);
+
+	em86xx_bmide_init_hwif_ports(&hw, REG_BASE_host_interface_BMIDE, REG_BASE_host_interface + IDECTRL_pri_ctrlblock, &hw.irq);
+	index = ide_register_hw(&hw, NULL);
+	printk("SMP863x Bus Mastering IDE activated as ide%d.\n", index);
+