1000.tango2.patch

sm86xx内核源包括补丁（ GPL ）的

+	or t0, t1, a1
+	jr ra
+	sb a2, 0(t0)
+1:
+	lui t1, 0x2000
+	sub t0, a1, t1
+	lw t1, em86xx_tlb_dram1_map_base
+	add t0, t1
+	jr ra
+	sb a2, 0(t0)
+END(gbus_write_dram_uint8)
+
+LEAF(gbus_write_dram_uint16)
+	ext t0, a1, 29, 1 // 0x20000000 is bit29
+	bnez t0, 1f
+	lui t1, 0xa000
+	or t0, t1, a1
+	jr ra
+	sh a2, 0(t0)
+1:
+	lui t1, 0x2000
+	sub t0, a1, t1
+	lw t1, em86xx_tlb_dram1_map_base
+	add t0, t1
+	jr ra
+	sh a2, 0(t0)
+END(gbus_write_dram_uint16)
+
+LEAF(gbus_write_dram_uint32)
+	ext t0, a1, 29, 1 // 0x20000000 is bit29
+	bnez t0, 1f
+	lui t1, 0xa000
+	or t0, t1, a1
+	jr ra
+	sw a2, 0(t0)
+1:
+	lui t1, 0x2000
+	sub t0, a1, t1
+	lw t1, em86xx_tlb_dram1_map_base
+	add t0, t1
+	jr ra
+	sw a2, 0(t0)
+END(gbus_write_dram_uint32)
+
+#else
+		
+LEAF(gbus_read_dram_uint8)
+	rotr t0, a1, 29
+	ins t0, t0, 30, 1
+	or t0, 5
+	rotr t0, 3
+	jr ra
+	lbu v0, 0(t0)
+END(gbus_read_dram_uint8)
+	
+LEAF(gbus_read_dram_uint16)
+	rotr t0, a1, 29
+	ins t0, t0, 30, 1
+	or t0, 5
+	rotr t0, 3
+	jr ra
+	lhu v0, 0(t0)
+END(gbus_read_dram_uint16)
+	
+LEAF(gbus_read_dram_uint32)
+	rotr t0, a1, 29
+	ins t0, t0, 30, 1
+	or t0, 5
+	rotr t0, 3
+	jr ra
+	lw v0, 0(t0)
+END(gbus_read_dram_uint32)
+	
+LEAF(gbus_write_dram_uint8)
+	rotr t0, a1, 29
+	ins t0, t0, 30, 1
+	or t0, 5
+	rotr t0, 3
+	jr ra
+	sb a2, 0(t0)
+END(gbus_write_dram_uint8)
+	
+LEAF(gbus_write_dram_uint16)
+	rotr t0, a1, 29
+	ins t0, t0, 30, 1
+	or t0, 5
+	rotr t0, 3
+	jr ra
+	sh a2, 0(t0)
+END(gbus_write_dram_uint16)
+	
+LEAF(gbus_write_dram_uint32)
+	rotr t0, a1, 29
+	ins t0, t0, 30, 1
+	or t0, 5
+	rotr t0, 3
+	jr ra
+	sw a2, 0(t0)
+END(gbus_write_dram_uint32)
+
+#endif
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/tango2/irq.c linuxmips-2.4.30/arch/mips/tango2/irq.c
--- linuxmips-2.4.30.ref/arch/mips/tango2/irq.c	1969-12-31 16:00:00.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/tango2/irq.c	2007-06-20 14:01:27.000000000 -0700
@@ -0,0 +1,211 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, [e-mail] or [e-mail]
+ *
+ * init_IRQ for tango2.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <linux/pm.h>
+#include <linux/irq.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/gdb-stub.h>
+
+#include <asm/tango2/tango2.h>
+#include <asm/tango2/rmdefs.h>
+
+extern asmlinkage void tango2IRQ(void);
+
+#include "tango2controllers.h"
+
+extern void spurious_interrupt(void);
+extern void breakpoint(void);
+
+static struct irqaction cascade =
+        { no_action, SA_SHIRQ, 0, "cascade", NULL, NULL };
+
+#if (EM86XX_REVISION > 3)
+static inline u64 get_irq_status(void)
+{
+	return((((u64)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_irq_status_hi))<<32) | 
+		((u64)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_irq_status)));
+}
+static inline u64 get_fiq_status(void)
+{
+	return((((u64)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_fiq_status_hi))<<32) | 
+		((u64)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_fiq_status)));
+}
+static inline u64 get_iiq_status(void)
+{
+	return((((u64)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_iiq_status_hi))<<32) | 
+		((u64)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_iiq_status)));
+}
+#else
+static inline u32 get_irq_status(void)
+{
+	return((u32)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_irq_status));
+}
+static inline u32 get_fiq_status(void)
+{
+	return((u32)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_fiq_status));
+}
+static inline u32 get_iiq_status(void)
+{
+	return((u32)gbus_read_uint32(pGBus,REG_BASE_cpu_block+CPU_iiq_status));
+}
+#endif
+
+// called from tango2IRQ.S
+void tango2_dispatch(int ipline,struct pt_regs *regs)
+{
+	int x;
+#if (EM86XX_REVISION > 3)
+	u64 status;
+#else
+	u32 status;
+#endif
+	// the software priority is below:
+	switch (ipline) {
+	case 2:
+		if ((status = get_irq_status()) == 0) {
+			spurious_interrupt();
+			return;
+		} else {
+			do {
+				for (x = 0; status != 0; x++, status >>= 1) {
+					if ((status & 0x1) != 0) { /* Interrupt is here */
+						do_IRQ(IRQ_CONTROLLER_IRQ_BASE + x, regs);
+						break;
+					}
+				}
+			} while ((status = get_irq_status()) != 0);
+		}
+		break;
+
+	case 3:
+		if ((status = get_fiq_status()) == 0) {
+			spurious_interrupt();
+			return;
+		} else {
+			u32 sr_old = read_c0_status();
+			u32 sr_new = sr_old & (~STATUSF_IP2); /* IP2 is assoicated with IRQ */
+
+			/* Mask out IRQ as FIQ > IRQ */
+			write_c0_status(sr_new);
+			do {
+				for (x = 0; status != 0; x++, status >>= 1) {
+					if ((status & 0x1) != 0) { /* Interrupt is here */
+						do_IRQ(FIQ_CONTROLLER_IRQ_BASE + x, regs);
+						break;
+					}
+				}
+			} while ((status = get_fiq_status()) != 0);
+			write_c0_status(sr_old);
+		}
+		break;
+
+	case 4:
+		if ((status = get_iiq_status()) == 0) {
+			spurious_interrupt();
+			return;
+		} else {
+			u32 sr_old = read_c0_status();
+			u32 sr_new = sr_old & (~(STATUSF_IP2|STATUSF_IP3)); /* IP3 is assoicated with FIQ */
+
+			/* Mask out FIQ/IRQ as IIQ > FIQ > IRQ */
+			write_c0_status(sr_new);
+			do {
+				for (x = 0; status != 0; x++, status >>= 1) {
+					if ((status & 0x1) != 0) { /* Interrupt is here */
+						do_IRQ(IIQ_CONTROLLER_IRQ_BASE + x, regs);
+						break;
+					}
+				}
+			} while ((status = get_iiq_status()) != 0);
+			write_c0_status(sr_old);
+		}
+		break;
+
+	case 7:
+		do_IRQ(7,regs);
+		return;
+
+	default:
+		emprintk("spurious %d\n",ipline);
+		spurious_interrupt();
+		return;
+	}
+}
+
+void __init init_IRQ(void)
+{
+	unsigned long rise = 0;
+	unsigned long fall = 0;
+	unsigned long edge_trig = 0;
+#if (EM86XX_REVISION > 3)
+	unsigned long rise_hi = 0;
+	unsigned long fall_hi = 0;
+	unsigned long edge_trig_hi = 0;
+#endif
+
+	// this hooks except_vec4 to tango2 assembly routine:
+	set_except_vector(0, tango2IRQ);
+
+	// irq_desc entries 0..7
+	mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
+
+	// cascade for irq controller (IP2,3,4=HW0,1,2)
+	tango2_irq_init(TANGO2_CTRLIRQ,IRQ_CONTROLLER_IRQ_BASE);
+	tango2_irq_init(TANGO2_CTRLFIQ,FIQ_CONTROLLER_IRQ_BASE);
+	tango2_irq_init(TANGO2_CTRLIIQ,IIQ_CONTROLLER_IRQ_BASE);
+
+	setup_irq(MIPS_CPU_IRQ_BASE+STATUSB_IP2-STATUSB_IP0, &cascade);
+	setup_irq(MIPS_CPU_IRQ_BASE+STATUSB_IP3-STATUSB_IP0, &cascade);
+	setup_irq(MIPS_CPU_IRQ_BASE+STATUSB_IP4-STATUSB_IP0, &cascade);
+
+#if (EM86XX_REVISION > 3)
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_irq_enableclr_hi,0xffffffff);
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_fiq_enableclr_hi,0xffffffff);
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_iiq_enableclr_hi,0xffffffff);
+#endif
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_irq_enableclr,0xffffffff);
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_fiq_enableclr,0xffffffff);
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_iiq_enableclr,0xffffffff);
+
+#ifdef CONFIG_KGDB
+ 	printk("Setting debug traps - please connect the remote debugger.\n");
+
+	set_debug_traps();
+
+	breakpoint();
+#endif
+
+	rise = gbus_read_uint32(pGBus, REG_BASE_cpu_block + CPU_edge_config_rise);
+	fall = gbus_read_uint32(pGBus, REG_BASE_cpu_block + CPU_edge_config_fall);
+	edge_trig = rise ^ fall;
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_edge_rawstat,edge_trig);
+#if (EM86XX_REVISION > 3)
+	rise_hi = gbus_read_uint32(pGBus, REG_BASE_cpu_block + CPU_edge_config_rise_hi);
+	fall_hi = gbus_read_uint32(pGBus, REG_BASE_cpu_block + CPU_edge_config_fall_hi);
+	edge_trig_hi = rise_hi ^ fall_hi;
+	gbus_write_uint32(pGBus,REG_BASE_cpu_block+CPU_edge_rawstat_hi,edge_trig_hi);
+#endif
+
+	return;
+}
+
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/tango2/Makefile linuxmips-2.4.30/arch/mips/tango2/Makefile
--- linuxmips-2.4.30.ref/arch/mips/tango2/Makefile	1969-12-31 16:00:00.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/tango2/Makefile	2007-06-20 14:01:27.000000000 -0700
@@ -0,0 +1,21 @@
+#
+# Makefile for SigmaDesigns Tango2 board
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+
+USE_STANDARD_AS_RULE := true
+
+O_TARGET:= tango2.o
+ 
+export-objs	+= prom.o delay.o
+ 
+obj-y    := tango2IRQ.o setup.o prom.o gbus_standalone.o irq.o tango2controllers.o delay.o 
+
+ifdef CONFIG_TANGO2_XENV
+obj-y	+= sha1sum.o xenv.o full_sha1.o
+endif
+
+include $(TOPDIR)/Rules.make
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/tango2/prom.c linuxmips-2.4.30/arch/mips/tango2/prom.c
--- linuxmips-2.4.30.ref/arch/mips/tango2/prom.c	1969-12-31 16:00:00.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/tango2/prom.c	2007-06-20 14:01:27.000000000 -0700
@@ -0,0 +1,1018 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, [e-mail] or [e-mail]
+ *
+ * arch/mips/tango2/prom.c
+ *     prom setup file for tango2
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ ***********************************************************************
+ */
+
+#include <linux/init.h>
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/wbflush.h>
+
+#include <asm/tango2/tango2.h>
+#include <asm/tango2/rmdefs.h>
+#include <asm/tango2/memcfg.h>
+#include <asm/tango2/sigblock.h>
+#include <asm/tango2/zboot.h>
+
+#ifdef CONFIG_TANGO2_XENV
+#include "xenv.h"
+#include "xenvkeys.h"
+#endif
+
+char arcs_cmdline[CL_SIZE];
+unsigned long em8xxx_cpu_frequency = 0L;
+unsigned long em8xxx_sys_frequency = 0L;
+unsigned long em8xxx_kmem_start = 0L;
+unsigned long em8xxx_kmem_size = 0L;
+
+#if defined(CONFIG_TANGO2_SIG_BLOCK)
+struct signature_block *sigptr = NULL;
+static struct signature_block sigblock;
+#elif defined(CONFIG_TANGO2_XENV)
+
+#define REMAPPED_REG	CPU_remap4
+#define REMAPPED_BASE	KSEG1ADDR(CPU_remap4_address) 
+
+#define XENV_MAX_FLASH_PARTITIONS   16
+