1010.pci.patch

sm86xx内核源包括补丁（ GPL ）的

diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/mm/init.c linuxmips-2.4.30/arch/mips/mm/init.c
--- linuxmips-2.4.30.ref/arch/mips/mm/init.c	2003-12-11 13:07:56.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/mm/init.c	2007-01-09 13:04:02.000000000 -0800
@@ -240,17 +240,32 @@
 	unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
 	unsigned long max_dma, high, low;
 
+#if defined(CONFIG_TANGO2) && defined(CONFIG_PCI)
+	extern unsigned long em8xxx_kmem_start;
+	extern unsigned long em8xxx_kmem_size;
+	extern int tango2_pci_host_enabled(void);
+#endif
+
 	pagetable_init();
 
 #ifdef CONFIG_HIGHMEM
 	kmap_init();
 #endif
 
-	max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
 	low = max_low_pfn;
 	high = highend_pfn;
 
-#ifdef CONFIG_ISA
+#if defined(CONFIG_TANGO2) && defined(CONFIG_PCI)
+	/* If PCI is used, then limit DMA memory to ~112MB if kernel memory is > 112MB */
+	if (tango2_pci_host_enabled() && (em8xxx_kmem_size>(112<<20))) 
+		max_dma = virt_to_phys((char *)((em8xxx_kmem_start+(112<<20))&0xfff00000)) >> PAGE_SHIFT;
+	else
+		max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
+#else
+	max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
+#endif /* CONFIG_TANGO2 && CONFIG_PCI */
+
+#if defined(CONFIG_ISA) || (defined(CONFIG_TANGO2) && defined(CONFIG_PCI))
 	if (low < max_dma)
 		zones_size[ZONE_DMA] = low;
 	else {
@@ -260,6 +275,7 @@
 #else
 	zones_size[ZONE_DMA] = low;
 #endif
+
 #ifdef CONFIG_HIGHMEM
 	if (cpu_has_dc_aliases) {
 		printk(KERN_WARNING "This processor doesn't support highmem.");
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/pci/pci_auto.c linuxmips-2.4.30/arch/mips/pci/pci_auto.c
--- linuxmips-2.4.30.ref/arch/mips/pci/pci_auto.c	2003-06-27 19:26:25.000000000 -0700
+++ linuxmips-2.4.30/arch/mips/pci/pci_auto.c	2007-01-09 13:01:43.000000000 -0800
@@ -41,7 +41,7 @@
 
 #include <asm/pci_channel.h>
 
-#define	DEBUG
+//#define DEBUG
 #ifdef 	DEBUG
 #define	DBG(x...)	printk(x)
 #else
@@ -188,9 +188,25 @@
 			continue;
 		}
 
+#ifdef CONFIG_TANGO2
+		{
+			u32 val = bar_value;
+			if (bar_response & PCI_BASE_ADDRESS_SPACE) 
+			// adjust address between GBUS and PCI bus (PCI I/O)
+				val -= MEMORY_BASE_PCI_CONFIG;
+			else
+			// adjust address between GBUS and PCI bus (PCI memory)
+				val -= MEMORY_BASE_PCI_MEMORY;
+
+			/* Write it out and update our limit */
+			early_write_config_dword(hose, top_bus, current_bus, 
+				pci_devfn, bar, val);
+		}
+#else
 		/* Write it out and update our limit */
 		early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
 					 bar, bar_value);
+#endif
 
 		*lower_limit = bar_value + bar_size;
 
@@ -400,13 +416,15 @@
 		if (PCI_FUNC(pci_devfn) && !found_multi)
 			continue;
 
-		early_read_config_word(hose, top_bus, current_bus, pci_devfn,
-				       PCI_VENDOR_ID, &vid);
+		if (early_read_config_word(hose, top_bus, current_bus, 
+			pci_devfn, PCI_VENDOR_ID, &vid) != PCIBIOS_SUCCESSFUL)
+			continue;
 
 		if (vid == 0xffff) continue;
 
-		early_read_config_byte(hose, top_bus, current_bus, pci_devfn,
-				       PCI_HEADER_TYPE, &header_type);
+		if (early_read_config_byte(hose, top_bus, current_bus, 
+			pci_devfn, PCI_HEADER_TYPE, &header_type) != PCIBIOS_SUCCESSFUL)
+			continue;
 
 		if (!PCI_FUNC(pci_devfn))
 			found_multi = header_type & 0x80;
@@ -479,6 +497,7 @@
 					 PCI_COMMAND, cmdstat | PCI_COMMAND_IO |
 					 PCI_COMMAND_MEMORY |
 					 PCI_COMMAND_MASTER);
+
 		early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
 					PCI_LATENCY_TIMER, 0x80);
 
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/pci/pci.c linuxmips-2.4.30/arch/mips/pci/pci.c
--- linuxmips-2.4.30.ref/arch/mips/pci/pci.c	2004-03-16 07:03:32.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/pci/pci.c	2007-01-09 13:01:43.000000000 -0800
@@ -89,6 +89,18 @@
 
 char * __devinit pcibios_setup(char *str)
 {
+	extern int pci_enabled;
+
+	if (strcmp(str, "disabled") == 0) {
+		pci_enabled = 0;
+		return(NULL);
+	} else if (strcmp(str, "off") == 0) {
+		pci_enabled = 0;
+		return(NULL);
+	} else if (strcmp(str, "on") == 0) {
+		pci_enabled = 1;
+		return(NULL);
+	}
 	return str;
 }
 
@@ -199,6 +211,11 @@
 	struct pci_bus *bus;
 	int busno;
 
+#ifdef CONFIG_TANGO2
+	extern void __init tango2_pcibios_init(void);
+	tango2_pcibios_init();
+#endif
+
 #ifdef CONFIG_PCI_AUTO
 	/* assign resources */
 	busno=0;
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/tango2/Makefile linuxmips-2.4.30/arch/mips/tango2/Makefile
--- linuxmips-2.4.30.ref/arch/mips/tango2/Makefile	2007-01-09 12:55:21.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/tango2/Makefile	2007-01-09 13:01:43.000000000 -0800
@@ -18,4 +18,9 @@
 obj-y	+= sha1sum.o xenv.o full_sha1.o
 endif
 
+ifdef CONFIG_PCI
+export-objs	+= pci.o
+obj-y		+= pci.o pci_fixups.o
+endif
+
 include $(TOPDIR)/Rules.make
diff -Naur --exclude=CVS --exclude='*.o' --exclude='*.a' --exclude='*.so' --exclude='*.elf' --exclude=System.map --exclude=Makefile.d --exclude='*log' --exclude='*log2' --exclude='*~' --exclude='.*~' --exclude='.#*' --exclude='*.bak' --exclude='*.orig' --exclude='*.rej' --exclude='core.[0-9]*' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=.depend --exclude='.*.o.flags' --exclude='*.gz' --exclude=vmlinux --exclude=vmlinux.bin --exclude=yamon-02.06-SIGMADESIGNS-01_el.bin linuxmips-2.4.30.ref/arch/mips/tango2/pci.c linuxmips-2.4.30/arch/mips/tango2/pci.c
--- linuxmips-2.4.30.ref/arch/mips/tango2/pci.c	1969-12-31 16:00:00.000000000 -0800
+++ linuxmips-2.4.30/arch/mips/tango2/pci.c	2007-01-09 13:02:14.000000000 -0800
@@ -0,0 +1,356 @@
+/*****************************************
+ Copyright 漏 2001-2003  
+ Sigma Designs, Inc. All Rights Reserved
+ Proprietary and Confidential
+ *****************************************/
+/**
+  @file   pci.c
+  @brief  
+
+  PCI support for Tango2.
+
+  @author YH Lin
+  @date   2005-01-20
+*/
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/module.h>
+                                                                                
+#include <asm/pci_channel.h>
+#include <asm/debug.h>
+
+#include <asm/tango2/rmdefs.h>
+#include <asm/tango2/hardware.h>
+
+#define PCIEM86XX_ARBITER_LEVEL         0x00
+#define PCIEM86XX_ARBITER_GRANTTIMEOUT  0x10101010
+
+#define PCIEM86XX_IDSEL_MAX	0x05
+#define PCIEM86XX_IDSEL_BITS	0x03
+
+#if defined(CONFIG_TANGO2_SIG_BLOCK) || defined(CONFIG_TANGO2_XENV)
+extern int tango2_pci_host_enabled(void);
+extern int tango2_pcidev_enabled(const int pci_idsel);
+#endif
+
+static int tango2_pci_read_config_byte(struct pci_dev *dev, int where, u8 *value);
+static int tango2_pci_read_config_word(struct pci_dev *dev, int where, u16 *value);
+static int tango2_pci_read_config_dword(struct pci_dev *dev, int where, u32 *value);
+static int tango2_pci_write_config_byte(struct pci_dev *dev, int where, u8 value);
+static int tango2_pci_write_config_word(struct pci_dev *dev, int where, u16 value);
+static int tango2_pci_write_config_dword(struct pci_dev *dev, int where, u32 value);
+                                                                                
+struct pci_ops tango2_ext_pci_ops = {
+    tango2_pci_read_config_byte,
+    tango2_pci_read_config_word,
+    tango2_pci_read_config_dword,
+    tango2_pci_write_config_byte,
+    tango2_pci_write_config_word,
+    tango2_pci_write_config_dword,
+};
+
+static struct resource extpci_io_resource = {
+	"PCI IO space",
+	MEMORY_BASE_PCI_IO,
+	MEMORY_BASE_PCI_IO + 0x08000000 - 1,
+	IORESOURCE_IO
+};
+
+static struct resource extpci_mem_resource = {
+	"PCI MEM space",
+	MEMORY_BASE_PCI_MEMORY,
+	MEMORY_BASE_PCI_MEMORY + 0x20000000 - 1,
+	IORESOURCE_MEM
+};
+
+struct pci_channel mips_pci_channels[] = {
+	{ &tango2_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource },
+	{ NULL, NULL, NULL }
+};
+
+static int g_last_idsel = -1;
+static int g_idsel_exist[PCIEM86XX_IDSEL_MAX] = { 0, 0, 0, 0, 0 };
+static int g_idsel_func_exist[PCIEM86XX_IDSEL_MAX * 8];
+
+extern unsigned long em8xxx_kmem_start;
+extern unsigned long em8xxx_kmem_size;
+
+unsigned long g_pcimem_busaddr = PCIBIOS_MIN_MEM_EM86XX - MEMORY_BASE_PCI_MEMORY;
+unsigned long g_pcimem_phyaddr = 0;
+unsigned long g_pcimem_phyaddr_end = 0;
+
+unsigned long tango2_pci_config_base = 0;
+static unsigned long tango2_pci_io_base = 0;
+//static unsigned long tango2_pci_mem_base = 0;
+
+#define PCIEM86XX_CONFIG_START                                              \
+    unsigned long flags;                                                    \
+    int idsel = PCI_SLOT(dev->devfn), func = PCI_FUNC(dev->devfn);          \
+                                                                            \
+    if (idsel >= PCIEM86XX_IDSEL_MAX || !g_idsel_exist[idsel] || !g_idsel_func_exist[idsel * 8 + func])              \
+        return PCIBIOS_DEVICE_NOT_FOUND;                                    \
+    local_irq_save(flags);
+                                                                                
+#define PCIEM86XX_CONFIG_END                                                \
+    local_irq_restore(flags);                                               \
+    return PCIBIOS_SUCCESSFUL;
+                                                                                
+#define PCIEM86XX_CONFIG_READ(x, type, size)                                \
+    static int tango2_pci_read_config_##type(struct pci_dev *dev, int where, u##size *value) \
+    {                                                                       \
+        PCIEM86XX_CONFIG_START                                              \
+        *value = __raw_read##x(tango2_pci_config_base + ((func << 8) | where | (idsel << 11) | (dev->bus->number << 16)));\
+        {                                                   \
+            unsigned long data = (gbus_read_uint8(pGBus, REG_BASE_host_interface + PCI_host_reg2 + 3) >> 1) & 0x3;   \
+            if (data) { /* bus fault */                                     \
+if (0) printk("PCI Bus fault detected 0x%x\n", data); \
+		g_idsel_func_exist[idsel * 8 + func] = 0; \
+                gbus_write_uint8(pGBus, REG_BASE_host_interface + PCI_host_reg2 + 3, 1); \
+                gbus_write_uint8(pGBus, REG_BASE_host_interface + PCI_host_reg2 + 3, 0); \
+                return PCIBIOS_DEVICE_NOT_FOUND;                            \
+            }                                                               \
+        }                                                                   \
+        PCIEM86XX_CONFIG_END                                                \
+    }
+                                                                                
+#define PCIEM86XX_CONFIG_WRITE(x, type, size)                               \
+    static int tango2_pci_write_config_##type(struct pci_dev *dev, int where, u##size value) \
+    {                                                                       \
+        PCIEM86XX_CONFIG_START                                              \
+        __raw_write##x(value, tango2_pci_config_base + ((func << 8) | where | (idsel << 11) | (dev->bus->number << 16)));    \
+        PCIEM86XX_CONFIG_END \
+    }
+                                                                                
+PCIEM86XX_CONFIG_READ(b, byte, 8)
+PCIEM86XX_CONFIG_READ(w, word, 16)
+PCIEM86XX_CONFIG_READ(l, dword, 32)
+                                                                                
+PCIEM86XX_CONFIG_WRITE(b, byte, 8)
+PCIEM86XX_CONFIG_WRITE(w, word, 16)
+PCIEM86XX_CONFIG_WRITE(l, dword, 32)
+
+static void tango2_pci_busfault_intr(int irq, void *devinfo, struct pt_regs *regs);
+
+// return 0 if device not found
+// return vendorid:deviceid if device found
+static unsigned int tango2_pci_select(int idsel)
+{
+    unsigned int data, pciid;
+                                                                                
+    g_last_idsel = idsel;
+    gbus_write_uint16(pGBus, REG_BASE_host_interface + PCI_host_reg2, idsel << 8);
+    pciid = __raw_readl(tango2_pci_config_base);
+    data = (gbus_read_uint8(pGBus, REG_BASE_host_interface + PCI_host_reg2 + 3) >> 1) & 0x3;
+                                                                                
+    if (data == 0) {
+        return pciid;
+    } else {
+        // clears PCI bus fault flags
+        gbus_write_uint8(pGBus, REG_BASE_host_interface + PCI_host_reg2 + 3, 1);
+        gbus_write_uint8(pGBus, REG_BASE_host_interface + PCI_host_reg2 + 3, 0);
+        return 0;
+    }
+}
+
+static int __init tango2_pci_init(void)
+{
+	int i, idsel; 
+	unsigned pciid = 0;
+
+    // Set to PCI host