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📄 rxinit.asm

📁 MIMO 2x2接收端选择全系统仿真代码
💻 ASM
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;** 709	-----------------------    CSU$temp$src = *((volatile unsigned *)C$7+4);  // [18]
;** 710	-----------------------    CSU$temp$cnt = *((volatile unsigned *)C$7+8);  // [18]
;** 711	-----------------------    CSU$temp$dst = *((volatile unsigned *)C$7+12);  // [18]
;** 712	-----------------------    U$8 = (volatile unsigned *)((unsigned)C$6+27262992);  // [18]
;** 712	-----------------------    CSU$temp$idx = *U$8;  // [18]
;** 279	-----------------------    CSR = CSR&0xfffffffeu|gie&1u;  // [7]
;** 645	-----------------------    U$28 = hEdmaXmt;  // [17]
;** 274	-----------------------    K$2 = 0xfffffffeu;  // [6]
;** 645	-----------------------    if ( (U$28 == 0x20000000u)|(U$28 == 0x10000000u) ) goto g2;  // [17]
           STW     .D2T2   B10,*SP--(8)      ; |466| 
           STW     .D2T2   B3,*+SP(4)        ; |466| 
           MVC     .S2     CSR,B4            ; |273| 
           AND     .S2     1,B4,B4           ; |273| 
           MVC     .S2     CSR,B5            ; |274| 
           AND     .S2     -2,B5,B5          ; |274| 
           MVC     .S2     B5,CSR            ; |274| 
           MVKL    .S2     _hEdmaReloadXmtPing,B5 ; |708| 
           MVKH    .S2     _hEdmaReloadXmtPing,B5 ; |708| 
           LDHU    .D2T1   *B5,A3            ; |708| 
           ZERO    .D2     B5                ; |708| 
           MVKH    .S2     0x1a00000,B5      ; |708| 
           NOP             2
           ADD     .S1X    B5,A3,A0          ; |708| 
           LDW     .D1T2   *A0,B5            ; |708| 
           LDW     .D1T2   *+A0(4),B8        ; |709| 
           LDW     .D1T2   *+A0(8),B6        ; |710| 
           LDW     .D1T1   *+A0(12),A4       ; |711| 
           MVKL    .S1     0x1a00010,A0      ; |712| 
           MVKH    .S1     0x1a00010,A0      ; |712| 
           ADD     .D1     A0,A3,A0          ; |712| 
           LDW     .D1T1   *A0,A3            ; |712| 
           MVC     .S2     CSR,B7            ; |279| 

           AND     .S2     1,B4,B7           ; |279| 
||         AND     .L2     -2,B7,B4          ; |279| 

           OR      .S2     B7,B4,B4          ; |279| 
           MVC     .S2     B4,CSR            ; |279| 
           MVKL    .S1     _hEdmaXmt,A5      ; |645| 
           MVKH    .S1     _hEdmaXmt,A5      ; |645| 
           LDW     .D1T2   *A5,B4            ; |645| 
           NOP             1
           MVK     .S2     0xfffffffe,B10    ; |274| 

           ZERO    .D1     A5                ; |645| 
||         ZERO    .D2     B7                ; |645| 

           MVKH    .S1     0x10000000,A5     ; |645| 
||         MVKH    .S2     0x20000000,B7     ; |645| 

           CMPEQ   .L1X    B4,A5,A5          ; |645| 
||         CMPEQ   .L2     B4,B7,B7          ; |645| 

           OR      .S2X    A5,B7,B0          ; |645| 
   [ B0]   B       .S1     L1                ; |645| 
           NOP             5
           ; BRANCH OCCURS                   ; |645| 
;** --------------------------------------------------------------------------*
;** 273	-----------------------    gie = CSR&1u;  // [6]
;** 274	-----------------------    CSR = CSR&0xfffffffeu;  // [6]
;** 651	-----------------------    x0 = CSU$temp$opt;  // [17]
;** 653	-----------------------    x2 = CSU$temp$cnt;  // [17]
;** 654	-----------------------    x3 = CSU$temp$dst;  // [17]
;** 655	-----------------------    x4 = CSU$temp$idx;  // [17]
;** 656	-----------------------    x5 = U$8[1];  // [17]
;** 660	-----------------------    C$5 = (unsigned)(unsigned short)U$28+0x1a00000u;  // [17]
;** 660	-----------------------    *((volatile unsigned *)C$5+4) = CSU$temp$src;  // [17]
;** 661	-----------------------    *((volatile unsigned *)C$5+8) = x2;  // [17]
;** 662	-----------------------    *((volatile unsigned *)C$5+12) = x3;  // [17]
;** 663	-----------------------    *((volatile unsigned *)C$5+16) = x4;  // [17]
;** 664	-----------------------    *((volatile unsigned *)C$5+20) = x5;  // [17]
;** 665	-----------------------    *(volatile unsigned *)C$5 = x0;  // [17]
;** 279	-----------------------    CSR = CSR&0xfffffffeu|gie&1u;  // [7]
;** 666	-----------------------    goto g3;  // [17]
           MVC     .S2     CSR,B7            ; |273| 
           AND     .S2     1,B7,B7           ; |273| 
           MVC     .S2     CSR,B9            ; |274| 
           AND     .S2     -2,B9,B9          ; |274| 
           MVC     .S2     B9,CSR            ; |274| 
           LDW     .D1T1   *+A0(4),A0        ; |656| 

           ZERO    .D2     B4                ; |660| 
||         EXTU    .S2     B4,16,16,B9       ; |660| 

           MVKH    .S2     0x1a00000,B4      ; |660| 
           ADD     .D2     B4,B9,B4          ; |660| 
           STW     .D2T2   B8,*+B4(4)        ; |660| 
           STW     .D2T2   B6,*+B4(8)        ; |661| 
           STW     .D2T1   A4,*+B4(12)       ; |662| 
           STW     .D2T1   A3,*+B4(16)       ; |663| 
           STW     .D2T1   A0,*+B4(20)       ; |664| 
           STW     .D2T2   B5,*B4            ; |665| 
           MVC     .S2     CSR,B4            ; |279| 

           AND     .S2     1,B7,B5           ; |279| 
||         AND     .L2     -2,B4,B4          ; |279| 

           OR      .S2     B5,B4,B4          ; |279| 
           MVC     .S2     B4,CSR            ; |279| 
           B       .S1     L2                ; |666| 
           NOP             5
           ; BRANCH OCCURS                   ; |666| 
;** --------------------------------------------------------------------------*
L1:    
;**	-----------------------g2:
;** 273	-----------------------    gie = CSR&1u;  // [6]
;** 274	-----------------------    CSR = CSR&K$2;  // [6]
;** 733	-----------------------    *(volatile unsigned *)0x2000004u = CSU$temp$src;  // [19]
;** 734	-----------------------    *(base = (volatile unsigned *)0x2000008) = CSU$temp$cnt;  // [19]
;** 735	-----------------------    base[1] = CSU$temp$dst;  // [19]
;** 736	-----------------------    base[2] = CSU$temp$idx;  // [19]
;** 737	-----------------------    base[6] = CSU$temp$opt;  // [19]
;** 279	-----------------------    CSR = CSR&K$2|gie&1u;  // [7]
           MVC     .S2     CSR,B4            ; |273| 
           AND     .S2     1,B4,B4           ; |273| 
           MVC     .S2     CSR,B7            ; |274| 
           AND     .S2     B10,B7,B7         ; |274| 
           MVC     .S2     B7,CSR            ; |274| 
           MVKL    .S2     0x2000004,B7      ; |733| 
           MVKH    .S2     0x2000004,B7      ; |733| 
           STW     .D2T2   B8,*B7            ; |733| 
           MVKL    .S1     0x2000008,A0      ; |734| 
           MVKH    .S1     0x2000008,A0      ; |734| 
           STW     .D1T2   B6,*A0            ; |734| 
           STW     .D1T1   A4,*+A0(4)        ; |735| 
           STW     .D1T1   A3,*+A0(8)        ; |736| 
           STW     .D1T2   B5,*+A0(24)       ; |737| 
           MVC     .S2     CSR,B5            ; |279| 

           AND     .S2     B10,B5,B5         ; |279| 
||         AND     .L2     1,B4,B4           ; |279| 

           OR      .S2     B4,B5,B4          ; |279| 
           MVC     .S2     B4,CSR            ; |279| 
;** --------------------------------------------------------------------------*
L2:    
;**	-----------------------g3:
;** 273	-----------------------    gie = CSR&1u;  // [6]
;** 274	-----------------------    CSR = CSR&K$2;  // [6]
;** 708	-----------------------    C$4 = (unsigned)(unsigned short)hEdmaReloadRcvPing+(K$6 = 0x1a00000u);  // [18]
;** 708	-----------------------    CSU$temp$opt = *(volatile unsigned *)C$4;  // [18]
;** 709	-----------------------    CSU$temp$src = *((volatile unsigned *)C$4+4);  // [18]
;** 710	-----------------------    CSU$temp$cnt = *((volatile unsigned *)C$4+8);  // [18]
;** 711	-----------------------    CSU$temp$dst = *((volatile unsigned *)C$4+12);  // [18]
;** 712	-----------------------    U$86 = (volatile unsigned *)(C$4+16);  // [18]
;** 712	-----------------------    CSU$temp$idx = *U$86;  // [18]
;** 279	-----------------------    CSR = CSR&K$2|gie&1u;  // [7]
;** 645	-----------------------    U$97 = hEdmaRcv;  // [17]
;** 645	-----------------------    if ( (U$97 == (K$29 = 0x20000000u))|(U$97 == (K$31 = 0x10000000u)) ) goto g5;  // [17]
           MVC     .S2     CSR,B4            ; |273| 
           AND     .S2     1,B4,B5           ; |273| 
           MVC     .S2     CSR,B4            ; |274| 
           AND     .S2     B10,B4,B4         ; |274| 
           MVC     .S2     B4,CSR            ; |274| 
           MVKL    .S1     _hEdmaReloadRcvPing,A0 ; |708| 
           MVKH    .S1     _hEdmaReloadRcvPing,A0 ; |708| 
           LDHU    .D1T1   *A0,A0            ; |708| 
           ZERO    .D2     B9                ; |708| 
           MVKH    .S2     0x1a00000,B9      ; |708| 
           NOP             2
           ADD     .S1X    B9,A0,A0          ; |708| 
           LDW     .D1T2   *A0,B1            ; |708| 
           LDW     .D1T2   *+A0(4),B8        ; |709| 
           LDW     .D1T1   *+A0(8),A6        ; |710| 
           LDW     .D1T1   *+A0(12),A5       ; |711| 
           ADD     .D1     A0,16,A4          ; |712| 
           LDW     .D1T2   *A4,B7            ; |712| 
           MVC     .S2     CSR,B4            ; |279| 

           AND     .S2     B10,B4,B4         ; |279| 
||         AND     .L2     1,B5,B5           ; |279| 

           OR      .S2     B5,B4,B4          ; |279| 
           MVC     .S2     B4,CSR            ; |279| 
           MVKL    .S2     _hEdmaRcv,B4      ; |645| 
           MVKH    .S2     _hEdmaRcv,B4      ; |645| 
           LDW     .D2T2   *B4,B4            ; |645| 
           ZERO    .D1     A3                ; |645| 
           ZERO    .D1     A0                ; |645| 
           MVKH    .S1     0x10000000,A3     ; |645| 
           MVKH    .S1     0x20000000,A0     ; |645| 

           CMPEQ   .L1X    B4,A3,A0          ; |645| 
||         CMPEQ   .L2X    B4,A0,B5          ; |645| 

           OR      .S2X    A0,B5,B0          ; |645| 
   [ B0]   B       .S1     L3                ; |645| 
           NOP             5
           ; BRANCH OCCURS                   ; |645| 
;** --------------------------------------------------------------------------*
;** 273	-----------------------    gie = CSR&1u;  // [6]
;** 274	-----------------------    CSR = CSR&K$2;  // [6]
;** 651	-----------------------    x0 = CSU$temp$opt;  // [17]
;** 653	-----------------------    x2 = CSU$temp$cnt;  // [17]
;** 654	-----------------------    x3 = CSU$temp$dst;  // [17]
;** 655	-----------------------    x4 = CSU$temp$idx;  // [17]
;** 656	-----------------------    x5 = U$86[1];  // [17]
;** 660	-----------------------    C$3 = (unsigned)(unsigned short)U$97+K$6;  // [17]
;** 660	-----------------------    *((volatile unsigned *)C$3+4) = CSU$temp$src;  // [17]
;** 661	-----------------------    *((volatile unsigned *)C$3+8) = x2;  // [17]
;** 662	-----------------------    *((volatile unsigned *)C$3+12) = x3;  // [17]
;** 663	-----------------------    *((volatile unsigned *)C$3+16) = x4;  // [17]
;** 664	-----------------------    *((volatile unsigned *)C$3+20) = x5;  // [17]
;** 665	-----------------------    *(volatile unsigned *)C$3 = x0;  // [17]
;** 279	-----------------------    CSR = CSR&K$2|gie&1u;  // [7]
;** 666	-----------------------    goto g6;  // [17]
           MVC     .S2     CSR,B5            ; |273| 
           AND     .S2     1,B5,B6           ; |273| 
           MVC     .S2     CSR,B5            ; |274| 
           AND     .S2     B10,B5,B5         ; |274| 
           MVC     .S2     B5,CSR            ; |274| 
           MV      .D2     B1,B5             ; |651| 
           LDW     .D1T1   *+A4(4),A0        ; |656| 
           EXTU    .S2     B4,16,16,B4       ; |660| 
           ADD     .D2     B9,B4,B4          ; |660| 
           STW     .D2T2   B8,*+B4(4)        ; |660| 
           STW     .D2T1   A6,*+B4(8)        ; |661| 
           STW     .D2T1   A5,*+B4(12)       ; |662| 
           STW     .D2T2   B7,*+B4(16)       ; |663| 
           STW     .D2T1   A0,*+B4(20)       ; |664| 
           STW     .D2T2   B5,*B4            ; |665| 
           MVC     .S2     CSR,B4            ; |279| 

           AND     .S2     1,B6,B5           ; |279| 
||         AND     .L2     B10,B4,B4         ; |279| 

           OR      .S2     B5,B4,B4          ; |279| 
           MVC     .S2     B4,CSR            ; |279| 
           B       .S1     L4                ; |666| 
           NOP             5
           ; BRANCH OCCURS                   ; |666| 
;** --------------------------------------------------------------------------*
L3:    
;**	-----------------------g5:
;** 273	-----------------------    gie = CSR&1u;  // [6]
;** 274	-----------------------    CSR = CSR&K$2;  // [6]
;** 733	-----------------------    *(volatile unsigned *)0x2000004u = CSU$temp$src;  // [19]
;** 734	-----------------------    *(base = (volatile unsigned *)0x2000008) = CSU$temp$cnt;  // [19]
;** 735	-----------------------    base[1] = CSU$temp$dst;  // [19]
;** 736	-----------------------    base[2] = CSU$temp$idx;  // [19]
;** 737	-----------------------    base[6] = CSU$temp$opt;  // [19]
;** 279	-----------------------    CSR = CSR&K$2|gie&1u;  // [7]
           MVC     .S2     CSR,B4            ; |273| 
           AND     .S2     1,B4,B4           ; |273| 
           MVC     .S2     CSR,B5            ; |274| 
           AND     .S2     B10,B5,B5         ; |274| 
           MVC     .S2     B5,CSR            ; |274| 
           MVKL    .S2     0x2000004,B5      ; |733| 
           MVKH    .S2     0x2000004,B5      ; |733| 
           STW     .D2T2   B8,*B5            ; |733| 
           MVKL    .S1     0x2000008,A0      ; |734| 
           MVKH    .S1     0x2000008,A0      ; |734| 
           STW     .D1T1   A6,*A0            ; |734| 
           STW     .D1T1   A5,*+A0(4)        ; |735| 
           STW     .D1T2   B7,*+A0(8)        ; |736| 
           STW     .D1T2   B1,*+A0(24)       ; |737| 
           MVC     .S2     CSR,B5            ; |279| 

           AND     .S2     1,B4,B5           ; |279| 
||         AND     .L2     B10,B5,B4         ; |279| 

           OR      .S2     B5,B4,B4          ; |279| 
           MVC     .S2     B4,CSR            ; |279| 
;** --------------------------------------------------------------------------*
L4:    
;**	-----------------------g6:
;** 479	-----------------------    pingOrPong = 0u;
;** 480	-----------------------    xmtdone = 0;
;** 481	-----------------------    rcvdone = 0;
;** 483	-----------------------    AIC23_setParams(&AIC23config);
;** 581	-----------------------    *(volatile unsigned *)0x1a0ffe4u = C$2 = 1u<<(unsigned)gXmtChan;  // [14]
;** 581	-----------------------    *(volatile unsigned *)0x1a0ffe4u = C$1 = 1u<<(unsigned)gRcvChan;  // [14]
;** 273	-----------------------    gie = CSR&1u;  // [6]
;** 274	-----------------------    CSR = CSR&K$2;  // [6]

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