📄 rxinit.asm
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;******************************************************************************
;* TMS320C6x C/C++ Codegen PC Version 4.36 *
;* Date/Time created: Wed Jun 01 13:32:20 2005 *
;******************************************************************************
;******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C671x *
;* Optimization : Enabled at level 3 *
;* Optimizing for : Speed *
;* Based on options: -o3, no -ms *
;* Endian : Little *
;* Interrupt Thrshld : Disabled *
;* Memory Model : Large *
;* Calls to RTS : Far *
;* Pipelining : Enabled *
;* Speculative Load : Disabled *
;* Memory Aliases : Presume are aliases (pessimistic) *
;* Debug Info : COFF Debug *
;* *
;******************************************************************************
.asg A15, FP
.asg B14, DP
.asg B15, SP
.global $bss
.file "rxinit.c"
_hEdmaXmt: .usect ".far",4,4
.sym _hEdmaXmt,_hEdmaXmt, 14, 3, 32
_hEdmaReloadXmtPing: .usect ".far",4,4
.sym _hEdmaReloadXmtPing,_hEdmaReloadXmtPing, 14, 3, 32
_hEdmaReloadXmtPong: .usect ".far",4,4
.sym _hEdmaReloadXmtPong,_hEdmaReloadXmtPong, 14, 3, 32
_hEdmaRcv: .usect ".far",4,4
.sym _hEdmaRcv,_hEdmaRcv, 14, 3, 32
_hEdmaReloadRcvPing: .usect ".far",4,4
.sym _hEdmaReloadRcvPing,_hEdmaReloadRcvPing, 14, 3, 32
_hEdmaReloadRcvPong: .usect ".far",4,4
.sym _hEdmaReloadRcvPong,_hEdmaReloadRcvPong, 14, 3, 32
_hMcbsp1: .usect ".far",4,4
.sym _hMcbsp1,_hMcbsp1, 24, 3, 32, $$fake1
_gXmtChan: .usect ".far",2,2
.sym _gXmtChan,_gXmtChan, 3, 3, 16
_gRcvChan: .usect ".far",2,2
.sym _gRcvChan,_gRcvChan, 3, 3, 16
.sect ".cinit"
.align 8
.field 4,32
.field _pingOrPong+0,32
.field 0,32 ; _pingOrPong @ 0
.sect ".text"
_pingOrPong: .usect ".far",4,4
.sym _pingOrPong,_pingOrPong, 14, 3, 32
.sect ".cinit"
.align 8
.field 2,32
.field _xmtdone+0,32
.field 0,16 ; _xmtdone @ 0
.sect ".text"
_xmtdone: .usect ".far",2,2
.sym _xmtdone,_xmtdone, 3, 3, 16
.sect ".cinit"
.align 8
.field 2,32
.field _rcvdone+0,32
.field 0,16 ; _rcvdone @ 0
.sect ".text"
_rcvdone: .usect ".far",2,2
.sym _rcvdone,_rcvdone, 3, 3, 16
.sect ".cinit"
.align 8
.field 4,32
.field _firstCall+0,32
.field 1,32 ; _firstCall @ 0
.sect ".text"
_firstCall: .usect ".far",4,4
.sym _firstCall,_firstCall, 4, 3, 32
.sect ".cinit"
.align 8
.field IR_1,32
.field _gEdmaConfigXmt+0,32
.field 688914434,32 ; _gEdmaConfigXmt._opt @ 0
.field _gBufferXmtPing,32 ; _gEdmaConfigXmt._src @ 32
.field 1024,32 ; _gEdmaConfigXmt._cnt @ 64
.field 0,32 ; _gEdmaConfigXmt._dst @ 96
.field 0,32 ; _gEdmaConfigXmt._idx @ 128
.field 0,32 ; _gEdmaConfigXmt._rld @ 160
IR_1: .set 24
.sect ".text"
_gEdmaConfigXmt: .usect ".far",24,4
.sym _gEdmaConfigXmt,_gEdmaConfigXmt, 8, 3, 192, $$fake0
.sect ".cinit"
.align 8
.field IR_2,32
.field _gEdmaConfigRcv+0,32
.field 674234370,32 ; _gEdmaConfigRcv._opt @ 0
.field 0,32 ; _gEdmaConfigRcv._src @ 32
.field 1024,32 ; _gEdmaConfigRcv._cnt @ 64
.field _gBufferRcvPing,32 ; _gEdmaConfigRcv._dst @ 96
.field 0,32 ; _gEdmaConfigRcv._idx @ 128
.field 0,32 ; _gEdmaConfigRcv._rld @ 160
IR_2: .set 24
.sect ".text"
_gEdmaConfigRcv: .usect ".far",24,4
.sym _gEdmaConfigRcv,_gEdmaConfigRcv, 8, 3, 192, $$fake0
.sect ".cinit"
.align 8
.field IR_3,32
.field _mcbspCfg1+0,32
.field 0,32 ; _mcbspCfg1._spcr @ 0
.field 320,32 ; _mcbspCfg1._rcr @ 32
.field 320,32 ; _mcbspCfg1._xcr @ 64
.field 536870913,32 ; _mcbspCfg1._srgr @ 96
.field 0,32 ; _mcbspCfg1._mcr @ 128
.field 0,32 ; _mcbspCfg1._rcer @ 160
.field 0,32 ; _mcbspCfg1._xcer @ 192
.field 3,32 ; _mcbspCfg1._pcr @ 224
IR_3: .set 32
.sect ".text"
_mcbspCfg1: .usect ".far",32,4
.sym _mcbspCfg1,_mcbspCfg1, 8, 3, 256, $$fake2
.sect ".cinit"
.align 8
.field IR_4,32
.field _AIC23config+0,32
.field 23,32 ; _AIC23config._regs[0] @ 0
.field 23,32 ; _AIC23config._regs[1] @ 32
.field 505,32 ; _AIC23config._regs[2] @ 64
.field 505,32 ; _AIC23config._regs[3] @ 96
.field 17,32 ; _AIC23config._regs[4] @ 128
.field 0,32 ; _AIC23config._regs[5] @ 160
.field 0,32 ; _AIC23config._regs[6] @ 192
.field 67,32 ; _AIC23config._regs[7] @ 224
.field 29,32 ; _AIC23config._regs[8] @ 256
.field 1,32 ; _AIC23config._regs[9] @ 288
IR_4: .set 40
.sect ".text"
_AIC23config: .usect ".far",40,4
.sym _AIC23config,_AIC23config, 8, 3, 320, _DSK6713_AIC23_Config
; c:\ti\c6000\cgtools\bin\opt6x.exe -v6710 -s -O3 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI232_2 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI232_5 -w C:/ti/myprojects/mimo/receiver/Debug
.sect ".text"
.global _initIrq
.sym _initIrq,_initIrq, 32, 2, 0
.func 286
;******************************************************************************
;* FUNCTION NAME: _initIrq *
;* *
;* Regs Modified : A0,B4 *
;* Regs Used : A0,B3,B4 *
;* Local Frame Size : 0 Args + 0 Auto + 0 Save = 0 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_initIrq:
;** --------------------------------------------------------------------------*
.line 2
.sym C$1,0, 14, 4, 32
;** 261 ----------------------- ICR = C$1 = _IRQ_eventTable[8]; // [4]
;** 239 ----------------------- IER |= C$1; // [2]
;** 290 ----------------------- return;
MVKL .S1 __IRQ_eventTable+32,A0 ; |261|
MVKH .S1 __IRQ_eventTable+32,A0 ; |261|
LDW .D1T1 *A0,A0 ; |261|
NOP 4
MVC .S2X A0,ICR ; |261|
MVC .S2 IER,B4 ; |239|
OR .S2X A0,B4,B4 ; |239|
MVC .S2 B4,IER ; |239|
.line 5
.line 6
RET .S2 B3 ; |291|
NOP 5
; BRANCH OCCURS ; |291|
.endfunc 291,000000000h,0
.sect ".text"
.global _restart_ping_pong
.sym _restart_ping_pong,_restart_ping_pong, 32, 2, 0
.func 465
;******************************************************************************
;* FUNCTION NAME: _restart_ping_pong *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,B10,SP *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,B0,B1,B2,B3,B4,B5,B6, *
;* B7,B8,B9,B10,DP,SP *
;* Local Frame Size : 0 Args + 0 Auto + 8 Save = 8 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_restart_ping_pong:
;** --------------------------------------------------------------------------*
.line 2
.sym C$1,0, 14, 4, 32
.sym C$2,20, 14, 4, 32
.sym C$3,20, 14, 4, 32
.sym C$4,0, 14, 4, 32
.sym C$5,20, 14, 4, 32
.sym C$6,3, 13, 4, 16
.sym C$7,0, 14, 4, 32
.sym K$2,26, 14, 4, 32
.sym U$8,0, 30, 4, 32
.sym K$6,25, 14, 4, 32
.sym U$28,20, 14, 4, 32
.sym K$31,3, 14, 4, 32
.sym K$29,0, 14, 4, 32
.sym U$86,4, 30, 4, 32
.sym U$97,20, 14, 4, 32
.sym _gie,20, 14, 4, 32
.sym _gie,20, 14, 4, 32
.sym _base,0, 30, 4, 32
.sym _gie,23, 14, 4, 32
.sym _x0,21, 14, 4, 32
.sym _x2,22, 14, 4, 32
.sym _x3,4, 14, 4, 32
.sym _x4,3, 14, 4, 32
.sym _x5,0, 14, 4, 32
.sym _gie,21, 14, 4, 32
.sym _gie,20, 14, 4, 32
.sym _base,0, 30, 4, 32
.sym _gie,22, 14, 4, 32
.sym _x0,21, 14, 4, 32
.sym _x2,6, 14, 4, 32
.sym _x3,5, 14, 4, 32
.sym _x4,23, 14, 4, 32
.sym _x5,0, 14, 4, 32
.sym _gie,21, 14, 4, 32
.sym _gie,21, 14, 4, 32
.sym CSU$temp$idx,3, 14, 4, 32
.sym CSU$temp$idx,23, 14, 4, 32
.sym CSU$temp$dst,4, 14, 4, 32
.sym CSU$temp$dst,5, 14, 4, 32
.sym CSU$temp$cnt,22, 14, 4, 32
.sym CSU$temp$cnt,6, 14, 4, 32
.sym CSU$temp$src,24, 14, 4, 32
.sym CSU$temp$src,24, 14, 4, 32
.sym CSU$temp$opt,21, 14, 4, 32
.sym CSU$temp$opt,17, 14, 4, 32
;** 273 ----------------------- gie = CSR&1u; // [6]
;** 274 ----------------------- CSR = CSR&0xfffffffeu; // [6]
;** 708 ----------------------- C$6 = (unsigned short)hEdmaReloadXmtPing; // [18]
;** 708 ----------------------- C$7 = (unsigned)C$6+0x1a00000u; // [18]
;** 708 ----------------------- CSU$temp$opt = *(volatile unsigned *)C$7; // [18]
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