📄 rxsync.asm
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;******************************************************************************
;* TMS320C6x C/C++ Codegen PC Version 4.36 *
;* Date/Time created: Wed Jun 01 13:32:51 2005 *
;******************************************************************************
;******************************************************************************
;* GLOBAL FILE PARAMETERS *
;* *
;* Architecture : TMS320C671x *
;* Optimization : Enabled at level 3 *
;* Optimizing for : Speed *
;* Based on options: -o3, no -ms *
;* Endian : Little *
;* Interrupt Thrshld : Disabled *
;* Memory Model : Large *
;* Calls to RTS : Far *
;* Pipelining : Enabled *
;* Speculative Load : Disabled *
;* Memory Aliases : Presume are aliases (pessimistic) *
;* Debug Info : COFF Debug *
;* *
;******************************************************************************
.asg A15, FP
.asg B14, DP
.asg B15, SP
.global $bss
.file "rxsync.c"
.global _SyncState
_SyncState: .usect ".far",24,4
.sym _SyncState,_SyncState, 8, 2, 192, $$fake0
_fCorrelI: .usect ".far",4,4
.sym _fCorrelI,_fCorrelI, 6, 3, 32
_fCorrelQ: .usect ".far",4,4
.sym _fCorrelQ,_fCorrelQ, 6, 3, 32
_pfSync: .usect ".far",360,4
.sym _pfSync,_pfSync, 54, 3, 2880,, 90
; c:\ti\c6000\cgtools\bin\opt6x.exe -v6710 -s -O3 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI2616_2 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI2616_5 -w C:/ti/myprojects/mimo/receiver/Debug
.sect ".text"
.global _synchronization
.sym _synchronization,_synchronization, 32, 2, 0
.func 91
;******************************************************************************
;* FUNCTION NAME: _synchronization *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, *
;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, *
;* B13,SP *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14, *
;* A15,B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12, *
;* B13,DP,SP *
;* Local Frame Size : 0 Args + 36 Auto + 44 Save = 80 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o3) may disable key optimizations! *
;* *
;******************************************************************************
_synchronization:
;** --------------------------------------------------------------------------*
.line 2
.sym _pSyncState,4, 24, 17, 32, $$fake0
.sym C$9,0, 6, 4, 32
.sym C$10,0, 6, 4, 32
.sym C$11,0, 6, 4, 32
.sym C$12,0, 6, 4, 32
.sym C$13,0, 6, 4, 32
.sym Q$1,16, 22, 1, 32
.sym I$1,4, 6, 4, 32
.sym I$2,12, 6, 4, 32
.sym I$3,8, 6, 4, 32
.sym I$4,3, 6, 4, 32
.sym I$5,17, 6, 4, 32
.sym I$6,18, 6, 4, 32
.sym I$7,23, 6, 4, 32
.sym I$8,19, 6, 4, 32
.sym V$0,21, 6, 4, 32
.sym V$1,4, 6, 4, 32
.sym _pSyncState,15, 24, 4, 32, $$fake0
.sym _i,14, 4, 4, 32
.sym _sync_index,32, 4, 1, 32
.sym _sync_max,28, 6, 1, 32
.sym L$2,1, 4, 4, 32
.sym L$1,24, 4, 1, 32
.sym U$20,20, 22, 1, 32
.sym U$32,12, 22, 1, 32
.sym U$37,8, 22, 1, 32
.sym U$47,4, 22, 1, 32
.sym U$18,13, 4, 4, 32
.sym U$48,20, 22, 4, 32
.sym U$38,0, 22, 4, 32
.sym U$42,5, 19, 4, 32
.sym U$33,7, 22, 4, 32
.sym U$21,22, 22, 4, 32
.sym U$27,21, 19, 4, 32
.sym K$4,0, 6, 4, 32
;** ----------------------- U$20 = pSyncState->pfRcv1I;
;** ----------------------- U$32 = pSyncState->pfRcv2I;
;** ----------------------- U$37 = pSyncState->pfRcv1Q;
;** ----------------------- U$47 = pSyncState->pfRcv2Q;
;** ----------------------- Q$1 = &pfSync[0];
;** 99 ----------------------- L$1 = 90;
;** ----------------------- U$18 = 0;
;** 97 ----------------------- K$4 = sync_max = 0.0F;
;** 96 ----------------------- sync_index = 0;
;** 99 ----------------------- i = 0;
;** ----------------------- #pragma MUST_ITERATE(90, 90, 90)
;** ----------------------- #pragma LOOP_FLAGS(4096u)
STW .D2T1 A15,*SP--(80) ; |92|
|| MV .S1X SP,A9 ; |92|
STW .D2T2 B13,*+SP(76)
STW .D2T2 B12,*+SP(72)
STW .D2T2 B11,*+SP(68)
STW .D2T2 B10,*+SP(64)
STW .D1T1 A12,*-A9(32)
|| STW .D2T2 B3,*+SP(60)
STW .D2T1 A11,*+SP(44)
STW .D1T1 A14,*-A9(24)
STW .D2T1 A10,*+SP(40)
STW .D1T1 A13,*-A9(28)
MV .D1 A4,A15 ; |92|
LDW .D1T1 *+A15(12),A0
LDW .D1T1 *+A15(4),A3
LDW .D1T2 *+A15(8),B4
NOP 2
STW .D2T1 A0,*+SP(4)
MVKL .S1 _pfSync,A0
|| STW .D2T1 A3,*+SP(8)
MVKH .S1 _pfSync,A0
|| STW .D2T2 B4,*+SP(12)
STW .D2T1 A0,*+SP(16)
LDW .D1T1 *A15,A0
NOP 4
STW .D2T1 A0,*+SP(20)
.line 9
MVK .S2 0x5a,B4 ; |99|
ZERO .D1 A13
|| STW .D2T2 B4,*+SP(24) ; |99|
.line 7
ZERO .D1 A0 ; |97|
STW .D2T1 A0,*+SP(28) ; |97|
.line 6
STW .D2T1 A0,*+SP(32) ; |96|
.line 9
ZERO .D1 A14 ; |99|
;** --------------------------------------------------------------------------*
;** BEGIN LOOP L1
;** --------------------------------------------------------------------------*
L1:
;** -----------------------g2:
;** 102 ----------------------- // LOOP BELOW UNROLLED BY FACTOR(2)
;** 102 ----------------------- I$8 = K$4;
;** 102 ----------------------- I$7 = I$8;
;** 102 ----------------------- I$6 = I$7;
;** 102 ----------------------- I$5 = I$6;
;** 102 ----------------------- I$4 = I$5;
;** 102 ----------------------- I$3 = I$4;
;** 102 ----------------------- I$2 = I$3;
;** 102 ----------------------- I$1 = I$2;
;** ----------------------- U$21 = U$20+U$18-80;
;** ----------------------- U$33 = U$32+U$18-80;
;** ----------------------- U$38 = U$37+U$18-80;
;** ----------------------- U$48 = U$47+U$18-80;
;** 102 ----------------------- L$2 = 8;
;** ----------------------- U$42 = &SYNCSEQUENCE_Q[-2];
;** ----------------------- U$27 = &SYNCSEQUENCE_I[-2];
;** ----------------------- #pragma MUST_ITERATE(8, 8, 8)
;** ----------------------- #pragma LOOP_FLAGS(4098u)
;** -----------------------g4:
;** 104 ----------------------- C$13 = (float)*(U$27 += 2);
;** 104 ----------------------- I$2 += *(U$21 += 20)*C$13;
;** 104 ----------------------- I$1 += *(U$33 += 20)*C$13;
;** 106 ----------------------- C$12 = (float)*(U$42 += 2);
;** 106 ----------------------- I$6 += *(U$38 += 20)*C$12;
;** 106 ----------------------- I$5 += *(U$48 += 20)*C$12;
;** 104 ----------------------- C$11 = (float)U$27[1];
;** 104 ----------------------- I$4 += U$21[10]*C$11;
;** 104 ----------------------- I$3 += U$33[10]*C$11;
;** 106 ----------------------- C$10 = (float)U$42[1];
;** 106 ----------------------- I$8 += U$38[10]*C$10;
;** 106 ----------------------- I$7 += U$48[10]*C$10;
;** 109 ----------------------- if ( --L$2 ) goto g4;
.line 12
LDW .D2T2 *+SP(12),B6 ; |102|
LDW .D2T1 *+SP(20),A7
NOP 1
MVC .S2 CSR,B5
|| LDW .D2T1 *+SP(4),A4 ; |102|
LDW .D2T1 *+SP(8),A3
|| MVKL .S1 _SYNCSEQUENCE_I-4,A0
|| MVKL .S2 _SYNCSEQUENCE_Q-4,B4
ZERO .D1 A6 ; |97|
|| ZERO .D2 B8 ; |97|
|| AND .L2 -2,B5,B1
|| MVKH .S1 _SYNCSEQUENCE_I-4,A0
|| MVKH .S2 _SYNCSEQUENCE_Q-4,B4
ZERO .D1 A9 ; |97|
|| ZERO .L1 A12 ; |97|
|| STW .D2T2 B5,*+SP(36)
|| MV .L2X A0,B5
|| MV .S1X B4,A5
|| MVC .S2 B1,CSR ; interrupts off
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 102
;* Loop opening brace source line : 102
;* Loop closing brace source line : 109
;* Loop Unroll Multiple : 2x
;* Known Minimum Trip Count : 8
;* Known Maximum Trip Count : 8
;* Known Max Trip Count Factor : 8
;* Loop Carried Dependency Bound(^) : 4
;* Unpartitioned Resource Bound : 6
;* Partitioned Resource Bound(*) : 6
;* Resource Partition:
;* A-side B-side
;* .L units 6* 6*
;* .S units 1 0
;* .D units 6* 6*
;* .M units 3 5
;* .X cross paths 2 3
;* .T address paths 6* 6*
;* Long read paths 0 0
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 0 (.L or .S or .D unit)
;* Bound(.L .S .LS) 4 3
;* Bound(.L .S .D .LS .LSD) 5 4
;*
;* Searching for software pipeline schedule at ...
;* ii = 6 Schedule found with 4 iterations in parallel
;* Done
;*
;* Epilog not removed
;* Collapsed epilog stages : 0
;*
;* Prolog not entirely removed
;* Collapsed prolog stages : 2
;*
;* Minimum required memory pad : 0 bytes
;*
;* For further improvement on this loop, try option -mh160
;*
;* Minimum safe trip count : 3 (after unrolling)
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