lpc29xx.h

来自「NXP LPC系列AMR7的开发程序源码（LCD」· C头文件 代码 · 共 903 行 · 第 1/5 页

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#define ADC2_COMP11          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x12C))
#define ADC2_COMP12          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x130))
#define ADC2_COMP13          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x134))
#define ADC2_COMP14          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x138))
#define ADC2_COMP15          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x13C))

#define ADC2_ACD0            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x200))
#define ADC2_ACD1            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x204))
#define ADC2_ACD2            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x208))
#define ADC2_ACD3            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x20C))
#define ADC2_ACD4            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x210))
#define ADC2_ACD5            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x214))
#define ADC2_ACD6            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x218))
#define ADC2_ACD7            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x21C))
#define ADC2_ACD8            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x220))
#define ADC2_ACD9            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x224))
#define ADC2_ACD10           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x228))
#define ADC2_ACD11           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x22C))
#define ADC2_ACD12           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x230))
#define ADC2_ACD13           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x234))
#define ADC2_ACD14           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x238))
#define ADC2_ACD15           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x23C))

#define ADC2_COMP_STAT       (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x300))
#define ADC2_COMPSTAT_CLR    (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x304))
#define ADC2_CONFIG          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x400))
#define ADC2_CTRL            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x404))
#define ADC2_STATUS          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x408))

#define ADC2_INT_CLR_ENABLE  (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0xFD8))
#define ADC2_INT_SET_ENABLE  (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0xFDC))
#define ADC2_INT_STATUS      (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0xFE0))
#define ADC2_INT_ENABLE      (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0xFE4))
#define ADC2_INT_CLR_STATUS  (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0xFE8))
#define ADC2_INT_SET_STATUS  (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0xFEC))

/* PWM base register */
#define PWM0_BASE_ADDR       0xE00C5000
#define PWM0_MODECTL         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x000))
#define PWM0_TRPCTL          (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x004))
#define PWM0_CAPCTL          (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x008))
#define PWM0_CAPTSRC         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00C))
#define PWM0_CTRL            (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x010))
#define PWM0_PRD             (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x014))
#define PWM0_PRSC            (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x018))
#define PWM0_SYNDEL          (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x01C))
#define PWM0_CNT             (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x020))
#define PWM0_MATCHA0         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x100))
#define PWM0_MATCHA1         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x104))
#define PWM0_MATCHA2         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x108))
#define PWM0_MATCHA3         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10C))
#define PWM0_MATCHA4         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x110))
#define PWM0_MATCHA5         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x114))
#define PWM0_MATCHDA0        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x200))
#define PWM0_MATCHDA1        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x204))
#define PWM0_MATCHDA2        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x208))
#define PWM0_MATCHDA3        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20C))
#define PWM0_MATCHDA4        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x210))
#define PWM0_MATCHDA5        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x214))
#define PWM0_CAPT0           (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x300))
#define PWM0_CAPT1           (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x304))
#define PWM0_CAPT2           (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x308))
#define PWM0_CAPT3           (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x30C))

#define PWM0_MODECTLS        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x800))
#define PWM0_TRPCTLS         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x804))
#define PWM0_CAPTCTLS        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x808))
#define PWM0_CAPTSRCS        (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x80C))
#define PWM0_CTRLS           (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x810))
#define PWM0_PRDS            (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x814))
#define PWM0_PRSCS           (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x818))
#define PWM0_SYNDELS         (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x81C))
#define PWM0_MATCHACTS0      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x900))
#define PWM0_MATCHACTS1      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x904))
#define PWM0_MATCHACTS2      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x908))
#define PWM0_MATCHACTS3      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x90C))
#define PWM0_MATCHACTS4      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x910))
#define PWM0_MATCHACTS5      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x914))
#define PWM0_MATCHDACTS0     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xA00))
#define PWM0_MATCHDACTS1     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xA04))
#define PWM0_MATCHDACTS2     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xA08))
#define PWM0_MATCHDACTS3     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xA0C))
#define PWM0_MATCHDACTS4     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xA10))
#define PWM0_MATCHDACTS5     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xA14))

#define PWM0_INT_CLR_ENABLE  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xF90))
#define PWM0_INT_SET_ENABLE  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xF94))
#define PWM0_INT_STATUS      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xF98))
#define PWM0_INT_ENABLE      (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xF9C))
#define PWM0_INT_CLR_STATUS  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFA0))
#define PWM0_INT_SET_STATUS  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFA4))

#define PWM0_INTM_CLR_ENABLE (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFA8))
#define PWM0_INTM_SET_ENABLE (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFAC))
#define PWM0_INTM_STATUS     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFB0))
#define PWM0_INTM_ENABLE     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFB4))
#define PWM0_INTM_CLR_STATUS (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFB8))
#define PWM0_INTM_SET_STATUS (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFBC))

#define PWM0_INTC_CLR_ENABLE (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFC0))
#define PWM0_INTC_SET_ENABLE (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFC4))
#define PWM0_INTC_STATUS     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFC8))
#define PWM0_INTC_ENABLE     (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFCC))
#define PWM0_INTC_CLR_STATUS (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFD0))
#define PWM0_INTC_SET_STATUS (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0xFD4))

#define PWM1_BASE_ADDR       0xE00C6000
#define PWM1_MODECTL         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x000))
#define PWM1_TRPCTL          (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x004))
#define PWM1_CAPCTL          (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x008))
#define PWM1_CAPTSRC         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x00C))
#define PWM1_CTRL            (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x010))
#define PWM1_PRD             (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x014))
#define PWM1_PRSC            (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x018))
#define PWM1_SYNDEL          (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x01C))
#define PWM1_CNT             (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x020))
#define PWM1_MATCHA0         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x100))
#define PWM1_MATCHA1         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x104))
#define PWM1_MATCHA2         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x108))
#define PWM1_MATCHA3         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x10C))
#define PWM1_MATCHA4         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x110))
#define PWM1_MATCHA5         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x114))
#define PWM1_MATCHDA0        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x200))
#define PWM1_MATCHDA1        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x204))
#define PWM1_MATCHDA2        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x208))
#define PWM1_MATCHDA3        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x20C))
#define PWM1_MATCHDA4        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x210))
#define PWM1_MATCHDA5        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x214))
#define PWM1_CAPT0           (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x300))
#define PWM1_CAPT1           (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x304))
#define PWM1_CAPT2           (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x308))
#define PWM1_CAPT3           (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30C))

#define PWM1_MODECTLS        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x800))
#define PWM1_TRPCTLS         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x804))
#define PWM1_CAPTCTLS        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x808))
#define PWM1_CAPTSRCS        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x80C))
#define PWM1_CTRLS           (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x810))
#define PWM1_PRDS            (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x814))
#define PWM1_PRSCS           (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x818))
#define PWM1_SYNDELS         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x81C))
#define PWM1_MATCHACTS0      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x900))
#define PWM1_MATCHACTS1      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x904))
#define PWM1_MATCHACTS2      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x908))
#define PWM1_MATCHACTS3      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x90C))
#define PWM1_MATCHACTS4      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x910))
#define PWM1_MATCHACTS5      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x914))
#define PWM1_MATCHDACTS0     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xA00))
#define PWM1_MATCHDACTS1     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xA04))
#define PWM1_MATCHDACTS2     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xA08))
#define PWM1_MATCHDACTS3     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xA0C))
#define PWM1_MATCHDACTS4     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xA10))
#define PWM1_MATCHDACTS5     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xA14))

#define PWM1_INT_CLR_ENABLE  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xF90))
#define PWM1_INT_SET_ENABLE  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xF94))
#define PWM1_INT_STATUS      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xF98))
#define PWM1_INT_ENABLE      (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xF9C))
#define PWM1_INT_CLR_STATUS  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFA0))
#define PWM1_INT_SET_STATUS  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFA4))

#define PWM1_INTM_CLR_ENABLE (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFA8))
#define PWM1_INTM_SET_ENABLE (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFAC))
#define PWM1_INTM_STATUS     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFB0))
#define PWM1_INTM_ENABLE     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFB4))
#define PWM1_INTM_CLR_STATUS (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFB8))
#define PWM1_INTM_SET_STATUS (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFBC))

#define PWM1_INTC_CLR_ENABLE (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFC0))
#define PWM1_INTC_SET_ENABLE (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFC4))
#define PWM1_INTC_STATUS     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFC8))
#define PWM1_INTC_ENABLE     (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFCC))
#define PWM1_INTC_CLR_STATUS (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFD0))
#define PWM1_INTC_SET_STATUS (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0xFD4))

#define PWM2_BASE_ADDR       0xE00C7000
#define PWM2_MODECTL         (*(volatile unsigned long *)(PWM2_BASE_ADDR + 0x000))
#define PWM2_TRPCTL          (*(volatile unsigned long *)(PWM2_BASE_ADDR + 0x004))
#define PWM2_CAPCTL          (*(volatile unsigned long *)(PWM2_BASE_ADD
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lpc29xx.h - 源码说明

本页面展示了「NXP LPC系列AMR7的开发程序源码（LCD」中的 lpc29xx.h 源码文件，采用 C头文件 编程语言编写，共 903 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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