lpc29xx.h

来自「NXP LPC系列AMR7的开发程序源码（LCD」· C头文件 代码 · 共 903 行 · 第 1/5 页

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#define CAN_EOT 		(*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x14))
#define CAN_LUT_ERR_ADR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x18))  	
#define CAN_LUT_ERR 	(*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x1C))

#define CAN_CENTRAL_BASE_ADDR		0xE0088000  	
#define CAN_TX_SR 	(*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x00))  	
#define CAN_RX_SR 	(*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x04))  	
#define CAN_MSR 	(*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x08))

/* LIN controller register base */
#define LIN0_BASE_ADDR		0xE0089000
#define LIN0_LMODE		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x00))  	
#define LIN0_LCFG 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x04))  	
#define LIN0_LCMD 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x08))
#define LIN0_LFBRG 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x0C))
#define LIN0_LSTAT 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x10))  	
#define LIN0_LIC 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x14))
#define LIN0_LIE 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x18))  	
#define LIN0_LCS 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x20))
#define LIN0_LTO 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x24))
#define LIN0_LID 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x28))
#define LIN0_LDATA 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x2C))  	
#define LIN0_LDATB 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x30))
#define LIN0_LDATC 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x34))  	
#define LIN0_LDATD 		(*(volatile unsigned long *)(LIN0_BASE_ADDR + 0x38))

#define LIN1_BASE_ADDR		0xE008A000
#define LIN1_LMODE		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x00))  	
#define LIN1_LCFG 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x04))  	
#define LIN1_LCMD 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x08))
#define LIN1_LFBRG 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x0C))
#define LIN1_LSTAT 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x10))  	
#define LIN1_LIC 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x14))
#define LIN1_LIE 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x18))  	
#define LIN1_LCS 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x20))
#define LIN1_LTO 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x24))
#define LIN1_LID 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x28))
#define LIN1_LDATA 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x2C))  	
#define LIN1_LDATB 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x30))
#define LIN1_LDATC 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x34))  	
#define LIN1_LDATD 		(*(volatile unsigned long *)(LIN1_BASE_ADDR + 0x38))

/* Modulation and Sampling Control Subsystem(MSCSS) Timer related reqiesters */
#define MTMR0_BASE_ADDR       0xE00C0000
#define MTIM0_TCR             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x000))
#define MTIM0_TC              (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x004))
#define MTIM0_PR              (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x008))
#define MTIM0_MCR             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x00C))
#define MTIM0_EMR             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x010))
#define MTIM0_MR0             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x014))
#define MTIM0_MR1             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x018))
#define MTIM0_MR2             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x01C))
#define MTIM0_MR3             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x020))
#define MTIM0_CCR             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x024))
#define MTIM0_CR0             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x028))
#define MTIM0_CR1             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x02C))
#define MTIM0_CR2             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x030))
#define MTIM0_CR3             (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0x034))
#define MTIM0_INT_CLR_ENABLE  (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0xFD8))
#define MTIM0_INT_SET_ENABLE  (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0xFDC))
#define MTIM0_INT_STATUS      (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0xFE0))
#define MTIM0_INT_ENABLE      (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0xFE4))
#define MTIM0_INT_CLR_STATUS  (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0xFE8))
#define MTIM0_INT_SET_STATUS  (*(volatile unsigned long *)(MTMR0_BASE_ADDR + 0xFEC))

#define MTMR1_BASE_ADDR       0xE00C1000
#define MTIM1_TCR             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x000))
#define MTIM1_TC              (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x004))
#define MTIM1_PR              (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x008))
#define MTIM1_MCR             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x00C))
#define MTIM1_EMR             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x010))
#define MTIM1_MR0             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x014))
#define MTIM1_MR1             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x018))
#define MTIM1_MR2             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x01C))
#define MTIM1_MR3             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x020))
#define MTIM1_CCR             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x024))
#define MTIM1_CR0             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x028))
#define MTIM1_CR1             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x02C))
#define MTIM1_CR2             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x030))
#define MTIM1_CR3             (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0x034))
#define MTIM1_INT_CLR_ENABLE  (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0xFD8))
#define MTIM1_INT_SET_ENABLE  (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0xFDC))
#define MTIM1_INT_STATUS      (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0xFE0))
#define MTIM1_INT_ENABLE      (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0xFE4))
#define MTIM1_INT_CLR_STATUS  (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0xFE8))
#define MTIM1_INT_SET_STATUS  (*(volatile unsigned long *)(MTMR1_BASE_ADDR + 0xFEC))

#define ADC1_BASE_ADDR       0xE00C3000
#define ADC1_ACC0            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x000))
#define ADC1_ACC1            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x004))
#define ADC1_ACC2            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x008))
#define ADC1_ACC3            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x00C))
#define ADC1_ACC4            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x010))
#define ADC1_ACC5            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x014))
#define ADC1_ACC6            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x018))
#define ADC1_ACC7            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x01C))
#define ADC1_ACC8            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x020))
#define ADC1_ACC9            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x024))
#define ADC1_ACC10           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x028))
#define ADC1_ACC11           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x02C))
#define ADC1_ACC12           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x030))
#define ADC1_ACC13           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x034))
#define ADC1_ACC14           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x038))
#define ADC1_ACC15           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x03C))

#define ADC1_COMP0           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x100))
#define ADC1_COMP1           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x104))
#define ADC1_COMP2           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x108))
#define ADC1_COMP3           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x10C))
#define ADC1_COMP4           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x110))
#define ADC1_COMP5           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x114))
#define ADC1_COMP6           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x118))
#define ADC1_COMP7           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x11C))
#define ADC1_COMP8           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x120))
#define ADC1_COMP9           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x124))
#define ADC1_COMP10          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x128))
#define ADC1_COMP11          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x12C))
#define ADC1_COMP12          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x130))
#define ADC1_COMP13          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x134))
#define ADC1_COMP14          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x138))
#define ADC1_COMP15          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x13C))

#define ADC1_ACD0            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x200))
#define ADC1_ACD1            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x204))
#define ADC1_ACD2            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x208))
#define ADC1_ACD3            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x20C))
#define ADC1_ACD4            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x210))
#define ADC1_ACD5            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x214))
#define ADC1_ACD6            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x218))
#define ADC1_ACD7            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x21C))
#define ADC1_ACD8            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x220))
#define ADC1_ACD9            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x224))
#define ADC1_ACD10           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x228))
#define ADC1_ACD11           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x22C))
#define ADC1_ACD12           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x230))
#define ADC1_ACD13           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x234))
#define ADC1_ACD14           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x238))
#define ADC1_ACD15           (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x23C))

#define ADC1_COMP_STAT       (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x300))
#define ADC1_COMPSTAT_CLR    (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x304))
#define ADC1_CONFIG          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x400))
#define ADC1_CTRL            (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x404))
#define ADC1_STATUS          (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0x408))

#define ADC1_INT_CLR_ENABLE  (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0xFD8))
#define ADC1_INT_SET_ENABLE  (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0xFDC))
#define ADC1_INT_STATUS      (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0xFE0))
#define ADC1_INT_ENABLE      (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0xFE4))
#define ADC1_INT_CLR_STATUS  (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0xFE8))
#define ADC1_INT_SET_STATUS  (*(volatile unsigned long *)(ADC1_BASE_ADDR + 0xFEC))

#define ADC2_BASE_ADDR       0xE00C4000
#define ADC2_ACC0            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x000))
#define ADC2_ACC1            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x004))
#define ADC2_ACC2            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x008))
#define ADC2_ACC3            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x00C))
#define ADC2_ACC4            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x010))
#define ADC2_ACC5            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x014))
#define ADC2_ACC6            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x018))
#define ADC2_ACC7            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x01C))
#define ADC2_ACC8            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x020))
#define ADC2_ACC9            (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x024))
#define ADC2_ACC10           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x028))
#define ADC2_ACC11           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x02C))
#define ADC2_ACC12           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x030))
#define ADC2_ACC13           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x034))
#define ADC2_ACC14           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x038))
#define ADC2_ACC15           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x03C))

#define ADC2_COMP0           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x100))
#define ADC2_COMP1           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x104))
#define ADC2_COMP2           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x108))
#define ADC2_COMP3           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x10C))
#define ADC2_COMP4           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x110))
#define ADC2_COMP5           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x114))
#define ADC2_COMP6           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x118))
#define ADC2_COMP7           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x11C))
#define ADC2_COMP8           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x120))
#define ADC2_COMP9           (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x124))
#define ADC2_COMP10          (*(volatile unsigned long *)(ADC2_BASE_ADDR + 0x128))
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lpc29xx.h - 源码说明

本页面展示了「NXP LPC系列AMR7的开发程序源码（LCD」中的 lpc29xx.h 源码文件，采用 C头文件 编程语言编写，共 903 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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