app_data.h

ST5100 driver files for ST chipset

/*****************************************************************************

File Name   : app_data.h

Description : Global Application header

COPYRIGHT (C) STMicroelectronics 2004.

*****************************************************************************/

#ifndef __APP_DATA_H
#define __APP_DATA_H

/* Includes ------------------------------------------------------------ */
#include "getertxt.h"
#include "stddefs.h"

/*=========================================================================
    Structure and Type Definitions
=========================================================================== */

typedef enum
{
    ST_REGION_EUROPE_DVB,
    ST_REGION_USA_DVB,
    ST_REGION_USA_DSS
} ST_Region_t;

#ifdef __STTUNER_H
#ifdef __STDENC_H
typedef struct
{
    ST_Region_t           Region;  /* EUROPE_DVB, USA_DVB or USA_DSS */
    STDENC_Mode_t         Display; /* PAL or NTSC */
    /* Could be usefull to add STDENC_EncodingMode_t instead of STDENC_Mode_t */
} ST_Environment_t;
#endif
#endif

/* -------------------------- AUD ----------------------------------------- */

/* DeviceId AUD_xxxx (quick access to hardware) */
typedef enum
{
    AUD_INT    = 0,
    AUD_EXT    = 1,
    AUD_MAXDEVICE = 2          /* for range test */
} AUD_DeviceId_t;

#define AUD_MAXOPEN	3

/* HandleId for multi-instance access */
typedef U32 AUD_HandleId_t;

/* ------------------------------------------------------------------------ */

/* -------------------------- GXOBJ --------------------------------------- */
/* Configure Hard constraints for GXOBJ (Bitmap and Palette alignement, ...)*/
#define GXOBJ_HARDWARECONSTRAINTS (STGXOBJ_GAMMA_BLITTER | STGXOBJ_GAMMA_GDP_PIPELINE | STGXOBJ_GAMMA_CURS_PIPELINE)

/* ------------------------------------------------------------------------ */

/* -------------------------- LAYER --------------------------------------- */

/* DeviceId LAYER_xxxx (quick access to hardware) */
typedef enum
{
    LAYER_CURSOR    = 0,
    LAYER_GFX1      = 1,
    LAYER_GFX2      = 2,
    LAYER_VIDEO1    = 3,
    LAYER_VIDEO2    = 4,
    LAYER_MAXDEVICE = 5             /* for range test */
} LAYER_DeviceId_t;

#define LAYER_MAXOPEN	10

/* HandleId for multi-instance access */
typedef U32 LAYER_HandleId_t;

/* ------------------------------------------------------------------------ */


/* -------------------------- BLITTER ------------------------------------- */
/* DeviceId BLIT_xxxx (quick access to hardware) */
typedef enum
{
    BLIT_ENGINE = 0,                /* eg : Unique blitter engine */
    BLIT_MAXDEVICE = 1              /* For range test             */
} BLIT_DeviceId_t;

/* HandleId for multi-instance access */
typedef U32 BLIT_HandleId_t;

#define BLIT_MAXOPEN 3

/* ------------------------------------------------------------------------ */


/* -------------------------- CAPT ---------------------------------------- */
/* DeviceId CAPT_xxxx (quick access to hardware) */
typedef enum
{
    CAPT_0 = 0,
    CAPT_MAXDEVICE = 1              /* For range test */
} CAPT_DeviceId_t;

/* HandleId for multi-instance access */
typedef U32 CAPT_HandleId_t;

#define CAPT_MAXOPEN 3

/* ------------------------------------------------------------------------ */


/* -------------------------- CC ---------------------------------------- */
/* DeviceId CC_xxxx (quick access to hardware) */
typedef enum
{
    CC_0 = 0,
    CC_MAXDEVICE = 1              /* For range test */
} CC_DeviceId_t;

/* HandleId for multi-instance access */
typedef U32 CC_HandleId_t;

#define CC_MAXOPEN 1

/* ------------------------------------------------------------------------ */


/* -------------------------- CLKRV --------------------------------------- */
/* DeviceId CLKRV_xxxx (quick access to hardware) */
typedef enum
{
    CLKRV_0 = 0,
    CLKRV_1 = 1,
    CLKRV_MAXDEVICE = 2 
} CLKRV_DeviceId_t;

/* HandleId for multi-instance access */
typedef U32 CLKRV_HandleId_t;

#define CLKRV_MAXOPEN 2

/* -------------------------------------------------------------------------- */


/* -------------------------- DENC ------------------------------------------ */
/* DeviceId DENC_xxxx (quick access to hardware) */
typedef enum
{
    DENC_INT = 0,
    /* No External Denc                                                       */
    DENC_MAXDEVICE = 1
} DENC_DeviceId_t;

#define DENC_MAXOPEN	4

/* HandleId for multi-instance access */
typedef U32 DENC_HandleId_t;

/* ------------------------------------------------------------------------ */


/* -------------------------- EVT ----------------------------------------- */
/* DeviceId EVT_xxxx (quick access to hardware) */
typedef enum
{
    EVT_BACK = 0,
    EVT_MAXDEVICE = 1                  /* for range test */
} EVT_DeviceId_t;

#define EVT_MAXOPEN	20

/* HandleId for multi-instance access */
typedef U32 EVT_HandleId_t;


/* ------------------------------------------------------------------------ */

/* -------------------------- FDMA ---------------------------------------- */
typedef enum
{
    FDMA_AVMEM = 0,
    FDMA_MAXDEVICE = 1                                   /* for range test */
} FDMA_DeviceId_t;

#define FDMA_MAXOPEN 1
/* ------------------------------------------------------------------------ */

/* -------------------------- HDMI ---------------------------------------- */
typedef enum
{
    HDMI = 0,
    HDMI_MAXDEVICE = 1                                   
} HDMI_DeviceId_t;

#define HDMI_MAXOPEN 1

/* HandleId for multi-instance access */
typedef U32 HDMI_HandleId_t;

/* ------------------------------------------------------------------------ */

/* -------------------------- I2C ----------------------------------------- */
/* DeviceId I2C_xxxx (quick access to hardware) */
typedef enum
{
	I2C_BACK = 0,
    I2C_FRONT = 1,    
#ifdef HDMI_I2C    
    I2C_EXT		=	2,
#endif    
    I2C_MAXDEVICE                  /* for range test */
} I2C_DeviceId_t;

#define I2C_MAXOPEN	4


/* HandleId for multi-instance access */
typedef U32 I2C_HandleId_t;

/* ------------------------------------------------------------------------ */


/* -------------------------- PIO ----------------------------------------- */
/* DeviceId PIO_xxxx (quick access to hardware) */
typedef enum
{
    PIO_0 = 0,
    PIO_1 = 1,
    PIO_2 = 2,
    PIO_3 = 3,
    PIO_4 = 4,
    PIO_5 = 5,
    PIO_MAXDEVICE = 6                  /* for range test */
} PIO_DeviceId_t;

#define PIO_MAXOPEN	1

/* HandleId for multi-instance access */
typedef U32 PIO_HandleId_t;

/* ------------------------------------------------------------------------ */


/* -------------------------- STPTI --------------------------------------- */
/* DeviceId PTI_xxxx (quick access to hardware) */
typedef enum
{
    PTI_0,                          
    PTI_1,                          
    PTI_2,                          
    PTI_3,                          
    PTI_MAXDEVICE = 4                   /* for range test */
} PTI_DeviceId_t;


/* HandleId for multi-instance access */
typedef U32 PTI_HandleId_t;

/* ProcessStreamId PTI_PS_xxxx */
typedef enum
{
    PTI_PS_TSI    = 0,                  /* For TSI managment (PAT, PMT, SDT ...) */
    PTI_PS_AV1    = 1,                  /* Decode on AV CD1  */
    PTI_PS_AV2    = 2,                  /* Decode on AV CD2  */
    PTI_PS_PES    = 3,                  /* For PES managment (TTX, AC3...) */
    PTI_PS_MAXDEVICE = 4                /* for range test */
} PTI_ProcessStreamId_t;

#define PTI_MAXOPEN	PTI_PS_MAXDEVICE    /* ProcessStream ==== Handle */

/* DMA parameters */
/*
   Rq : The write length is 4 bytes when transferring from a buffer to