drv_ch_i2c_com.h

ST5100 driver files for ST chipset

/******************************************************************************

File Name   : drv_ch_i2c.h

Description : Channel I2C(Inter IC bus) driver header

Copyright (C) 2004 

******************************************************************************/
#ifndef __DRV_CH_I2C_COM_H
#define __DRV_CH_I2C_COM_H

/*=============================================================================
	Includes
=============================================================================*/

/*=============================================================================
	Definitions
=============================================================================*/
#define PN2020_ADDR0            0x86    /* pNp Network T : PN2020 */
#define PN2020_ADDR1            0x88    /* pNp Network T : PN2020 */
#define IIC_TUNER_ADDR0         0xC0    /* I2C slave address for dvb-t tuner(THOMSON_MM DTT7590A) */
#define IIC_TUNER_ADDR1         0xC0    /* I2C slave address for dvb-t tuner(LGIT TDTM-G203D) */


/**
 *    Maximum Number of Tuner Unit 
**/
#define MAXIMUM_NUMBER_UNITS  (2)

/* Tuner Unit 0:  PN2020 + THOMSON_MM DTT7579 */
#define CHANNEL_TUNER_ADDR0         		IIC_TUNER_ADDR0  
#define CHANNEL_DEMOD_ADDR0 			PN2020_ADDR0 		

/* Tuner Unit 1:  PN2020 + THOMSON_MM DTT7579  */
#define CHANNEL_TUNER_ADDR1         		IIC_TUNER_ADDR1   
#define CHANNEL_DEMOD_ADDR1 			PN2020_ADDR1 	


/*=============================================================================
	Definitions
=============================================================================*/
#define TUNER_NUM_OF_DATA		4
//#define DEMOD_NUM_OF_REG		89
#if defined(SUPPORT_PN1010)
#define CHANNEL_TUNER_ADDR        		0xC0   /* THOMSON_MM_DSF8960*/ //thomson  
#define CHANNEL_DEMOD_ADDR 			0xA6   //pn1010  
#else
#define CHANNEL_TUNER_ADDR       		0xC0   /* THOMSON_MM_DSF8960*/ //thomson  
#define CHANNEL_DEMOD_ADDR 			0x1C   //thomson  
#endif

#define CHANNEL_I2C_ACCESS_TIMEOUT 	10//00 // 

#define TUNER_NUM_OF_DATA		4
#define DEMOD_NUM_OF_REG		87
// #define DEMOD_NUM_OF_REG		90 //10086

#define DEMOD_REG_CLEAR			0x00
#define DEMOD_REG_CARC			0x01
#define DEMOD_REG_CSWP			0x02
#define DEMOD_REG_CARINIT		0x03
#define DEMOD_REG_RHYC			0x04
#define DEMOD_REG_AGCRN			0x05
#define DEMOD_REG_BDR_LSB		0x06
#define DEMOD_REG_BDR_MID		0x07
#define DEMOD_REG_BDR_MSB		0x08
#define DEMOD_REG_BDR_INV		0x09
#define DEMOD_REG_VAFC			0x0A
#define DEMOD_REG_VAGCN			0x0B
#define DEMOD_REG_CONF			0x0C
#define DEMOD_REG_RATE			0x0D
#define DEMOD_REG_SYNC			0x0E
#define DEMOD_REG_STATUS		0x0F

#define DEMOD_REG_RAMCONF		0x10//10086
#define DEMOD_REG_POLA1			0x11
#define DEMOD_REG_POLA2			0x12
#define DEMOD_REG_FNCO_MSB		0x13
#define DEMOD_REG_FNCO_LSB		0x14
#define DEMOD_REG_VBER_LSB		0x15
#define DEMOD_REG_VBER_MID		0x16
#define DEMOD_REG_VBER_MSB		0x17
#define DEMOD_REG_CPT_UNCOR		0x18
#define DEMOD_REG_TS_INT		0x19
#define DEMOD_REG_MODE			0x1A
#define DEMOD_REG_NTHR			0x1B
#define DEMOD_REG_NEST			0x1C
#define DEMOD_REG_CKOFFSET		0x1D
#define DEMOD_REG_IDENTITY		0x1E
#define DEMOD_REG_TEST			0x1F

#define DEMOD_REG_ADCONF		0x20
#define DEMOD_REG_FCONF			0x21
#define DEMOD_REG_GAIN			0x22
#define DEMOD_REG_CLAMPIN		0x23
#define DEMOD_REG_CLAMP1		0x24
#define DEMOD_REG_CLAMP2		0x25
#define DEMOD_REG_CLAMP3		0x26
#define DEMOD_REG_CLAMP4		0x27
#define DEMOD_REG_CLAMPA		0x28
#define DEMOD_REG_CLAMPMID		0x29
#define DEMOD_REG_THRES1		0x2A
#define DEMOD_REG_THRES2		0x2B
// #define DEMOD_REG_			0x2C
// #define DEMOD_REG_			0x2D
// #define DEMOD_REG_			0x2E
// #define DEMOD_REG_			0x2F

#define DEMOD_REG_AFC0			0x30
#define DEMOD_REG_AFC1			0x31
#define DEMOD_REG_ITSEL			0x32
#define DEMOD_REG_ITSTAT		0x33
#define DEMOD_REG_H22K_LSB		0x34
#define DEMOD_REG_H22K_MSB		0x35
#define DEMOD_REG_DISEQ			0x36
#define DEMOD_REG_AGCN			0x37
#define DEMOD_REG_DCIOFF		0x38
#define DEMOD_REG_DCQOFF		0x39
#define DEMOD_REG_PLL1			0x3A
#define DEMOD_REG_PLL2			0x3B
#define DEMOD_REG_PLL3			0x3C
#define DEMOD_REG_FTUNMSB		0x3D
#define DEMOD_REG_FTUNLSB		0x3E
#define DEMOD_REG_AGCRA			0x3F

#define DEMOD_REG_AGCA			0x40
#define DEMOD_REG_GTR1			0x41
#define DEMOD_REG_GTR2			0x42
#define DEMOD_REG_VAGCA			0x43
#define DEMOD_REG_ERADC			0x44
#define DEMOD_REG_ERFAR			0x45
#define DEMOD_REG_ERNYQ			0x46
#define DEMOD_REG_GAUTO			0x47
#define DEMOD_REG_OCT1			0x48
#define DEMOD_REG_OCT2			0x49
#define DEMOD_REG_OCT3			0x4A
#define DEMOD_REG_OCT4			0x4B
#define DEMOD_REG_OCT5			0x4C
#define DEMOD_REG_OCT6			0x4D
#define DEMOD_REG_OCT7			0x4E
#define DEMOD_REG_OCT8			0x4F

#define DEMOD_REG_ENDOFMSG		0x50
#define DEMOD_REG_VAFC_MSB		0x51
#define DEMOD_REG_VAFC_LSB		0x52
#define DEMOD_REG_ISYMB			0x53
#define DEMOD_REG_QSYMB			0x54
#define DEMOD_REG_PLLTS			0x55
#define DEMOD_REG_LEGEND		0x56	// for 10085

#define DEMOD_REG_WPLL1			0x56	// for 10086
#define DEMOD_REG_WPLL2			0x57	// for 10086
#define DEMOD_REG_ADC_C1			0x58	// for 10086
#define DEMOD_REG_LEGEND_86		0x59	// for 10086


// For bit operation

// 0x00		(Clear Register)
#define	DEMOD_REG_BIT_CLB			0x01
#define	DEMOD_REG_BIT_TRI			0x02
#define	DEMOD_REG_BIT_IFS			0x04
#define	DEMOD_REG_BIT_STDBY		0x08
#define	DEMOD_REG_BIT_IICTRL		0x10
#define	DEMOD_REG_BIT_INTEN		0x20
#define	DEMOD_REG_BIT_VIT_O		0x40
#define	DEMOD_REG_BIT_DEM_O		0x80

// 0x03		(Carinit Register)
#define	DEMOD_REG_BIT_NOISEF		0x04
#define	DEMOD_REG_BIT_CLBCAR		0x80

// 0x04		(Rhyc Register)
#define	DEMOD_REG_BIT_DYN		0x40
#define	DEMOD_REG_BIT_TRI_AGC	0x80	// for 10086

// 0x05		(Agcrn Register)
#define	DEMOD_REG_BIT_PWMS		0x20

// 0x0C		(Conf Register)
#define	DEMOD_REG_BIT_DESCI		0x01
#define	DEMOD_REG_BIT_PFEL		0x02
#define	DEMOD_REG_BIT_PFEL_86	0x20	// for 10086
#define	DEMOD_REG_BIT_IEI			0x10
#define	DEMOD_REG_BIT_RSI			0x20
#define	DEMOD_REG_BIT_RSI_86		0x02	// for 10086
#define	DEMOD_REG_BIT_IQP			0x40
#define	DEMOD_REG_BIT_SII			0x80

// 0x0D		(Rate Register)
#define	DEMOD_REG_BIT_RAUTO		0x08
#define	DEMOD_REG_BIT_DIFD		0x80

// 0x0E		(Sync Register)
#define	DEMOD_REG_BIT_RXSIG		0x01
#define	DEMOD_REG_BIT_CARLOCK	0x02
#define	DEMOD_REG_BIT_VITSYNC	0x04
#define	DEMOD_REG_BIT_FSYNC		0x08
#define	DEMOD_REG_BIT_FEL			0x1F

// 0x0F		(Status Register)
#define	DEMOD_REG_BIT_INV			0x01
#define	DEMOD_REG_BIT_SIA			0x02
#define	DEMOD_REG_BIT_ALLTRY		0x04
#define	DEMOD_REG_BIT_NODVB		0x08

// 0x10		(Ram_Conf Register)
#define	DEMOD_REG_BIT_VITO_P		0x80	// for 10086

// 0x11		(Polar1 Register)
#define	DEMOD_REG_BIT_POCLK_P	0x01
#define	DEMOD_REG_BIT_PDEN_P		0x02
#define	DEMOD_REG_BIT_PUNCOR_P	0x04
#define	DEMOD_REG_BIT_POINT_P	0x08
#define	DEMOD_REG_BIT_PSYNC_P	0x10
#define	DEMOD_REG_BIT_TRI_O_P	0x20
#define	DEMOD_REG_BIT_LSYNC_P	0x40
#define	DEMOD_REG_BIT_PMF_P		0x80

// 0x12		(Polar2 Register)
#define	DEMOD_REG_BIT_POCLK_S	0x01
#define	DEMOD_REG_BIT_PDEN_S		0x02
#define	DEMOD_REG_BIT_PUNCOR_S	0x04
#define	DEMOD_REG_BIT_POINT_S	0x08
#define	DEMOD_REG_BIT_PSYNC_S	0x10
#define	DEMOD_REG_BIT_TRI_O_S	0x20
#define	DEMOD_REG_BIT_LSYNC_S	0x40
#define	DEMOD_REG_BIT_PMF_S		0x80

// 0x18		(CPT UNCOR Register)
#define	DEMOD_REG_BIT_CLBUNC		0x80
#define	DEMOD_REG_BIT_CPTU		0x7F

// 0x19		(TS_INT Register)
#define	DEMOD_REG_BIT_SERINT		0x01
#define	DEMOD_REG_BIT_PARMOD	0x02
#define	DEMOD_REG_BIT_MSBFST_P	0x40
#define	DEMOD_REG_BIT_SWAP_P	0x80

// 0x1A		(Mode Register)
#define	DEMOD_REG_BIT_STD		0x01
#define	DEMOD_REG_BIT_PSK		0x02
#define	DEMOD_REG_BIT_CMODE1	0x03
#define	DEMOD_REG_BIT_PARC_SERB	0x03	// for 10086
#define	DEMOD_REG_BIT_CMODE2	0x04
#define	DEMOD_REG_BIT_SERB		0x04	// for 10086
#define	DEMOD_REG_BIT_MSBFIRST2	0x40
#define	DEMOD_REG_BIT_MSBFST_S	0x40	// for 10086
#define	DEMOD_REG_BIT_SWAP2		0x80
#define	DEMOD_REG_BIT_SWAP_S	0x80	// for 10086

// 0x1E		(Identity Register)
#define	DEMOD_REG_BIT_ID10085	0xDF
#define	DEMOD_REG_BIT_ID10086	0xE1

// 0x1F		(Test Register)
#if defined(NEO_FOX)
#define	DEMOD_REG_BIT_CTRL1		0x20
#define	DEMOD_REG_BIT_CTRL2		0x10
#else
#define	DEMOD_REG_BIT_CTRL1		0x10
#define	DEMOD_REG_BIT_CTRL2		0x20
#endif

// 0x20		(ADCONF Register)
#define	DEMOD_REG_BIT_IDCO		0x01
#define	DEMOD_REG_BIT_HPFB		0x04
#define	DEMOD_REG_BIT_BYP		0x08
#define	DEMOD_REG_BIT_CTRL3		0x40
#define	DEMOD_REG_BIT_CTRL3_C	0x80

// 0x21		(Fconf Register)
#define	DEMOD_REG_BIT_AFS		0x80

// 0x32		(Interrupt Register)
#define	DEMOD_REG_BIT_INTRPT		0x02

// 0x36		(DiSEqC Register)
#define	DEMOD_REG_BIT_SEL22K		0x01
#define	DEMOD_REG_BIT_SELBUR		0x02
#define	DEMOD_REG_BIT_SENDBUR	0x04
#define	DEMOD_REG_BIT_SENDM		0x08
#define	DEMOD_REG_BIT_MODE22K	0x80

// 0x3B		(PLL2 Register)
#define	DEMOD_REG_BIT_TM0		0x40
#define	DEMOD_REG_BIT_PDPLL		0x80

// 0x3D		(Ftun_Msb Register)
#define	DEMOD_REG_BIT_POSMUL		0x80

// 0x3F		(AGCRA Register)
#define	DEMOD_REG_BIT_GSEL		0x40
#define	DEMOD_REG_BIT_PWMOD		0x80

// 0x47		(Gauto Register)
#define	DEMOD_REG_BIT_CMPFAR		0x40
#define	DEMOD_REG_BIT_CMPNYQ	0x80

// 0x50		(Endofmsg Register)
#define	DEMOD_REG_BIT_EOMSG		0x01

// 0x55		(PLLTS Register)
#define	DEMOD_REG_BIT_FRM		0x01	// for 10086
#define	DEMOD_REG_BIT_DIRECTO	0x02	// for 10086
#define	DEMOD_REG_BIT_DIRECTI	0x04	// for 10086
#define	DEMOD_REG_BIT_PLLBYP		0x08
#define	DEMOD_REG_BIT_CLKEN		0x08	// for 10086
#define	DEMOD_REG_BIT_PLLPDN		0x10
#define	DEMOD_REG_BIT_PLLBYP_86	0x10	// for 10086
#define	DEMOD_REG_BIT_PLLMODE	0x20
#define	DEMOD_REG_BIT_PLLPD		0x20	// for 10086
#define	DEMOD_REG_BIT_LOCK		0x80	// for 10086

// 0x56		(WPLL1 Register)
#define	DEMOD_REG_BIT_WPLL_PD	0x80	// for 10086

// 0x57		(WPLL2 Register)
#define	DEMOD_REG_BIT_WPLL_BYP	0x08	// for 10086
#define	DEMOD_REG_BIT_WPLL_LOCK	0x80	// for 10086

// 0x58		(ADC C1 Register)
#define	DEMOD_REG_BIT_A_PD		0x01	// for 10086
#define	DEMOD_REG_BIT_A_SLEEP	0x02	// for 10086
#define	DEMOD_REG_BIT_A_TWOS	0x04	// for 10086
#define	DEMOD_REG_BIT_A_DCIN		0x08	// for 10086
#define	DEMOD_REG_BIT_A_GAIN		0x40	// for 10086


/*=============================================================================
	Typedefs
=============================================================================*/

/*=============================================================================
	Export Variables
=============================================================================*/

/*=============================================================================
	Export functions
=============================================================================*/
int	DRV_Ch_I2c_Init(unsigned char unitId, unsigned long type);

int drv_ch_i2c_DEMODWrite(
	unsigned char unitId,	
	unsigned char 		index, 	
	unsigned char 		*Buffer,  	
	unsigned int 	NumberToWrite );

int drv_ch_i2c_DEMODRead(unsigned char unitId,unsigned char index,
									   unsigned char *Buffer,
									   unsigned int NumberToRead);


int drv_ch_i2c_TUNERWrite(unsigned char unitId, unsigned char  *Buffer,  unsigned int NumberToWrite);

int drv_ch_i2c_TUNERRead(unsigned char unitId,unsigned char *buf);

int AT_I2cReadWrite(unsigned char unitId, int mode, unsigned char ChipAddress, unsigned char *Data, unsigned char NbData);
//int AT_I2cReadWriteDbg(unsigned char unitId, int mode, unsigned char ChipAddress, unsigned char *Data, unsigned char NbData, char *file, int line);
//#define	AT_I2cReadWrite(a, b, c, d, e)	AT_I2cReadWriteDbg(a, b, c, d, e, __FILE__, __LINE__)

extern int	DRV_CH_Set_Type(unsigned char unitId, unsigned long type, unsigned char addrIndex);

#endif

/* EOF */