snimdefs.h

ST5100 driver files for ST chipset

#define SNIM_TIMEOUT_QPSKLOCK       82000    /*Timeout for QPSK search (82 seconds longest found for failed baud search*/
#define SNIM_TIMEOUT_FECLOCK        5000     /* timeout for FEC lock after QPSK*/
#define SNIM_TIMEINTERVAL_RSUBC     200      /* update period for SR ubc (integer submultiple of 1000)*/

/* interrupts and limits used within lock FSM state machine */
#define SNIM_IRQ_LOCKFSMCONSUMED    (       \
             SNIM_IRQ_QPSK_LOCK             \
            |SNIM_IRQ_QPSK_BAUDSCHDONE      \
            |SNIM_IRQ_QPSK_FREQSCHDONE      \
            |SNIM_IRQ_QPSK_DAGCLOCK         \
            |SNIM_IRQ_FEC_BALOCK            \
            |SNIM_IRQ_FEC_DSLOCK            \
                                     )
#define SNIM_SRCH_FREQLIMIT         3         /* number of frequency searches before abandoning search*/
#define SNIM_SRCH_DAGCLIMIT         10        /* number of DAGC lost lock IRQs before abandoning sweep */
#define SNIM_SRCH_FEAGCLIMIT        10        /* number of times (i.e. 10msecs)AGC may be unlocked before abandoning */




/*
Main control structure for Snim module. Each Snim module in a system requires its own structure
which contains internal state information. Synthesiser tables, millisecond clock and bus functions
may be common to all Snims
Default values are mostly zero 
ZL10312 is assumed to be driven from crystal specified in tuner.Xtal
*/



typedef struct SSnimControl
{
	/* Set in SnimCreate */
	unsigned long	unitId;		/* for multi tuner. */
	HANDLE hTuner;		            /* pointer to tuner control block header */
	Uint16T XtalkHz;				/* our crystal frequency 9900 to 16000, or 4000 for external clock*/
	Uint8T ucAddress;                /* 2 wire bus address of MT312 default  0x28*/
	Uint8T EnableNo;                /* used to select enable line for power switching if used*/
	Uint16T wConfig;                /* general start up configuration */
	PFRegisterRead pfRegisterRead;  /* pointer to 2 wire bus routine */
	PFRegisterWrite pfRegisterWrite;/* pointer to 2 wire bus routine */
	PFSlaveAccess  pfSlaveAccess;   /* pointer to 2 wire bus routine */
	PFEnable  pfEnable;             /* pointer to routine to control power switching (NULL ifnot used)*/
	PFDiSEqCCallback pfnDiSEqCCallBack; /* User Callback for External DiSEqC Settings */
	Uint16T DelaySat;               /* delay in milliseconds to allow satellite switch to settle */
	Uint16T VitBerTime;             /* time in seconds to run Viterbi bit error rate timer */


	/*initialised to 0 */    
	SSnimLnb Lnb;                   /* lnb data */
	BitsT DSSmode;                /* 1 = DSS mode, 0 = DVB mode*/
	BitsT Roll20:1;                 /* roll off factor 0.2 instead of 0.35 (DVB only)*/
	/* if these flags are set, driver requests diseqc control be used*/
	BitsT BandToneDisable:1;        /* 1 disables then 22khz LNB band switching */
	BitsT SatToneBurstDisable:1;    /* 1 disables position tonebursts, i.e. burst 0(Sat A) and burst 1(Sat B) 22kHz LNB switching */
	BitsT PolarVoltsDisable:1;      /* 1 disables the voltage switching function for horizontal/vertical polarisation */
	BitsT NoDiSEqC2Input:1;         /* set if the DiSEqC2 Input pin is used for serial MPEG clock */

	BitsT BaseFreq:1;               /* set to 1 by program tuner, if requested frequency <2.2GHz*/
	BitsT LowInjection:1;           /* set to 1 by program tuner, if LO side injection occurs*/
	BitsT tone:1;                   /* used by SendReceiveDiSEqCSnim() to store tone state*/
	BitsT DiSEqCReplyExpected:1;    /* set if a reply is expected */
	BitsT HiBand:1;					/* used internally to track current band*/
	BitsT bScan:1;                  /* set during scan mode */
	Uint16T wDebugFlags;            /* test flags used for debug purposes */
	HANDLE hTimer;                  /* timers for debug at present */
	SSnimChannel Channel;           /* current channel info*/

	Uint16T wScanStart;             /* start frequency in MHz */
	Uint16T wScanStop;              /* stop frequency in MHz:must be higher than start frequency */
	Uint8T ucScanRsMin;             /* max symbol rate for search MBd x4*/
	Uint8T ucScanRsMax;             /* min symbol rate for search MBd x4*/
	Uint8T ucScanFlags;             /* setup info see above*/
	Uint8T ucChipID;                /* used to store chip ID e.g. SNIM_ID_MT312 */

	Uint32T dwIRQcache;				/* Cache for interrupts */
	Uint8T ScanStatus;              /* internal scan flags */
	Uint8T  BPSFlags;              /* flags used to request Polarisation,Hi/Lo LNB  select and/or satA/B*/
	Uint16T  wPerCent;                 /* 0-1000 completeness of scan i.e. % x10*/
	Uint8T DiSEqC2Int;               /*Cache for DISEQC2_INT */
	Uint8T ucRetryCount;            /* number of retries for frequency search mode*/
	Uint8T ucDAGCCount;             /* counter for DAGC unlocks */
	Uint8T ucFEAGCcount;            /* counter for AGC not locked */
	Uint32T dwErrorCount;           /* stores the RS error count for Viterbi BER calculation*/
	Uint32T dwErrPer;                /* measured error period*/
	Uint16T LockBPSfsmState;       /*state variable storage for BPS and Lock FSMs*/
	Uint16T DemodFsmState;          /* demod state variable*/
	Uint16T DemodFsmCommand;        /* command input to state machine */
	Uint16T DiSEqCFsmState;          /* DiSEqC state variable*/
	Uint16T DiSEqCTimeout;           /* stores the anticipated transmit time for the current message */
	Uint16T wRSUBCsample;           /* last read rsUBC sample value*/
	Uint16T wRSUBCsub;               /* rs UBC subtotal */
	Uint16T wRSUBCsec;               /* one second total for RsUBC*/
	Uint8T  ucRScount;              /* keeps track of 1 second updates */
	Uint32T dwEvents;				/* cache for errors/events*/

}SSnimControl, *PSSNIMCTL;



/* flags for test/debug */
#define SNIM_DEBUG_NOTUNERWRITE         0x0001      /* Disable tuner writes: routines return success to allow continuation*/ 
#define SNIM_DEBUG_NOTUNERREAD 	        0x0002      /* disable reading the tuner: reads return success (frequency lock)*/
#define SNIM_DEBUG_ENABLETUNERCENTRE        0x0004      /* used to prevent auto centring of synthesiser, for test purposes */
#define SNIM_DEBUG_FORCEWIDEBAND        0x0008      /*leave tuner filter at maximum bandwidth*/
#define SNIM_DEBUG_NODRIVERWRITES       0x0010      /* prevents all writes by driver*/
#define SNIM_DEBUG_NODRIVERREADS   		0x0020	    /* prevents all reads by driver*/
#define SNIM_DEBUG_NOCHANGEPOLAR        0x0040      /* prevents driver changing the polarisation voltage*/
#define SNIM_DEBUG_POLARHORIZONTAL      0x0080      /* set polar bit to horizontal (if NOCHANGEPOLAR is set)*/
#define SNIM_DEBUG_NOSLEEP              0x0100      /* disables sleep hardware operation */
/* following macro used to re-enable bare essentials for acquisition*/
#define SNIM_DEBUG_ALLACQ               SNIM_DEBUG_NOTUNERWRITE|SNIM_DEBUG_NOTUNERREAD|SNIM_DEBUG_NODRIVERWRITES|SNIM_DEBUG_NODRIVERWRITES


#define SNIM_MIN_FREQ				925
#define SNIM_MAX_FREQ				2175
/* time to wait for reset chip to release demodulator */
#define SNIM_RESET_WAIT 600   /* milliseconds */
#define SNIM_DEMODFSM_REFRESH_TIME 250 /* data update rate in milliseconds when locked/idle etc*/






/* macros used in Acquisition and scanning control*/

/* flags set to request polarisation, etc in BPSFlags register */
#define SNIM_BPS_VERT		0x80  /* request for vertical selection */
#define SNIM_BPS_HORZ		0x40  /* request for horizontal selection */
#define SNIM_BPS_POSA		0x20  /* request for  POSA (sat A) selection */
#define SNIM_BPS_POSB		0x10  /* request for  POSB (sat B) selection */
#define SNIM_BPS_HI		0x08  /* request for  HIBAND  selection */
#define SNIM_BPS_LO		0x04  /* request for  LOBAND  selection */

/* Flags for ScanStatus*/
#define SNIM_SCANSTAT_FOUND		0x80  /* new channel data available in Snim.Channel*/
#define SNIM_SCANSTAT_DONE		0x40  /* scan completed */
#define SNIM_SCANSTAT_POLAR2    0x20  /* set internally on second polarisation pass*/
#define SNIM_SCANSTAT_POS2	    0x10  /* set internally during second scan of position */









#endif /*_357013F430DC43daAFFA6C66BFA7976F_*/