📄 drv_channel.c
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#else
if (nStdbyMode == 0) // set standby
{
DEMOD_REG[unitId][DEMOD_REG_CLEAR] |= DEMOD_REG_BIT_STDBY;
drv_ch_i2c_DEMODWrite(unitId, DEMOD_REG_CLEAR, &DEMOD_REG[unitId][DEMOD_REG_CLEAR], 1);
}
else // unset standby
{
DEMOD_REG[unitId][DEMOD_REG_CLEAR] &= ~(DEMOD_REG_BIT_STDBY);
drv_ch_i2c_DEMODWrite(unitId, DEMOD_REG_CLEAR, &DEMOD_REG[unitId][DEMOD_REG_CLEAR], 1);
}
#endif
} // end of drv_channel_DEMODStandby
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_DEMODInterruptEnable
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_DEMODInterruptEnable(unsigned char unitId)
{
// ITSEL[1] :
// an interrupt is generated on each falling edge of Viterbi synchronization flag :
// VITSYNC : synchronized -> not synchronized
#if 0//
DEMOD_REG[unitId][DEMOD_REG_ITSEL] |= DEMOD_REG_BIT_INTRPT;
drv_ch_i2c_DEMODWrite(unitId, DEMOD_REG_ITSEL, &DEMOD_REG[unitId][DEMOD_REG_ITSEL], 1);
#endif
} // end of drv_channel_DEMODInterruptEnable
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_DEMODInterruptDisable
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_DEMODInterruptDisable(unsigned char unitId)
{
// DEMOD_REG[unitId][DEMOD_REG_ITSEL] &= ~(DEMOD_REG_BIT_INTRPT);
// drv_ch_i2c_DEMODWrite(unitId, DEMOD_REG_ITSEL, &DEMOD_REG[unitId][DEMOD_REG_ITSEL], 1);
} // end of drv_channel_DEMODInterruptDisable
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_LNB22KHzTone
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_LNB22KHzTone(unsigned char unitId, __channel_LNB22KHzTone_t tone)
{
Snim_Drv_SetDisEqCModeLNB22KHzTone(tone);
} // end of drv_channel_LNB22KHzTone
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_ToneBurst
// Description :
// Input : ||||||||||||| : Tone Burst A : Satellite A
// ||| ||| ||| : Tone Burst B : Satellite B
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_ToneBurst(unsigned char unitId,__channel_ToneBurst_t ToneBurst)
{
Snim_Drv_SetDisEqCModeToneBurst(ToneBurst);
} // end of drv_channel_ToneBurst
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_Polarization
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
#if defined(SUPPORT_LEGACY_SWITCH)
void drv_channel_Legacy_Polarization(unsigned char unitId,unsigned char ucPolar)
{
printDrvCh(("<drv>drv_channel_Polarization[%x] : %x\n",unitId,ucPolar));
DRV_CH_Pio_Legacy_Polarization(unitId, ucPolar);
} // end of drv_channel_Polarization
#endif
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_Polarization
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_Polarization(unsigned char unitId,unsigned char ucPolar)
{
printDrvCh(("<drv>drv_channel_Polarization[%x] : %x\n",unitId,ucPolar));
DRV_CH_Pio_Polarization(unitId, ucPolar);
} // end of drv_channel_Polarization
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_LNBPower
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_LNBPower( unsigned char unitId, __channel_LNBPower_t power)
{
} // end of drv_channel_LNBPower
/////////////////////////////////////////////////////////////////////////////////
// Function : drv_channel_LNBVoltage
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
void drv_channel_LNBVoltage(unsigned char unitId,unsigned char ucVoltage )
{
printDrvCh(("Drv_channel : drv_channel_LNBVoltage[%x] : %x \n",unitId,ucVoltage));
DRV_CH_Pio_LnbVoltage(unitId, ucVoltage);
} // end of drv_channel_LNBPower
/////////////////////////////////////////////////////////////////////////////////
// Function : DiSEqCDataSend
// Description :
// Input :
// Output :
// Return :
/////////////////////////////////////////////////////////////////////////////////
#define BEGIN_DATA_TRANSFER (1)
unsigned char DSEC_Get_Status(unsigned char unitId)
{
#ifdef THOMSON_MM
unsigned char status;
status = Snim_Drv_GetDiSEqCState();
return status;
#else
unsigned char status;
//SSS_DBG(CAS,INFO,("[FE] DsecCommandWrite()=[%d]\n",iMode));
//Register_Field_Set(DiS_RDY,BEGIN_DATA_TRANSFER); /* Data Transfer Ready */
//DiSRDY == 0 : Finish to send data, DiSRDY == 1 : Data Ready to send
status = PN1010_Get_Register( unitId,0x3B );
return (unsigned char)( ((status & 0x03) == 2)&&((status & 0x08) == 0) );
#endif
}
#define FE_Wait(x) VK_TASK_Sleep(x)
void DsecCommandWrite(unsigned char unitId,unsigned char *datBuf, int count)
{
#ifdef THOMSON_MM
unsigned char i,ret;
unsigned char timeout=100;
unsigned char tempCOunt;
if (count > 8) count = 8;
tempCOunt = count;
while(timeout)
{
if( DSEC_Get_Status(0) ) /* Check whether data transfer has been finished or not? */
{
/* LNB Message Contents ( MSB Sent first on each byte) */
/* LNB Control : Set DiSEqC Mode and count*/
//TestsnimDiSEqCWrite(DSEC_MSG_SELECT_DISEQC_MODE,count,(int)datBuf,0);
Snim_Drv_DiSEqCWrite(count,datBuf);
//timeout = 100;
//while(timeout-- && !ret) ret = DSEC_Get_Status();
return;
}
#if defined(TIMIMG_ADJUSTMENT_CHANNEL)
FE_Wait(2);
#else
FE_Wait(17);
#endif
timeout--;
}
#else
unsigned char i,ret;
unsigned char timeout;
unsigned char tempCOunt = count;
if (count > 7) count = 7;
PN1010_Set_Register(unitId,0x3B, 0x03);
PN1010_Set_Register(unitId,0x3B,((count-1)<<4)|0x2); /* LNB Control : Set DiSEqC Mode and count*/
/* LNB Message Contents ( MSB Sent first on each byte) */
if(((PN1010_Get_Register(unitId,0x3B) & 0x08) >>3 ) == 0 ) /* Check whether data transfer has been finished or not? */
{
for(i=0; i< count; i++)
{
PN1010_Set_Register(unitId,0x3D+i,*datBuf++); /* LNB Control : Set DiSEqC Mode */
}
PN1010_Set_Register(unitId,0x3B,((count-1)<<4)|0x2|(BEGIN_DATA_TRANSFER<<3)); /* LNB Control : Set DiSEqC Mode and count*/
ret = 0;
timeout = 1000;
while(timeout-- && !ret) ret = DSEC_Get_Status(unitId);
}
else
{
//printDrvCh(("[DSEC] DsecCommandWrite : DiSEqC not ready.. \n\r"));
FE_Wait(17);
/* One more try */
PN1010_Set_Register(unitId,0x3B, 0x03);
PN1010_Set_Register(unitId,0x3B,((tempCOunt-1)<<4)|0x2);
if(((PN1010_Get_Register(unitId,0x3B) & 0x08) >>3 ) == 0)
{
for(i=0; i< tempCOunt; i++)
{
PN1010_Set_Register(unitId,0x3D+i,*datBuf++);
}
PN1010_Set_Register(unitId,0x3B,((tempCOunt-1)<<4)|0x2|(BEGIN_DATA_TRANSFER<<3));
ret = 0;
timeout = 1000;
while(timeout-- && !ret) ret = DSEC_Get_Status(unitId);
}
else
{
printDrvChError(("[DSEC] DsecCommandWrite : DiSEqC Still not ready.. \n\r"));
}
}
#endif
}
// MASTER SEND FRAMING BYTE CLASSIFY
#define DSEC_NR_FIRST_TX 0xE0
#define DSEC_NR_REPEAT_TX 0xE1
#define DSEC_REQ_FIRST_TX 0xE2
#define DSEC_REQ_REPEAT_TX 0xE3
#define FRM_RES_NO_ERROR 0xE4
#define FRM_RES_NO_SUPPORT 0xE5 // NOT SUPPORTED COMMAND
#define FRM_RES_PARI_ERROR 0xE6 // PARRITY ERROR, REQ. REPEAT
#define FRM_RES_RECOG_ERROR 0xE7 // RECOGNISE ERROR, REQ. REPEAT
//------------------------------------------------------------------
// ADDRESS BYTE CLASSIFY
#define ADDR_ALL 0x00
#define ADDR_NORMAL_ALL 0x10 // LNB, SWITCHER, SMATV
#define ADDR_LNB 0x11
#define ADDR_LNB_WITH_SW 0x12 // LNB WITH LOOP THRU SWITCH
#define ADDR_SWITCHER 0x14
#define ADDR_SMATV 0x18
#define ADDR_POLARISER_ALL 0x20 //
#define ADDR_LINEAR_POLAR 0x21 // LINEAR POLARISER CONTROLLER
#define ADDR_POSITIONER_ALL 0x30
#define ADDR_POSITIONER_A 0x31 // POLAR/AZIMUTH POSITIONER
#define ADDR_POSITIONER_B 0x32 // ELEVATION POSITIONER
#define ADDR_INSTALLAID_ALL 0x40 // INSTALLER AID
#define ADDR_SIGNAL_LENGTH 0x41
#define ADDR_RESERVED 0x60
#define ADDR_SMART_IF_ALL 0x70 // SMART SLAVE INTERFACE
#define ADDR_HEADEND_IF 0x71
#define ADDR_OEM_RESERVED 0xF0
//------------------------------------------------------------------
// COMMAND BYTE CLASSIFY
#define CMD_RESET 0x00
#define CMD_CLR_RESET 0x01 // 2.0
#define CMD_STANDBY 0x02
#define CMD_POWER_ON 0x03
#define CMD_SET_CONTEND 0x04 // 2.0
#define CMD_CONTEND 0x05 // 2.0
#define CMD_CLR_CONTEND 0x06 // 2.0
#define CMD_ADDRESS 0x07 // 2.0
#define CMD_MOVE_C 0x08 // 2.0
#define CMD_MOVE 0x09 // 2.0
#define CMD_STATUS 0x10 // 2.0
#define CMD_CONFIG 0x11 // 2.0
#define CMD_SWITCH0 0x14 // 2.0
#define CMD_SWITCH1 0x15 // 2.0
#define CMD_SWITCH2 0x16 // 2.0
#define CMD_SWITCH3 0x17 // 2.0
#define CMD_LO 0x20
#define CMD_VR 0x21
#define CMD_POS_A 0x22
#define CMD_SOA 0x23
#define CMD_HI 0x24
#define CMD_HL 0x25
#define CMD_POS_B 0x26
#define CMD_SOB 0x27
#define CMD_S1A 0x28
#define CMD_S2A 0x29
#define CMD_S3A 0x2A
#define CMD_S4A 0x2B
#define CMD_S1B 0x2C
#define CMD_S2B 0x2D
#define CMD_S3B 0x2E
#define CMD_S4B 0x2F
#define CMD_SLEEP 0x30
#define CMD_AWAKE 0x31
#define CMD_WRITE_N0 0x38
#define CMD_WRITE_N1 0x39
#define CMD_WRITE_N2 0x3A
#define CMD_WRITE_N3 0x3B
#define CMD_READ_A0 0x40 // 2.0
#define CMD_READ_A1 0x41 // 2.0
#define CMD_WRITE_A0 0x48
#define CMD_WRITE_A1 0x49
#define CMD_LO_STRING 0x50 // 2.0
#define CMD_LO_NOW 0x51 // 2.0
#define CMD_LO_LO 0x52 // 2.0
#define CMD_LO_HI 0x53 // 2.0
#define CMD_WRITE_FREQ 0x58
#define CMD_CH_NUM 0x59
#define CMD_HALT 0x60
#define CMD_LIMIT_OFF 0x63
#define CMD_POSSTAT 0x64 // 2.2
#define CMD_POSSTAT_WXYZ 0x65 // 2.3
#define CMD_LIMIT_E 0x66
#define CMD_LIMIT_W 0x67
#define CMD_DRIVE_EAST 0x68
#define CMD_DRIVE_WEST 0x69
#define ONE_STEP 0xFE
#define CONTINUE_STEP 0x00
#define CMD_STORE_NN 0x6A
#define CMD_GOTO_NN 0x6B
#define CMD_GOTO_X_X_DEG 0x6E
#define CMD_CAL_SET_POSNS 0x6F
#define CMD_CAL_SET_POSNS_DATA_NUM 0x1
//------------------------------------------------------------------
#define DSEC_TONEBURST_REQ 0x01 // TONE BURST SEND REQUEST,
#define DSEC_MESSAGE_REQ 0x02 // TONE BURST SEND REQUEST,
#define DSEC_TX_FIRST_MESSAGE 0x01
#define DSEC_TX_REPEAT_MESSAGE 0x02
#define DSEC_TX_TONEBURST 0x03
#define DSEC13_OVER_RANGE 650
void DSEC_ResetMicom(unsigned char unitId)
{
#ifdef THOMSON_MM
unsigned char tmpBuf[6];
unsigned char *ioBuf = &tmpBuf[0];
*ioBuf++ = DSEC_NR_FIRST_TX;
*ioBuf++ = ADDR_ALL;
*ioBuf++ = CMD_RESET;
DsecCommandWrite(unitId,&tmpBuf[0], 3);
#else
unsigned char tmpBuf[6];
unsigned char *ioBuf = &tmpBuf[0];
*ioBuf++ = DSEC_NR_FIRST_TX;
*ioBuf++ = ADDR_ALL;
*ioBuf++ = CMD_RESET;
DsecCommandWrite(unitId,&tmpBuf[0], 3);
#endif
}
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