362_init.c

STV0299 Minituner driver, for ST chipset

/*	CHP_TAPS	*/
ChipAddReg(hChip,R_CHP_TAPS,"CHP_TAPS",0x0033,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_CHP_TAPS,SCAT_FILT_EN,"SCAT_FILT_EN",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_CHP_TAPS,TAPS_EN,"TAPS_EN",0,1,CHIP_UNSIGNED);

/*	CHP_DYN_COEFF	*/
ChipAddReg(hChip,R_CHP_DYN_COEFF,"CHP_DYN_COEFF",0x0034,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_CHP_DYN_COEFF,CHP_DYNAM_COEFFCIENT,"CHP_DYNAM_COEFFCIENT",0,8,CHIP_UNSIGNED);

/*	PPM_STATE_MAC	*/
ChipAddReg(hChip,R_PPM_STATE_MAC,"PPM_STATE_MAC",0x0035,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_PPM_STATE_MAC,PPM_STATE_MACHINE_DECODER,"PPM_STATE_MACHINE_DECODER",0,6,CHIP_UNSIGNED);

/*	INR_THRESHOLD	*/
ChipAddReg(hChip,R_INR_THRESHOLD,"INR_THRESHOLD",0x0036,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_INR_THRESHOLD,INR_THRESHOLD,"INR_THRESHOLD",0,8,CHIP_UNSIGNED);

/*	EPQ_TPS_ID_CELL	*/
ChipAddReg(hChip,R_EPQ_TPS_ID_CELL,"EPQ_TPS_ID_CELL",0x0037,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_EPQ_TPS_ID_CELL,DIS_TPS_RSVD,"DIS_TPS_RSVD",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_EPQ_TPS_ID_CELL,DIS_BCH,"DIS_BCH",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_EPQ_TPS_ID_CELL,DIS_ID_CEL,"DIS_ID_CEL",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_EPQ_TPS_ID_CELL,HOLD_SLOPE,"HOLD_SLOPE",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_EPQ_TPS_ID_CELL,TPS_ADJUST_SYM,"TPS_ADJUST_SYM",0,3,CHIP_UNSIGNED);

/*	EPQ_CFG	*/
ChipAddReg(hChip,R_EPQ_CFG,"EPQ_CFG",0x0038,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_EPQ_CFG,EPQ_RANGE,"EPQ_RANGE",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_EPQ_CFG,EPQ_SOFT,"EPQ_SOFT",0,1,CHIP_UNSIGNED);

/*	EPQ_STATUS	*/
ChipAddReg(hChip,R_EPQ_STATUS,"EPQ_STATUS",0x0039,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_EPQ_STATUS,SLOPE_INC,"SLOPE_INC",2,6,CHIP_UNSIGNED);
ChipAddField(hChip,R_EPQ_STATUS,TPS_FIELD,"TPS_FIELD",0,2,CHIP_UNSIGNED);

/*	FECM	*/
ChipAddReg(hChip,R_FECM,"FECM",0x0040,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FECM,FEC_MODE,"FEC_MODE",4,4,CHIP_UNSIGNED);
ChipAddField(hChip,R_FECM,VIT_DIFF,"VIT_DIFF",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FECM,SYNC,"SYNC",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FECM,SYM,"SYM",0,1,CHIP_UNSIGNED);

/*	VTH0	*/
ChipAddReg(hChip,R_VTH0,"VTH0",0x0041,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VTH0,VTH0,"VTH0",0,7,CHIP_UNSIGNED);

/*	VTH1	*/
ChipAddReg(hChip,R_VTH1,"VTH1",0x0042,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VTH1,VTH1,"VTH1",0,7,CHIP_UNSIGNED);

/*	VTH2	*/
ChipAddReg(hChip,R_VTH2,"VTH2",0x0043,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VTH2,VTH2,"VTH2",0,7,CHIP_UNSIGNED);

/*	VTH3	*/
ChipAddReg(hChip,R_VTH3,"VTH3",0x0044,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VTH3,VTH3,"VTH3",0,7,CHIP_UNSIGNED);

/*	VTH4	*/
ChipAddReg(hChip,R_VTH4,"VTH4",0x0045,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VTH4,VTH4,"VTH4",0,7,CHIP_UNSIGNED);

/*	VTH5	*/
ChipAddReg(hChip,R_VTH5,"VTH5",0x0046,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VTH5,VTH5,"VTH5",0,7,CHIP_UNSIGNED);

/*	FREEVIT	*/
ChipAddReg(hChip,R_FREEVIT,"FREEVIT",0x0047,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREEVIT,FREEVIT,"FREEVIT",0,8,CHIP_UNSIGNED);

/*	VITPROG	*/
ChipAddReg(hChip,R_VITPROG,"VITPROG",0x0049,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VITPROG,FORCE_ROTA,"FORCE_ROTA",6,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_VITPROG,AUTO_FREEZE,"AUTO_FREEZE",4,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_VITPROG,MDIVIDER,"MDIVIDER",0,2,CHIP_UNSIGNED);

/*	PR	*/
ChipAddReg(hChip,R_PR,"PR",0x004a,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_PR,FRAPTCR,"FRAPTCR",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PR,E7_8,"E7_8",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PR,E6_7,"E6_7",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PR,E5_6,"E5_6",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PR,E3_4,"E3_4",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PR,E2_3,"E2_3",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PR,E1_2,"E1_2",0,1,CHIP_UNSIGNED);

/*	VSEARCH	*/
ChipAddReg(hChip,R_VSEARCH,"VSEARCH",0x004b,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VSEARCH,PR_AUTO,"PR_AUTO",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_VSEARCH,PR_FREEZE,"PR_FREEZE",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_VSEARCH,SAMPNUM,"SAMPNUM",4,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_VSEARCH,TIMEOUT,"TIMEOUT",2,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_VSEARCH,HYSTER,"HYSTER",0,2,CHIP_UNSIGNED);

/*	RS	*/
ChipAddReg(hChip,R_RS,"RS",0x004c,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_RS,DEINT_ENA,"DEINT_ENA",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,OUTRS_SP,"OUTRS_SP",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,RS_ENA,"RS_ENA",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,DESCR_ENA,"DESCR_ENA",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,ERRBIT_ENA,"ERRBIT_ENA",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,FORCE47,"FORCE47",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,CLK_POL,"CLK_POL",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RS,CLK_CFG,"CLK_CFG",0,1,CHIP_UNSIGNED);

/*	RSOUT	*/
ChipAddReg(hChip,R_RSOUT,"RSOUT",0x004d,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_RSOUT,ENA_STBACKEND,"ENA_STBACKEND",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSOUT,ENA8_LEVEL,"ENA8_LEVEL",0,4,CHIP_UNSIGNED);

/*	ERRCTRL1	*/
ChipAddReg(hChip,R_ERRCTRL1,"ERRCTRL1",0x004e,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_ERRCTRL1,ERRMODE1,"ERRMODE1",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL1,TESTERS1,"TESTERS1",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL1,ERR_SOURCE1,"ERR_SOURCE1",4,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL1,RESET_CNTR1,"RESET_CNTR1",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL1,NUM_EVENT1,"NUM_EVENT1",0,2,CHIP_UNSIGNED);

/*	ERRCNTM1	*/
ChipAddReg(hChip,R_ERRCNTM1,"ERRCNTM1",0x004f,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ERRCNTM1,ERROR_COUNT1_HI,"ERROR_COUNT1_HI",0,8,CHIP_UNSIGNED);

/*	ERRCNTL1	*/
ChipAddReg(hChip,R_ERRCNTL1,"ERRCNTL1",0x0050,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ERRCNTL1,ERROR_COUNT1_LO,"ERROR_COUNT1_LO",0,8,CHIP_UNSIGNED);

/*	ERRCTRL2	*/
ChipAddReg(hChip,R_ERRCTRL2,"ERRCTRL2",0x0051,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_ERRCTRL2,ERRMODE2,"ERRMODE2",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL2,TESTERS2,"TESTERS2",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL2,ERR_SOURCE2,"ERR_SOURCE2",4,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL2,RESET_CNTR2,"RESET_CNTR2",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL2,NUM_EVENT2,"NUM_EVENT2",0,2,CHIP_UNSIGNED);

/*	ERRCNTM2	*/
ChipAddReg(hChip,R_ERRCNTM2,"ERRCNTM2",0x0052,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ERRCNTM2,ERROR_COUNT2_HI,"ERROR_COUNT2_HI",0,8,CHIP_UNSIGNED);

/*	ERRCNTL2	*/
ChipAddReg(hChip,R_ERRCNTL2,"ERRCNTL2",0x0053,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ERRCNTL2,ERROR_COUNT2_LO,"ERROR_COUNT2_LO",0,8,CHIP_UNSIGNED);

/*	FREEDRS	*/
ChipAddReg(hChip,R_FREEDRS,"FREEDRS",0x0054,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREEDRS,FREEDRS,"FREEDRS",0,8,CHIP_UNSIGNED);

/*	VERROR	*/
ChipAddReg(hChip,R_VERROR,"VERROR",0x0055,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_VERROR,ERROR_VALUE,"ERROR_VALUE",0,8,CHIP_UNSIGNED);

/*	ERRCTRL3	*/
ChipAddReg(hChip,R_ERRCTRL3,"ERRCTRL3",0x0056,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_ERRCTRL3,ERRMODE3,"ERRMODE3",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL3,TESTERS3,"TESTERS3",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL3,ERR_SOURCE3,"ERR_SOURCE3",4,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL3,RESET_CNTR3,"RESET_CNTR3",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_ERRCTRL3,NUM_EVENT3,"NUM_EVENT3",0,2,CHIP_UNSIGNED);

/*	ERRCNTM3	*/
ChipAddReg(hChip,R_ERRCNTM3,"ERRCNTM3",0x0057,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ERRCNTM3,ERROR_COUNT3_HI,"ERROR_COUNT3_HI",0,8,CHIP_UNSIGNED);

/*	ERRCNTL3	*/
ChipAddReg(hChip,R_ERRCNTL3,"ERRCNTL3",0x0058,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ERRCNTL3,ERROR_COUNT3_LO,"ERROR_COUNT3_LO",0,8,CHIP_UNSIGNED);

/*	DILSTK1	*/
ChipAddReg(hChip,R_DILSTK1,"DILSTK1",0x0059,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_DILSTK1,DILSTK_HI,"DILSTK_HI",0,8,CHIP_UNSIGNED);

/*	DILSTK0	*/
ChipAddReg(hChip,R_DILSTK0,"DILSTK0",0x005a,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_DILSTK0,DILSTK_LO,"DILSTK_LO",0,8,CHIP_UNSIGNED);

/*	DILBWSTK1	*/
ChipAddReg(hChip,R_DILBWSTK1,"DILBWSTK1",0x005b,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_DILBWSTK1,DILBWSTK1,"DILBWSTK1",0,8,CHIP_UNSIGNED);

/*	DILBWST0	*/
ChipAddReg(hChip,R_DILBWST0,"DILBWST0",0x005c,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_DILBWST0,DILBWST0,"DILBWST0",0,8,CHIP_UNSIGNED);

/*	LNBRX	*/
ChipAddReg(hChip,R_LNBRX,"LNBRX",0x005d,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_LNBRX,LINE_OK,"LINE_OK",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_LNBRX,OCCURRED_ERR,"OCCURRED_ERR",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_LNBRX,RSOV_DATAIN,"RSOV_DATAIN",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_LNBRX,LNBTX_CHIPADDR,"LNBTX_CHIPADDR",0,3,CHIP_UNSIGNED);

/*	RSTC	*/
ChipAddReg(hChip,R_RSTC,"RSTC",0x005e,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_RSTC,DEINTTC,"DEINTTC",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSTC,DIL64_ON,"DIL64_ON",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSTC,RSTC,"RSTC",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSTC,DESCRAMTC,"DESCRAMTC",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSTC,MODSYNCBYT,"MODSYNCBYT",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSTC,LOWP_DIS,"LOWP_DIS",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_RSTC,HIGHP_DIS,"HIGHP_DIS",0,1,CHIP_UNSIGNED);

/*	VIT_BIST	*/
ChipAddReg(hChip,R_VIT_BIST,"VIT_BIST",0x005f,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_VIT_BIST,RAND_RAMP,"RAND_RAMP",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_VIT_BIST,NOISE_LEVEL,"NOISE_LEVEL",3,3,CHIP_UNSIGNED);
ChipAddField(hChip,R_VIT_BIST,PR_VIT_BIST,"PR_VIT_BIST",0,3,CHIP_UNSIGNED);

/*	IIR_CELL_NB	*/
ChipAddReg(hChip,R_IIR_CELL_NB,"IIR_CELL_NB",0x0060,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CELL_NB,NRST_IIR,"NRST_IIR",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IIR_CELL_NB,IIR_CELL_NB,"IIR_CELL_NB",0,3,CHIP_UNSIGNED);

/*	IIR_CX_COEFF1_MSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF1_MSB,"IIR_CX_COEFF1_MSB",0x0061,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF1_MSB,IIR_CX_COEFF1_MSB,"IIR_CX_COEFF1_MSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF1_LSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF1_LSB,"IIR_CX_COEFF1_LSB",0x0062,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF1_LSB,IIR_CX_COEFF1_LSB,"IIR_CX_COEFF1_LSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF2_MSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF2_MSB,"IIR_CX_COEFF2_MSB",0x0063,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF2_MSB,IIR_CX_COEFF2_MSB,"IIR_CX_COEFF2_MSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF2_LSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF2_LSB,"IIR_CX_COEFF2_LSB",0x0064,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF2_LSB,IIR_CX_COEFF2_LSB,"IIR_CX_COEFF2_LSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF3_MSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF3_MSB,"IIR_CX_COEFF3_MSB",0x0065,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF3_MSB,IIR_CX_COEFF3_MSB,"IIR_CX_COEFF3_MSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF3_LSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF3_LSB,"IIR_CX_COEFF3_LSB",0x0066,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF3_LSB,IIR_CX_COEFF3_LSB,"IIR_CX_COEFF3_LSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF4_MSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF4_MSB,"IIR_CX_COEFF4_MSB",0x0067,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF4_MSB,IIR_CX_COEFF4_MSB,"IIR_CX_COEFF4_MSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF4_LSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF4_LSB,"IIR_CX_COEFF4_LSB",0x0068,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF4_LSB,IIR_CX_COEFF4_LSB,"IIR_CX_COEFF4_LSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF5_MSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF5_MSB,"IIR_CX_COEFF5_MSB",0x0069,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF5_MSB,IIR_CX_COEFF5_MSB,"IIR_CX_COEFF5_MSB",0,8,CHIP_UNSIGNED);

/*	IIR_CX_COEFF5_LSB	*/
ChipAddReg(hChip,R_IIR_CX_COEFF5_LSB,"IIR_CX_COEFF5_LSB",0x006a,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IIR_CX_COEFF5_LSB,IIR_CX_COEFF5_LSB,"IIR_CX_COEFF5_LSB",0,8,CHIP_UNSIGNED);

/*	FEPATH_CFG	*/
ChipAddReg(hChip,R_FEPATH_CFG,"FEPATH_CFG",0x006b,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FEPATH_CFG,DEMUX_SWAP,"DEMUX_SWAP",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FEPATH_CFG,DIGAGC_SWAP,"DIGAGC_SWAP",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FEPATH_CFG,LONGPATH_IF,"LONGPATH_IF",0,1,CHIP_UNSIGNED);

/*	PMC1_FUNC	*/
ChipAddReg(hChip,R_PMC1_FUNC,"PMC1_FUNC",0x006c,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_PMC1_FUNC,SOFT_RSTN,"SOFT_RSTN",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC1_FUNC,PMC1_AVERAGE_TIME,"PMC1_AVERAGE_TIME",3,4,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC1_FUNC,PMC1_WAIT_TIME,"PMC1_WAIT_TIME",1,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC1_FUNC,PMC1_2N_SEL,"PMC1_2N_SEL",0,1,CHIP_UNSIGNED);

/*	PMC1_FORCE	*/
ChipAddReg(hChip,R_PMC1_FORCE,"PMC1_FORCE",0x006d,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_PMC1_FORCE,PMC1_FORCE,"PMC1_FORCE",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC1_FORCE,PMC1_FORCE_VALUE,"PMC1_FORCE_VALUE",2,5,CHIP_UNSIGNED);

/*	PMC2_FUNC	*/
ChipAddReg(hChip,R_PMC2_FUNC,"PMC2_FUNC",0x006e,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_PMC2_FUNC,PMC2_SOFT_STN,"PMC2_SOFT_STN",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC2_FUNC,PMC2_ACCU_TIME,"PMC2_ACCU_TIME",4,3,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC2_FUNC,PMC2_CMDP_MN,"PMC2_CMDP_MN",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_PMC2_FUNC,PMC2_SWAP,"PMC2_SWAP",2,1,CHIP_UNSIGNED);

/*	DIG_AGC_R	*/
ChipAddReg(hChip,R_DIG_AGC_R,"DIG_AGC_R",0x0070,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_DIG_AGC_R,COM_SOFT_RSTN,"COM_SOFT_RSTN",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,COM_AGC_ON,"COM_AGC_ON",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,COM_EARLY,"COM_EARLY",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,AUT_SOFT_RESETN,"AUT_SOFT_RESETN",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,AUT_AGC_ON,"AUT_AGC_ON",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,AUT_EARLY,"AUT_EARLY",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,AUT_ROT_EN,"AUT_ROT_EN",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DIG_AGC_R,LOCK_SOFT_RESETN,"LOCK_SOFT_RESETN",0,1,CHIP_UNSIGNED);

/*	COMAGC_TARMSB	*/