362_init.c

STV0299 Minituner driver, for ST chipset

#include <stdlib.h>
#include <string.h>

#include "362_init.h"

STCHIP_Handle_t STV0362_Init(STV0362_InitParams_t *InitParams)
{
    STCHIP_Handle_t hChip;
    U8             *DefVal;

    /*
    **   REGISTER CONFIGURATION
    **     ----------------------
    */
    
    /* fill elements of external chip data structure */
    InitParams->Chip->NbRegs   = STV362_NBREGS;
    InitParams->Chip->NbFields = STV362_NBFIELDS;
    InitParams->Chip->ChipMode = STCHIP_MODE_SUBADR_8;

    if(InitParams->NbDefVal == STV362_NBREGS)
    {
        hChip = ChipOpen(InitParams->Chip);

        DefVal = InitParams->DefVal;

        if(hChip != NULL)
		{
/*	REGISTER INITIALISATION	*/
/*	PLLNDIV	*/
ChipAddReg(hChip,R_PLLNDIV,"PLLNDIV",0x00d9,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_PLLNDIV,PLL_NDIV,"PLL_NDIV",0,8,CHIP_UNSIGNED);

/*	ID	*/
ChipAddReg(hChip,R_ID,"ID",0x0000,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_ID,IDENTIFICATIONREGISTER,"IDENTIFICATIONREGISTER",0,8,CHIP_UNSIGNED);

/*	I2CRPT	*/
ChipAddReg(hChip,R_I2CRPT,"I2CRPT",0x0001,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_I2CRPT,I2CT_ON,"I2CT_ON",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_I2CRPT,ENARPT_LEVEL,"ENARPT_LEVEL",4,3,CHIP_UNSIGNED);
ChipAddField(hChip,R_I2CRPT,SCLT_DELAY,"SCLT_DELAY",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_I2CRPT,SCLT_NOD,"SCLT_NOD",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_I2CRPT,STOP_ENABLE,"STOP_ENABLE",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_I2CRPT,SDAT_NOD,"SDAT_NOD",0,1,CHIP_UNSIGNED);

/*	TOPCTRL	*/
ChipAddReg(hChip,R_TOPCTRL,"TOPCTRL",0x0002,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_TOPCTRL,STDBY,"STDBY",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,STDBY_FEC,"STDBY_FEC",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,STDBY_CORE,"STDBY_CORE",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,DIR_CLK_54,"DIR_CLK_54",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,TS_DIS,"TS_DIS",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,DIR_CLK_108,"DIR_CLK_108",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,TUNER_BB,"TUNER_BB",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_TOPCTRL,DVBT_H,"DVBT_H",0,1,CHIP_UNSIGNED);

/*	IOCFG0	*/
ChipAddReg(hChip,R_IOCFG0,"IOCFG0",0x0003,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IOCFG0,OP0_SD,"OP0_SD",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG0,OP0_VAL,"OP0_VAL",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG0,OP0_OD,"OP0_OD",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG0,OP0_INV,"OP0_INV",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG0,OP0_DACVALUE_HI,"OP0_DACVALUE_HI",0,4,CHIP_UNSIGNED);

/*	DAC0R	*/
ChipAddReg(hChip,R_DAC0R,"DAC0R",0x0004,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_DAC0R,OP0_DACVALUE_LO,"OP0_DACVALUE_LO",0,8,CHIP_UNSIGNED);

/*	IOCFG1	*/
ChipAddReg(hChip,R_IOCFG1,"IOCFG1",0x0005,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IOCFG1,IP0,"IP0",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG1,OP1_OD,"OP1_OD",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG1,OP1_INV,"OP1_INV",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG1,OP1_DACVALUE_HI,"OP1_DACVALUE_HI",0,4,CHIP_UNSIGNED);

/*	DAC1R	*/
ChipAddReg(hChip,R_DAC1R,"DAC1R",0x0006,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_DAC1R,OP1_DACVALUE_LO,"OP1_DACVALUE_LO",0,8,CHIP_UNSIGNED);

/*	IOCFG2	*/
ChipAddReg(hChip,R_IOCFG2,"IOCFG2",0x0007,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_IOCFG2,OP2_LOCK_CONF,"OP2_LOCK_CONF",5,3,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG2,OP2_OD,"OP2_OD",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG2,OP2_VAL,"OP2_VAL",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_IOCFG2,OP1_LOCK_CONF,"OP1_LOCK_CONF",0,3,CHIP_UNSIGNED);

/*	SDFR	*/
ChipAddReg(hChip,R_SDFR,"SDFR",0x0008,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_SDFR,OP0_FREQ,"OP0_FREQ",4,4,CHIP_UNSIGNED);
ChipAddField(hChip,R_SDFR,OP1_FREQ,"OP1_FREQ",0,4,CHIP_UNSIGNED);

/*	STATUS	*/
ChipAddReg(hChip,R_STATUS,"STATUS",0x0009,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_STATUS,TPS_LOCK,"TPS_LOCK",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_STATUS,SYR_LOCK,"SYR_LOCK",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_STATUS,AGC_LOCK,"AGC_LOCK",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_STATUS,PRF,"PRF",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_STATUS,LK,"LK",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_STATUS,PR,"PR",0,3,CHIP_UNSIGNED);

/*	AUX_CLK	*/
ChipAddReg(hChip,R_AUX_CLK,"AUX_CLK",0x000a,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AUX_CLK,AUXFEC_CTL,"AUXFEC_CTL",6,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_AUX_CLK,DIS_CKX4,"DIS_CKX4",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AUX_CLK,CKSEL,"CKSEL",3,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_AUX_CLK,CKDIV_PROG,"CKDIV_PROG",1,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_AUX_CLK,AUXCLK_ENA,"AUXCLK_ENA",0,1,CHIP_UNSIGNED);

/*	FREESYS1	*/
ChipAddReg(hChip,R_FREESYS1,"FREESYS1",0x000b,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREESYS1,FREESYS1,"FREESYS1",0,8,CHIP_UNSIGNED);

/*	FREESYS2	*/
ChipAddReg(hChip,R_FREESYS2,"FREESYS2",0x000c,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREESYS2,FREESYS2,"FREESYS2",0,8,CHIP_UNSIGNED);

/*	FREESYS3	*/
ChipAddReg(hChip,R_FREESYS3,"FREESYS3",0x000d,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREESYS3,FREESYS3,"FREESYS3",0,8,CHIP_UNSIGNED);

/*	AGC2MAX	*/
ChipAddReg(hChip,R_AGC2MAX,"AGC2MAX",0x0010,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC2MAX,AGC2MAX,"AGC2MAX",0,8,CHIP_UNSIGNED);

/*	AGC2MIN	*/
ChipAddReg(hChip,R_AGC2MIN,"AGC2MIN",0x0011,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC2MIN,AGC2MIN,"AGC2MIN",0,8,CHIP_UNSIGNED);

/*	AGC1MAX	*/
ChipAddReg(hChip,R_AGC1MAX,"AGC1MAX",0x0012,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC1MAX,AGC1MAX,"AGC1MAX",0,8,CHIP_UNSIGNED);

/*	AGC1MIN	*/
ChipAddReg(hChip,R_AGC1MIN,"AGC1MIN",0x0013,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC1MIN,AGC1MIN,"AGC1MIN",0,8,CHIP_UNSIGNED);

/*	AGCR	*/
ChipAddReg(hChip,R_AGCR,"AGCR",0x0014,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGCR,RATIO_A,"RATIO_A",5,3,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCR,RATIO_B,"RATIO_B",3,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCR,RATIO_C,"RATIO_C",0,3,CHIP_UNSIGNED);

/*	AGC2TH	*/
ChipAddReg(hChip,R_AGC2TH,"AGC2TH",0x0015,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC2TH,AGC2_THRES,"AGC2_THRES",0,8,CHIP_UNSIGNED);

/*	AGC12C	*/
ChipAddReg(hChip,R_AGC12C,"AGC12C",0x0016,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC12C,AGC1_IV,"AGC1_IV",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGC12C,AGC1_OD,"AGC1_OD",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGC12C,AGC1_LOAD,"AGC1_LOAD",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGC12C,AGC2_IV,"AGC2_IV",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGC12C,AGC2_OD,"AGC2_OD",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGC12C,AGC2_LOAD,"AGC2_LOAD",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGC12C,AGC12_MODE,"AGC12_MODE",0,2,CHIP_UNSIGNED);

/*	AGCCTRL1	*/
ChipAddReg(hChip,R_AGCCTRL1,"AGCCTRL1",0x0017,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGCCTRL1,DAGC_ON,"DAGC_ON",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCCTRL1,INVERT_AGC12,"INVERT_AGC12",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCCTRL1,AGC1_MODE,"AGC1_MODE",3,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCCTRL1,AGC2_MODE,"AGC2_MODE",0,3,CHIP_UNSIGNED);

/*	AGCCTRL2	*/
ChipAddReg(hChip,R_AGCCTRL2,"AGCCTRL2",0x0018,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGCCTRL2,FRZ2_CTRL,"FRZ2_CTRL",5,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCCTRL2,FRZ1_CTRL,"FRZ1_CTRL",3,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_AGCCTRL2,TIME_CST,"TIME_CST",0,3,CHIP_UNSIGNED);

/*	AGC1VAL1	*/
ChipAddReg(hChip,R_AGC1VAL1,"AGC1VAL1",0x0019,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC1VAL1,AGC1_VAL_LO,"AGC1_VAL_LO",0,8,CHIP_UNSIGNED);

/*	AGC1VAL2	*/
ChipAddReg(hChip,R_AGC1VAL2,"AGC1VAL2",0x001a,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC1VAL2,AGC1_VAL_HI,"AGC1_VAL_HI",0,4,CHIP_UNSIGNED);

/*	AGC2VAL1	*/
ChipAddReg(hChip,R_AGC2VAL1,"AGC2VAL1",0x001b,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC2VAL1,AGC2_VAL_LO,"AGC2_VAL_LO",0,8,CHIP_UNSIGNED);

/*	AGC2VAL2	*/
ChipAddReg(hChip,R_AGC2VAL2,"AGC2VAL2",0x001c,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC2VAL2,AGC2_VAL_HI,"AGC2_VAL_HI",0,4,CHIP_UNSIGNED);

/*	AGC2PGA	*/
ChipAddReg(hChip,R_AGC2PGA,"AGC2PGA",0x001d,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_AGC2PGA,AGC2PGA,"AGC2PGA",0,8,CHIP_UNSIGNED);

/*	OVF_RATE1	*/
ChipAddReg(hChip,R_OVF_RATE1,"OVF_RATE1",0x001e,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_OVF_RATE1,OVF_RATE_HI,"OVF_RATE_HI",0,4,CHIP_UNSIGNED);

/*	OVF_RATE2	*/
ChipAddReg(hChip,R_OVF_RATE2,"OVF_RATE2",0x001f,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_OVF_RATE2,OVF_RATE_LO,"OVF_RATE_LO",0,8,CHIP_UNSIGNED);

/*	GAIN_SRC1	*/
ChipAddReg(hChip,R_GAIN_SRC1,"GAIN_SRC1",0x0020,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_GAIN_SRC1,INV_SPECTR,"INV_SPECTR",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_GAIN_SRC1,IQ_INVERT,"IQ_INVERT",6,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_GAIN_SRC1,INR_BYPASS,"INR_BYPASS",5,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_GAIN_SRC1,INS_BYPASS,"INS_BYPASS",4,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_GAIN_SRC1,GAIN_SRC_HI,"GAIN_SRC_HI",0,4,CHIP_UNSIGNED);

/*	GAIN_SRC2	*/
ChipAddReg(hChip,R_GAIN_SRC2,"GAIN_SRC2",0x0021,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_GAIN_SRC2,GAIN_SRC_LO,"GAIN_SRC_LO",0,8,CHIP_UNSIGNED);

/*	INC_DEROT1	*/
ChipAddReg(hChip,R_INC_DEROT1,"INC_DEROT1",0x0022,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_INC_DEROT1,INC_DEROT_HI,"INC_DEROT_HI",0,8,CHIP_UNSIGNED);

/*	INC_DEROT2	*/
ChipAddReg(hChip,R_INC_DEROT2,"INC_DEROT2",0x0023,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_INC_DEROT2,INC_DEROT_LO,"INC_DEROT_LO",0,8,CHIP_UNSIGNED);

/*	PPM_CPAMP_DIR	*/
ChipAddReg(hChip,R_PPM_CPAMP_DIR,"PPM_CPAMP_DIR",0x0024,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_PPM_CPAMP_DIR,PPM_CPAMP_DIRECT,"PPM_CPAMP_DIRECT",0,8,CHIP_UNSIGNED);

/*	PPM_CPAMP_INV	*/
ChipAddReg(hChip,R_PPM_CPAMP_INV,"PPM_CPAMP_INV",0x0025,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_PPM_CPAMP_INV,PPM_CPAMP_INV,"PPM_CPAMP_INV",0,8,CHIP_UNSIGNED);

/*	FREESTFE_1	*/
ChipAddReg(hChip,R_FREESTFE_1,"FREESTFE_1",0x0026,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREESTFE_1,SYMBOL_NUMBER_INC,"SYMBOL_NUMBER_INC",6,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_FREESTFE_1,SEL_LSB,"SEL_LSB",2,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FREESTFE_1,AVERAGE_ON,"AVERAGE_ON",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FREESTFE_1,DC_ADJ,"DC_ADJ",0,1,CHIP_UNSIGNED);

/*	FREESTFE_2	*/
ChipAddReg(hChip,R_FREESTFE_2,"FREESTFE_2",0x0027,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FREESTFE_2,SEL_SRCOUT,"SEL_SRCOUT",6,2,CHIP_UNSIGNED);
ChipAddField(hChip,R_FREESTFE_2,SEL_SYRTHR,"SEL_SYRTHR",0,5,CHIP_UNSIGNED);

/*	DCOFFSET	*/
ChipAddReg(hChip,R_DCOFFSET,"DCOFFSET",0x0028,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_DCOFFSET,SELECT_I_Q,"SELECT_I_Q",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_DCOFFSET,DC_OFFSET,"DC_OFFSET",0,7,CHIP_UNSIGNED);

/*	EN_PROCESS	*/
ChipAddReg(hChip,R_EN_PROCESS,"EN_PROCESS",0x0029,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_EN_PROCESS,INS_NIN_INDEX,"INS_NIN_INDEX",4,4,CHIP_UNSIGNED);
ChipAddField(hChip,R_EN_PROCESS,ENAB_MANUAL,"ENAB_MANUAL",0,1,CHIP_UNSIGNED);

/*	SDI_SMOOTHER	*/
ChipAddReg(hChip,R_SDI_SMOOTHER,"SDI_SMOOTHER",0x002a,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_SDI_SMOOTHER,DIS_SMOOTH,"DIS_SMOOTH",7,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_SDI_SMOOTHER,SDI_INC_SMOOTHER,"SDI_INC_SMOOTHER",0,7,CHIP_UNSIGNED);

/*	FE_LOOP_OPEN	*/
ChipAddReg(hChip,R_FE_LOOP_OPEN,"FE_LOOP_OPEN",0x002b,*DefVal++,STCHIP_ACCESS_WR);
ChipAddField(hChip,R_FE_LOOP_OPEN,TRL_LOOP_OP,"TRL_LOOP_OP",1,1,CHIP_UNSIGNED);
ChipAddField(hChip,R_FE_LOOP_OPEN,CRL_LOOP_OP,"CRL_LOOP_OP",0,1,CHIP_UNSIGNED);

/*	FREQOFF1	*/
ChipAddReg(hChip,R_FREQOFF1,"FREQOFF1",0x002c,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_FREQOFF1,FREQ_OFFSET_LOOP_OPEN_VHI,"FREQ_OFFSET_LOOP_OPEN_VHI",0,8,CHIP_UNSIGNED);

/*	FREQOFF2	*/
ChipAddReg(hChip,R_FREQOFF2,"FREQOFF2",0x002d,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_FREQOFF2,FREQ_OFFSET_LOOP_OPEN_HI,"FREQ_OFFSET_LOOP_OPEN_HI",0,8,CHIP_UNSIGNED);

/*	FREQOFF3	*/
ChipAddReg(hChip,R_FREQOFF3,"FREQOFF3",0x002e,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_FREQOFF3,FREQ_OFFSET_LOOP_OPEN_LO,"FREQ_OFFSET_LOOP_OPEN_LO",0,8,CHIP_UNSIGNED);

/*	TIMOFF1	*/
ChipAddReg(hChip,R_TIMOFF1,"TIMOFF1",0x002f,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_TIMOFF1,TIM_OFFSET_LOOP_OPEN_HI,"TIM_OFFSET_LOOP_OPEN_HI",0,8,CHIP_UNSIGNED);

/*	TIMOFF2	*/
ChipAddReg(hChip,R_TIMOFF2,"TIMOFF2",0x0030,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_TIMOFF2,TIM_OFFSET_LOOP_OPEN_LO,"TIM_OFFSET_LOOP_OPEN_LO",0,8,CHIP_UNSIGNED);

/*	EPQ	*/
ChipAddReg(hChip,R_EPQ,"EPQ",0x0031,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_EPQ,EPQ,"EPQ",0,8,CHIP_UNSIGNED);

/*	EPQAUTO	*/
ChipAddReg(hChip,R_EPQAUTO,"EPQAUTO",0x0032,*DefVal++,STCHIP_ACCESS_R);
ChipAddField(hChip,R_EPQAUTO,EPQ2,"EPQ2",0,8,CHIP_UNSIGNED);