288_drv.c

STV0299 Minituner driver, for ST chipset

		ChipAddField(hChip,R288_I2CRPT,F288_SCLT_DELAY,"SCLT_DELAY",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_I2CRPT,F288_SCLT_VALUE,"SCLT_VALUE",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_I2CRPT,F288_STOP_ENABLE,"STOP_ENABLE",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_I2CRPT,F288_SDAT_VALUE,"SDAT_VALUE",0,1,CHIP_UNSIGNED);

		/*	ACR	*/
		ChipAddReg(hChip,R288_ACR,"ACR",0x0002,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_ACR,F288_PRESCALER,"PRESCALER",5,3,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_ACR,F288_DIVIDER,"DIVIDER",0,5,CHIP_UNSIGNED);

		/*	F22FR	*/
		ChipAddReg(hChip,R288_F22FR,"F22FR",0x0003,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_F22FR,F288_FFR_REG,"FFR_REG",0,8,CHIP_UNSIGNED);

		/*	F22RX	*/
		ChipAddReg(hChip,R288_F22RX,"F22RX",0x0004,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_F22RX,F288_FRX_REG,"FRX_REG",0,8,CHIP_UNSIGNED);

		/*	DISEQC	*/
		ChipAddReg(hChip,R288_DISEQC,"DISEQC",0x0005,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISEQC,F288_DIS_RESET,"DIS_RESET",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC,F288_TIM_OFF,"TIM_OFF",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC,F288_TIM_CMD,"TIM_CMD",3,3,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC,F288_DIS_PRECHARGE,"DIS_PRECHARGE",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC,F288_DISEQC_MODE,"DISEQC_MODE",0,2,CHIP_UNSIGNED);

		/*	DISEQCFIFO	*/
		ChipAddReg(hChip,R288_DISEQCFIFO,"DISEQCFIFO",0x0006,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISEQCFIFO,F288_DISEQC_FIFO1,"DISEQC_FIFO1",0,8,CHIP_UNSIGNED);

		/*	DISEQCSTAT1	*/
		ChipAddReg(hChip,R288_DISEQCSTAT1,"DISEQCSTAT1",0x0007,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISEQCSTAT1,F288_TX_FAIL,"TX_FAIL",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQCSTAT1,F288_FIFO_FULL,"FIFO_FULL",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQCSTAT1,F288_TX_IDDLE,"TX_IDDLE",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQCSTAT1,F288_READ_WRITE_COUNTER,"READ_WRITE_COUNTER",0,5,CHIP_UNSIGNED);

		/*	DISEQCSTAT2	*/
		ChipAddReg(hChip,R288_DISEQCSTAT2,"DISEQCSTAT2",0x0008,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISEQCSTAT2,F288_GAPBURST_FLAG,"GAPBURST_FLAG",0,1,CHIP_UNSIGNED);

		/*	DISEQC2	*/
		ChipAddReg(hChip,R288_DISEQC2,"DISEQC2",0x0009,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISEQC2,F288_RECEIVER_ON,"RECEIVER_ON",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC2,F288_IGNORE_SH22KHZ,"IGNORE_SH22KHZ",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC2,F288_ONECHIP_TRX,"ONECHIP_TRX",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC2,F288_EXT_ENVEL,"EXT_ENVEL",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC2,F288_PIN_SELECT,"PIN_SELECT",2,2,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC2,F288_IRQ_RXEND,"IRQ_RXEND",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISEQC2,F288_IRQ_HALF_FIFO,"IRQ_HALF_FIFO",0,1,CHIP_UNSIGNED);

		/*	DISRX_ST0	*/
		ChipAddReg(hChip,R288_DISRX_ST0,"DISRX_ST0",0x000a,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISRX_ST0,F288_RX_END,"RX_END",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_RX_ACTIVE,"RX_ACTIVE",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_SHORT_22KHZ,"SHORT_22KHZ",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_RX_COUNT_TONE,"RX_COUNT_TONE",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_FIFO_8B_READY,"FIFO_8B_READY",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_FIFO_EMPTY,"FIFO_EMPTY",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_RX_NON_BYTE,"RX_NON_BYTE",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST0,F288_ABORT_DISEQC,"ABORT_DISEQC",0,1,CHIP_UNSIGNED);

		/*	DISRX_ST1	*/
		ChipAddReg(hChip,R288_DISRX_ST1,"DISRX_ST1",0x000b,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISRX_ST1,F288_RX_FAIL,"RX_FAIL",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST1,F288_PARITY_FAIL,"PARITY_FAIL",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST1,F288_FIFO_OVERFLOW,"FIFO_OVERFLOW",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DISRX_ST1,F288_FIFO_BYTENBR,"FIFO_BYTENBR",0,5,CHIP_UNSIGNED);

		/*	DISTXWAIT	*/
		ChipAddReg(hChip,R288_DISTXWAIT,"DISTXWAIT",0x000c,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DISTXWAIT,F288_DISTXWAIT,"DISTXWAIT",0,8,CHIP_UNSIGNED);

		/*	TSREG	*/
		ChipAddReg(hChip,R288_TSREG,"TSREG",0x000d,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_TSREG,F288_ITSTATUS_MODE,"ITSTATUS_MODE",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_TSREG,F288_DEMOUNT_M,"DEMOUNT_M",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_TSREG,F288_SERIAL_OUT_D0,"SERIAL_OUT_D0",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_TSREG,F288_OUTRS_HZ,"OUTRS_HZ",0,1,CHIP_UNSIGNED);

		/*	AGC1C	*/
		ChipAddReg(hChip,R288_AGC1C,"AGC1C",0x000e,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC1C,F288_ENA_DCADJ,"ENA_DCADJ",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_AGC1C,F288_AVERAGE_ON,"AVERAGE_ON",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_AGC1C,F288_AGC_OPDRAIN,"AGC_OPDRAIN",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_AGC1C,F288_IAGC,"IAGC",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_AGC1C,F288_AGCIQ_BETA,"AGCIQ_BETA",0,4,CHIP_UNSIGNED);

		/*	AGC1R	*/
		ChipAddReg(hChip,R288_AGC1R,"AGC1R",0x000f,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC1R,F288_AGC1R_REF,"AGC1R_REF",0,8,CHIP_UNSIGNED);

		/*	AGC1IN	*/
		ChipAddReg(hChip,R288_AGC1IN,"AGC1IN",0x0010,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC1IN,F288_AGC1_VALUE,"AGC1_VALUE",0,8,CHIP_SIGNED);

		/*	RTC	*/
		ChipAddReg(hChip,R288_RTC,"RTC",0x0011,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_RTC,F288_ALPHA_TMG,"ALPHA_TMG",4,4,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RTC,F288_BETA_TMG,"BETA_TMG",0,4,CHIP_UNSIGNED);

		/*	AGC2C0	*/
		ChipAddReg(hChip,R288_AGC2C0,"AGC2C0",0x0012,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC2C0,F288_AGC2COEFF,"AGC2COEFF",0,3,CHIP_UNSIGNED);

		/*	AGC2O	*/
		ChipAddReg(hChip,R288_AGC2O,"AGC2O",0x0013,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC2O,F288_AGC2_REF,"AGC2_REF",0,7,CHIP_UNSIGNED);

		/*	STEP1	*/
		ChipAddReg(hChip,R288_STEP1,"STEP1",0x0014,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_STEP1,F288_STEP_MINUS,"STEP_MINUS",4,4,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_STEP1,F288_STEP_PLUS,"STEP_PLUS",0,4,CHIP_UNSIGNED);

		/*	CFD	*/
		ChipAddReg(hChip,R288_CFD,"CFD",0x0015,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_CFD,F288_CFD_ON,"CFD_ON",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_CFD,F288_BETA_FC,"BETA_FC",4,3,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_CFD,F288_FDCT,"FDCT",2,2,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_CFD,F288_LDL,"LDL",0,2,CHIP_UNSIGNED);

		/*	ACLC	*/
		ChipAddReg(hChip,R288_ACLC,"ACLC",0x0016,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_ACLC,F288_DEROT_ON_OFF,"DEROT_ON_OFF",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_ACLC,F288_ACLC,"ACLC",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_ACLC,F288_NOISE,"NOISE",4,2,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_ACLC,F288_ALPHA,"ALPHA",0,4,CHIP_UNSIGNED);

		/*	BCLC	*/
		ChipAddReg(hChip,R288_BCLC,"BCLC",0x0017,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_BCLC,F288_ALGO,"ALGO",6,2,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_BCLC,F288_BETA,"BETA",0,6,CHIP_UNSIGNED);

		/*	R8PSK	*/
		ChipAddReg(hChip,R288_R8PSK,"R8PSK",0x0018,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_R8PSK,F288_MODE_COEF,"MODE_COEF",3,1,CHIP_UNSIGNED);

		/*	LDT	*/
		ChipAddReg(hChip,R288_LDT,"LDT",0x0019,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_LDT,F288_LOCK_THRESHOLD,"LOCK_THRESHOLD",0,8,CHIP_SIGNED);

		/*	LDT2	*/
		ChipAddReg(hChip,R288_LDT2,"LDT2",0x001a,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_LDT2,F288_LOCK_THRESHOLD2,"LOCK_THRESHOLD2",0,8,CHIP_SIGNED);

		/*	DACR1	*/
		ChipAddReg(hChip,R288_DACR1,"DACR1",0x001b,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DACR1,F288_DAC_MODE,"DAC_MODE",5,3,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_DACR1,F288_DACI_LSB,"DACI_LSB",0,4,CHIP_UNSIGNED);

		/*	DACR2	*/
		ChipAddReg(hChip,R288_DACR2,"DACR2",0x001c,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_DACR2,F288_DACI_MSB,"DACI_MSB",0,8,CHIP_UNSIGNED);

		/*	TLIRM	*/
		ChipAddReg(hChip,R288_TLIRM,"TLIRM",0x001e,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_TLIRM,F288_TMG_LOCK,"TMG_LOCK",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_TLIRM,F288_TMG_FINAL_IND_MSB,"TMG_FINAL_IND_MSB",0,5,CHIP_UNSIGNED);

		/*	TLIRL	*/
		ChipAddReg(hChip,R288_TLIRL,"TLIRL",0x001f,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_TLIRL,F288_TMG_FINAL_IND_LSB,"TMG_FINAL_IND_LSB",0,8,CHIP_UNSIGNED);

		/*	AGC2I1	*/
		ChipAddReg(hChip,R288_AGC2I1,"AGC2I1",0x0020,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC2I1,F288_AGC2_INTEGRATOR_MSB,"AGC2_INTEGRATOR_MSB",0,8,CHIP_UNSIGNED);

		/*	AGC2I2	*/
		ChipAddReg(hChip,R288_AGC2I2,"AGC2I2",0x0021,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_AGC2I2,F288_AGC2_INTEGRATOR_LSB,"AGC2_INTEGRATOR_LSB",0,8,CHIP_UNSIGNED);

		/*	RTFM	*/
		ChipAddReg(hChip,R288_RTFM,"RTFM",0x0022,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_RTFM,F288_TIMING_LOOP_FREQ_MSB,"TIMING_LOOP_FREQ_MSB",0,8,CHIP_UNSIGNED);

		/*	RTFL	*/
		ChipAddReg(hChip,R288_RTFL,"RTFL",0x0023,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_RTFL,F288_TIMING_LOOP_FREQ_LSB,"TIMING_LOOP_FREQ_LSB",0,8,CHIP_UNSIGNED);

		/*	VSTATUS	*/
		ChipAddReg(hChip,R288_VSTATUS,"VSTATUS",0x0024,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VSTATUS,F288_CF,"CF",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VSTATUS,F288_VSTATUS_6,"VSTATUS_6",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VSTATUS,F288_VSTATUS_5,"VSTATUS_5",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VSTATUS,F288_PRF,"PRF",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VSTATUS,F288_LK,"LK",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VSTATUS,F288_PR,"PR",0,3,CHIP_UNSIGNED);

		/*	LDI	*/
		ChipAddReg(hChip,R288_LDI,"LDI",0x0025,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_LDI,F288_LOCK_DET_INTEGR,"LOCK_DET_INTEGR",0,8,CHIP_SIGNED);

		/*	ECNTM	*/
		ChipAddReg(hChip,R288_ECNTM,"ECNTM",0x0026,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_ECNTM,F288_ERROR_COUNT_MSB,"ERROR_COUNT_MSB",0,8,CHIP_UNSIGNED);

		/*	ECNTL	*/
		ChipAddReg(hChip,R288_ECNTL,"ECNTL",0x0027,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_ECNTL,F288_ERROR_COUNT_LSB,"ERROR_COUNT_LSB",0,8,CHIP_UNSIGNED);

		/*	SFRH	*/
		ChipAddReg(hChip,R288_SFRH,"SFRH",0x0028,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_SFRH,F288_SYMB_FREQ_HSB,"SYMB_FREQ_HSB",0,8,CHIP_UNSIGNED);

		/*	SFRM	*/
		ChipAddReg(hChip,R288_SFRM,"SFRM",0x0029,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_SFRM,F288_SYMB_FREQ_MSB,"SYMB_FREQ_MSB",0,8,CHIP_UNSIGNED);

		/*	SFRL	*/
		ChipAddReg(hChip,R288_SFRL,"SFRL",0x002a,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_SFRL,F288_SYMB_FREQ_LSB,"SYMB_FREQ_LSB",4,4,CHIP_UNSIGNED);

		/*	CFRM	*/
		ChipAddReg(hChip,R288_CFRM,"CFRM",0x002b,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_CFRM,F288_CARRIER_FREQUENCY_MSB,"CARRIER_FREQUENCY_MSB",0,8,CHIP_UNSIGNED);

		/*	CFRL	*/
		ChipAddReg(hChip,R288_CFRL,"CFRL",0x002c,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_CFRL,F288_CARRIER_FREQUENCY_LSB,"CARRIER_FREQUENCY_LSB",0,8,CHIP_UNSIGNED);

		/*	NIRM	*/
		ChipAddReg(hChip,R288_NIRM,"NIRM",0x002d,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_NIRM,F288_NOISE_IND_MSB,"NOISE_IND_MSB",0,8,CHIP_UNSIGNED);

		/*	NIRL	*/
		ChipAddReg(hChip,R288_NIRL,"NIRL",0x002e,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_NIRL,F288_NOISE_IND_LSB,"NOISE_IND_LSB",0,8,CHIP_UNSIGNED);

		/*	VERROR	*/
		ChipAddReg(hChip,R288_VERROR,"VERROR",0x002f,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VERROR,F288_ERROR_VAL,"ERROR_VAL",0,8,CHIP_UNSIGNED);

		/*	FECM	*/
		ChipAddReg(hChip,R288_FECM,"FECM",0x0030,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_FECM,F288_FECMODE,"FECMODE",4,4,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_FECM,F288_FECM3,"FECM3",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_FECM,F288_VIT_DIFF,"VIT_DIFF",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_FECM,F288_SYNC,"SYNC",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_FECM,F288_SYM,"SYM",0,1,CHIP_UNSIGNED);

		/*	VTH0	*/
		ChipAddReg(hChip,R288_VTH0,"VTH0",0x0031,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VTH0,F288_VTH0,"VTH0",0,7,CHIP_UNSIGNED);

		/*	VTH1	*/
		ChipAddReg(hChip,R288_VTH1,"VTH1",0x0032,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VTH1,F288_VTH1,"VTH1",0,7,CHIP_UNSIGNED);

		/*	VTH2	*/
		ChipAddReg(hChip,R288_VTH2,"VTH2",0x0033,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VTH2,F288_VTH2,"VTH2",0,7,CHIP_UNSIGNED);

		/*	VTH3	*/
		ChipAddReg(hChip,R288_VTH3,"VTH3",0x0034,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VTH3,F288_VTH3,"VTH3",0,7,CHIP_UNSIGNED);

		/*	VTH4	*/
		ChipAddReg(hChip,R288_VTH4,"VTH4",0x0035,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VTH4,F288_VTH4,"VTH4",0,7,CHIP_UNSIGNED);

		/*	VTH5	*/
		ChipAddReg(hChip,R288_VTH5,"VTH5",0x0036,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VTH5,F288_VTH5,"VTH5",0,7,CHIP_UNSIGNED);

		/*	PR	*/
		ChipAddReg(hChip,R288_PR,"PR",0x0037,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_PR,F288_E7,"E7",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_E6,"E6",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_PR_7_8,"PR_7_8",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_PR_6_7,"PR_6_7",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_PR_5_6,"PR_5_6",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_PR_3_4,"PR_3_4",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_PR_2_3,"PR_2_3",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_PR,F288_PR_1_2,"PR_1_2",0,1,CHIP_UNSIGNED);

		/*	VAVSRCH	*/
		ChipAddReg(hChip,R288_VAVSRCH,"VAVSRCH",0x0038,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_VAVSRCH,F288_AM,"AM",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VAVSRCH,F288_F,"F",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VAVSRCH,F288_SN,"SN",4,2,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VAVSRCH,F288_TO,"TO",2,2,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_VAVSRCH,F288_H,"H",0,2,CHIP_UNSIGNED);

		/*	RS	*/
		ChipAddReg(hChip,R288_RS,"RS",0x0039,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_RS,F288_DEINT,"DEINT",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_OUTRS_PS,"OUTRS_PS",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_RS,"RS",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_DESCRAM,"DESCRAM",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_ERR_BIT,"ERR_BIT",3,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_MPEG,"MPEG",2,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_CLK_POL,"CLK_POL",1,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RS,F288_CLK_CFG,"CLK_CFG",0,1,CHIP_UNSIGNED);

		/*	RSOUT	*/
		ChipAddReg(hChip,R288_RSOUT,"RSOUT",0x003a,Def288Val[index++],STCHIP_ACCESS_WR);
		ChipAddField(hChip,R288_RSOUT,F288_INV_DVALID,"INV_DVALID",7,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RSOUT,F288_INV_DSTART,"INV_DSTART",6,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RSOUT,F288_INV_DERROR,"INV_DERROR",5,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RSOUT,F288_EN_STBACKEND,"EN_STBACKEND",4,1,CHIP_UNSIGNED);
		ChipAddField(hChip,R288_RSOUT,F288_ENA8_LEVEL,"ENA8_LEVEL",0,4,CHIP_UNSIGNED);

		/*	ERRCTRL	*/