📄 288_drv.h
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/* IOPGPIO6 */
#define R288_IOPGPIO6 96
#define F288_IOP6_HIGHZ 224
#define F288_IOP6_CFG 225
#define F288_IOP6_XOR 226
/* IOPGPIO7 */
#define R288_IOPGPIO7 97
#define F288_IOP7_HIGHZ 227
#define F288_IOP7_CFG 228
#define F288_IOP7_XOR 229
/* IOPGPIO8 */
#define R288_IOPGPIO8 98
#define F288_IOP8_HIGHZ 230
#define F288_IOP8_CFG 231
#define F288_IOP8_XOR 232
/* IOPGPIO9 */
#define R288_IOPGPIO9 99
#define F288_IOP9_HIGHZ 233
#define F288_IOP9_CFG 234
#define F288_IOP9_XOR 235
/* IOPVAL0 */
#define R288_IOPVAL0 100
#define F288_GPIO7 236
#define F288_GPIO6 237
#define F288_GPIO5 238
#define F288_GPIO4 239
#define F288_GPIO3 240
#define F288_GPIO2 241
#define F288_GPIO1 242
#define F288_GPIO0 243
/* IOPVAL1 */
#define R288_IOPVAL1 101
#define F288_CS1 244
#define F288_CS0 245
#define F288_STDBY 246
#define F288_AUXCLK 247
#define F288_DIRCLK 248
#define F288_AGC 249
#define F288_GPIO9 250
#define F288_GPIO8 251
/* IOPVAL2 */
#define R288_IOPVAL2 102
#define F288_DISEQCOUT 252
/* FREEDIS */
#define R288_FREEDIS 103
#define F288_DIV_XXX_FREE 253
/* FREES */
#define R288_FREES 104
#define F288_SYSTEM_FREE1 254
/* FREESA */
#define R288_FREESA 105
#define F288_SAMP_FREE 255
/* FREEVIT */
#define R288_FREEVIT 106
#define F288_VITERBI_FREE 256
/* FREERS */
#define R288_FREERS 107
#define F288_REED_SOLO_FREE55 257
/* FREEQDM */
#define R288_FREEQDM 108
#define F288_DEMOD_FREE56 258
/* TAGC1 */
#define R288_TAGC1 109
#define F288_SEL_ADC_PLL 259
#define F288_AGC_BEF_DC 260
#define F288_EN_AGC_PWM 261
#define F288_EN_AGC_PLF 262
#define F288_EN_AGC_TST 263
/* IDCOFF */
#define R288_IDCOFF 110
#define F288_I_DC_OFFSET_VALUE 264
/* QDCOFF */
#define R288_QDCOFF 111
#define F288_Q_DC_OFFSET_VALUE 265
/* TSTR */
#define R288_TSTR 112
#define F288_EN_STRST 266
#define F288_EN_TMG_LOC2 267
#define F288_EN_TMG_LOC1 268
#define F288_EN_STR_FRAC 269
#define F288_EN_STR_ERR 270
#define F288_EN_STR_GPD 271
/* TCTLT1 */
#define R288_TCTLT1 113
#define F288_SEL_COR 272
#define F288_NOISE_IND_CHOICE 273
#define F288_SEL_TETA 274
#define F288_SEL_CTL_PLF 275
/* TSTRM1 */
#define R288_TSTRM1 114
#define F288_SELOUTR1 276
#define F288_FSELRAM1 277
#define F288_FSELDEC 278
#define F288_FOEB 279
#define F288_FADR 280
/* TSTRATE */
#define R288_TSTRATE 115
#define F288_FORCEPHA 281
#define F288_TSTRATE6 282
#define F288_TSTRATE5 283
#define F288_FNEWALPHA 284
#define F288_FROT90 285
#define F288_FOFF 286
#define F288_FR1 287
#define F288_FR2 288
/* SELOUT */
#define R288_SELOUT 116
#define F288_EN_VLOG 289
#define F288_SELVIT60 290
#define F288_SELSYN3 291
#define F288_SELSYN2 292
#define F288_SELSYN1 293
#define F288_SELLIFO 294
#define F288_SELFIFO 295
#define F288_SELERR 296
/* FORCEIN */
#define R288_FORCEIN 117
#define F288_SELVITDATAIN 297
#define F288_FORCE_ACS 298
#define F288_TSTSYN 299
#define F288_TSTRAM64 300
#define F288_TSTRAM 301
#define F288_TSTERR2 302
#define F288_TSTERR1 303
#define F288_TSTACS 304
/* TSTFIFOL */
#define R288_TSTFIFOL 118
#define F288_TSTFIFO7 305
#define F288_TSTFIFO6 306
#define F288_TSTFIFO5 307
#define F288_TSTFIFO4 308
#define F288_TSTFIFO3 309
#define F288_FORMSB 310
#define F288_FORLSB 311
#define F288_TST_FIFO 312
/* TSTCK */
#define R288_TSTCK 119
#define F288_TSTCKRST 313
#define F288_TSTCKDIL 314
#define F288_FORCERATE1 315
#define F288_FORCESYMHA 316
#define F288_FORSYMAX 317
#define F288_DIRCKINT 318
/* TSTRES */
#define R288_TSTRES 120
#define F288_FRESYYY 319
#define F288_FREESRS 320
#define F288_FRESXXX 321
#define F288_FRESCAR 322
#define F288_FRESACS 323
#define F288_FRESYM 324
#define F288_FRESMAS 325
#define F288_FRESINT 326
/* TSTOUT */
#define R288_TSTOUT 121
#define F288_RBACT 327
#define F288_TS 328
#define F288_CTEST 329
/* TSTIN */
#define R288_TSTIN 122
#define F288_TEST_IN 330
#define F288_EN_ADC 331
#define F288_SGN_ADC 332
#define F288_BCLK_IN 333
#define F288_TP12 334
/* READREG */
#define R288_READREG 123
#define F288_READREG 335
/* TSTNR2 */
#define R288_TSTNR2 124
#define F288_DISEQC_IDDQ 336
#define F288_DISEQC_I2C 337
/* TSTDIS */
#define R288_TSTDIS 125
#define F288_EN_DIS 338
#define F288_EN_PTRS 339
#define F288_TST_DIS_5 340
#define F288_TST_DIS_4 341
#define F288_EN_DIS_FIFOS 342
#define F288_TST_PRO 343
#define F288_TST_REG 344
#define F288_TST_PRE 345
/* TSTDISRX */
#define R288_TSTDISRX 126
#define F288_EN_DISRX 346
#define F288_TST_CUR_SRC 347
#define F288_IN_DIGSIG 348
#define F288_HIZ_CUR_SRC 349
#define F288_PIN_SELECT_TST 350
#define F288_TST_DISRX 351
/* IOPSDAT */
#define R288_IOPSDAT 127
#define F288_SDAT_HIGHZ 352
#define F288_SDAT_CFG 353
#define F288_SDAT_XOR 354
/* IOPSCLT */
#define R288_IOPSCLT 128
#define F288_SCLT_HIGHZ 355
#define F288_SCLT_CFG 356
#define F288_SCLT_XOR 357
/* IOPAGC */
#define R288_IOPAGC 129
#define F288_AGC_HIGHZ 358
#define F288_AGC_CFG 359
#define F288_AGC_XOR 360
/* IOPDIRCLK */
#define R288_IOPDIRCLK 130
#define F288_DIRCLK_HIGHZ 361
#define F288_DIRCLK_CFG 362
#define F288_DIRCLK_XOR 363
/* IOPAUX */
#define R288_IOPAUX 131
#define F288_AUX_HIGHZ 364
#define F288_AUX_CFG 365
#define F288_AUX_XOR 366
/* IOPSTDBY */
#define R288_IOPSTDBY 132
#define F288_STDBY_HIGHZ 367
#define F288_STDBY_CFG 368
#define F288_STDBY_XOR 369
/* IOPCS0 */
#define R288_IOPCS0 133
#define F288_CS0_HIGHZ 370
#define F288_CS0_CFG 371
#define F288_CS0_XOR 372
/* IOPCS1 */
#define R288_IOPCS1 134
#define F288_CS1_HIGHZ 373
#define F288_CS1_CFG 374
#define F288_CS1_XOR 375
/* IOPSDISEQC */
#define R288_IOPSDISEQC 135
#define F288_DISEQC_HIGHZ 376
#define F288_DISEQC_CFG 377
#define F288_DISEQC_XOR 378
/* TBUSBIT */
#define R288_TBUSBIT 136
#define F288_BUS_CHOICE 379
#define F288_BUS_POSITION 380
/* TCOMP1 */
#define R288_TCOMP1 137
#define F288_SLEEPINHBT 381
#define F288_RA6SRC 382
#define F288_RA5SRC 383
#define F288_RA4SRC 384
#define F288_RA3SRC 385
#define F288_RA2SRC 386
#define F288_RA1SRC 387
#define F288_RA0SRC 388
/* TCOMP2 */
#define R288_TCOMP2 138
#define F288_ACCURATE 389
#define F288_COMPENS 390
#define F288_COMPTQ 391
#define F288_FREEZE 392
#define F288_CHIPSLEEP 393
/* TCOMPSTAT */
#define R288_TCOMPSTAT 139
#define F288_COMPOK 394
#define F288_A6SRC 395
#define F288_A5SRC 396
#define F288_A4SRC 397
#define F288_A3SRC 398
#define F288_A2SRC 399
#define F288_A1SRC 400
#define F288_A0SRC 401
/* Number of registers */
#define STX288_NBREGS 140
/* Number of fields */
#define STX288_NBFIELDS 402
long BinaryFloatDiv(long n1, long n2, int precision);
/****************************************************************
COMMON STRUCTURES AND TYPEDEF
****************************************************************/
typedef int FE_288_Handle_t;
/* Signal type enum */
typedef enum
{
NOAGC1=0,
AGC1OK,
NOTIMING,
ANALOGCARRIER,
TIMINGOK,
NOAGC2,
AGC2OK,
NOCARRIER,
CARRIEROK,
NODATA,
FALSELOCK,
DATAOK,
OUTOFRANGE,
RANGEOK
} FE_288_SIGNALTYPE_t;
typedef enum
{
FE_NO_ERROR,
FE_INVALID_HANDLE,
FE_ALLOCATION,
FE_BAD_PARAMETER,
FE_ALREADY_INITIALIZED,
FE_I2C_ERROR,
FE_SEARCH_FAILED,
FE_TRACKING_FAILED,
FE_TERM_FAILED
} FE_288_Error_t;
typedef enum
{
FE_BAND_LOW,
FE_BAND_HIGH
} FE_288_Bands_t;
typedef enum
{
FE_MOD_BPSK,
FE_MOD_QPSK
} FE_288_Modulation_t;
typedef enum
{
FE_POL_HORIZONTAL = 1,
FE_POL_VERTICAL = 1<<1
}FE_288_Polarization_t;
typedef enum
{
FE_LNB_CTRL_VOLT_AND_TONE = 0,
FE_LNB_CTRL_TONE_BURST,
FE_LNB_CTRL_DISEQC
}FE_288_LnbCtrlType_t;
typedef enum
{
FE_1_2 = 1,
FE_2_3 = 1<<1,
FE_3_4 = 1<<2,
FE_5_6 = 1<<3,
FE_6_7 = 1<<4,
FE_7_8 = 1<<5
}FE_288_Rate_t;
/****************************************************************
INIT STRUCTURES
****************************************************************/
typedef enum
{
FE_PARALLEL_CLOCK,
FE_PARALLEL_FIFO_CLOCK,
FE_SERIAL_MASTER_CLOCK,
FE_SERIAL_FIFO_CLOCK
} FE_288_Clock_t;
typedef enum
{
FE_PARITY_ON,
FE_PARITY_OFF
} FE_288_DataParity_t;
typedef enum
{
FE_DVB_STANDARD, /* The FEC mode corresponds to the DVB standard */
FE_DTV_STANDARD /* The FEC mode corresponds to the DTV standard */
} FE_288_CodingStandard_t;
/*
structure passed to the FE_288_Init() function
*/
typedef struct
{
char DemodName[20]; /* STX0288 name */
U8 DemodI2cAddr; /* STX0288 I2c address */
TUNER_Model_t TunerModel; /* Tuner model */
char TunerName[20]; /* Tuner name */
U8 TunerI2cAddr; /* Tuner I2c address */
FE_288_CodingStandard_t Standard; /* standard used : DVB, DSS ... */
FE_288_Clock_t Clock; /* Clock settings */
FE_288_DataParity_t Parity; /* parity of the data */
/* .. */
} FE_288_InitParams_t;
/****************************************************************
SEARCH STRUCTURES
****************************************************************/
typedef struct
{
U32 Frequency_Khz; /* transponder frequency (in KHz) */
U32 SymbolRate_Bds; /* transponder symbol rate (in bds) */
U32 SearchRange_Hz; /* range of the search (in Hz) */
FE_288_Modulation_t Modulation; /* modulation */
} FE_288_SearchParams_t;
typedef struct
{
BOOL Locked; /* Transponder found */
U32 Frequency_Khz; /* found frequency (in Khz) */
U32 SymbolRate_Bds; /* founded symbol rate (in Bds) */
FE_288_Rate_t Rate; /* puncture rate */
} FE_288_SearchResult_t;
/************************
INFO STRUCTURE
************************/
typedef struct
{
BOOL Locked; /* Transponder locked */
U32 Frequency; /* transponder frequency (in KHz) */
U32 SymbolRate; /* transponder symbol rate (in Mbds) */
FE_288_Modulation_t Modulation; /* modulation */
FE_288_Polarization_t Polarization; /* Polarization */
FE_288_Bands_t Band; /* Band */
FE_288_Rate_t Rate; /* puncture rate */
S32 Power_dBmx10; /* Power of the RF signal (dBm x 10) */
U32 CN_dBx10; /* Carrier to noise ratio (dB x 10) */
U32 BER; /* Bit error rate (x 10000) */
} FE_288_SignalInfo_t;
/****************************************************************
LOW LEVEL FUNCTIONS
****************************************************************/
STCHIP_Handle_t FE_288_InitHAL(char *ChipName,U8 I2cAddr);
/****************************************************************
API FUNCTIONS
****************************************************************/
FE_288_Handle_t FE_288_Init( FE_288_InitParams_t *pInit);
FE_288_Error_t FE_288_Search( FE_288_Handle_t Handle,
FE_288_SearchParams_t *pParams,
FE_288_SearchResult_t *pResult);
FE_288_Error_t FE_288_Status( FE_288_Handle_t Handle,
FE_288_SIGNALTYPE_t *SignalType);
FE_288_Error_t FE_288_GetSignalInfo( FE_288_Handle_t Handle,
FE_288_SignalInfo_t *pInfo);
FE_288_SIGNALTYPE_t FE_288_CheckData2(FE_288_Handle_t Handle); /*ncb*/
FE_288_Error_t FE_288_SetLnbPower(FE_288_Handle_t Handle,BOOL powerOn) ; /*ncb*/
FE_288_Error_t FE_288_SetPol( FE_288_Handle_t Handle,
FE_288_Polarization_t Polarization);
FE_288_Error_t FE_288_SetBand( FE_288_Handle_t Handle,
FE_288_Bands_t Band);
#if 0 /* formerly excluded lines */
FE_288_Error_t FE_288_DiseqcStart( FE_288_Handle_t Handle,
FE_288_Diseqc_t Diseqc);
#endif /* formerly excluded lines */
FE_288_Error_t FE_288_DiseqcSend( STCHIP_Info_t *hChip /* FE_288_Handle_t Handle */,
U8 *Data,
U32 NbData);
#if 0 /* formerly excluded lines */
FE_288_Error_t FE_288_DiseqcStop( FE_288_Handle_t Handle);
#endif /* formerly excluded lines */
FE_288_Error_t FE_288_Term(FE_288_Handle_t Handle);
#endif
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