288_drv.h

STV0299 Minituner driver, for ST chipset

#ifndef H_288DRV
	#define H_288DRV
	
	#include "chip.h"
	#include "tuner.h"
	
	/* Register map constants */
	/*	ID	*/
	#define R288_ID		0
	#define F288_CHIP_IDENT		0
	#define F288_RELEASE		1

	/*	I2CRPT	*/
	#define R288_I2CRPT		1
	#define F288_I2CT_ON		2
	#define F288_ENARPT_LEVEL		3
	#define F288_SCLT_DELAY		4
	#define F288_SCLT_VALUE		5
	#define F288_STOP_ENABLE		6
	#define F288_SDAT_VALUE		7

	/*	ACR	*/
	#define R288_ACR		2
	#define F288_PRESCALER		8
	#define F288_DIVIDER		9

	/*	F22FR	*/
	#define R288_F22FR		3
	#define F288_FFR_REG		10

	/*	F22RX	*/
	#define R288_F22RX		4
	#define F288_FRX_REG		11

	/*	DISEQC	*/
	#define R288_DISEQC		5
	#define F288_DIS_RESET		12
	#define F288_TIM_OFF		13
	#define F288_TIM_CMD		14
	#define F288_DIS_PRECHARGE		15
	#define F288_DISEQC_MODE		16

	/*	DISEQCFIFO	*/
	#define R288_DISEQCFIFO		6
	#define F288_DISEQC_FIFO1		17

	/*	DISEQCSTAT1	*/
	#define R288_DISEQCSTAT1		7
	#define F288_TX_FAIL		18
	#define F288_FIFO_FULL		19
	#define F288_TX_IDDLE		20
	#define F288_READ_WRITE_COUNTER		21

	/*	DISEQCSTAT2	*/
	#define R288_DISEQCSTAT2		8
	#define F288_GAPBURST_FLAG		22

	/*	DISEQC2	*/
	#define R288_DISEQC2		9
	#define F288_RECEIVER_ON		23
	#define F288_IGNORE_SH22KHZ		24
	#define F288_ONECHIP_TRX		25
	#define F288_EXT_ENVEL		26
	#define F288_PIN_SELECT		27
	#define F288_IRQ_RXEND		28
	#define F288_IRQ_HALF_FIFO		29

	/*	DISRX_ST0	*/
	#define R288_DISRX_ST0		10
	#define F288_RX_END		30
	#define F288_RX_ACTIVE		31
	#define F288_SHORT_22KHZ		32
	#define F288_RX_COUNT_TONE		33
	#define F288_FIFO_8B_READY		34
	#define F288_FIFO_EMPTY		35
	#define F288_RX_NON_BYTE		36
	#define F288_ABORT_DISEQC		37

	/*	DISRX_ST1	*/
	#define R288_DISRX_ST1		11
	#define F288_RX_FAIL		38
	#define F288_PARITY_FAIL		39
	#define F288_FIFO_OVERFLOW		40
	#define F288_FIFO_BYTENBR		41

	/*	DISTXWAIT	*/
	#define R288_DISTXWAIT		12
	#define F288_DISTXWAIT		42

	/*	TSREG	*/
	#define R288_TSREG		13
	#define F288_ITSTATUS_MODE		43
	#define F288_DEMOUNT_M		44
	#define F288_SERIAL_OUT_D0		45
	#define F288_OUTRS_HZ		46

	/*	AGC1C	*/
	#define R288_AGC1C		14
	#define F288_ENA_DCADJ		47
	#define F288_AVERAGE_ON		48
	#define F288_AGC_OPDRAIN		49
	#define F288_IAGC		50
	#define F288_AGCIQ_BETA		51

	/*	AGC1R	*/
	#define R288_AGC1R		15
	#define F288_AGC1R_REF		52

	/*	AGC1IN	*/
	#define R288_AGC1IN		16
	#define F288_AGC1_VALUE		53

	/*	RTC	*/
	#define R288_RTC		17
	#define F288_ALPHA_TMG		54
	#define F288_BETA_TMG		55

	/*	AGC2C0	*/
	#define R288_AGC2C0		18
	#define F288_AGC2COEFF		56

	/*	AGC2O	*/
	#define R288_AGC2O		19
	#define F288_AGC2_REF		57

	/*	STEP1	*/
	#define R288_STEP1		20
	#define F288_STEP_MINUS		58
	#define F288_STEP_PLUS		59

	/*	CFD	*/
	#define R288_CFD		21
	#define F288_CFD_ON		60
	#define F288_BETA_FC		61
	#define F288_FDCT		62
	#define F288_LDL		63

	/*	ACLC	*/
	#define R288_ACLC		22
	#define F288_DEROT_ON_OFF		64
	#define F288_ACLC		65
	#define F288_NOISE		66
	#define F288_ALPHA		67

	/*	BCLC	*/
	#define R288_BCLC		23
	#define F288_ALGO		68
	#define F288_BETA		69

	/*	R8PSK	*/
	#define R288_R8PSK		24
	#define F288_MODE_COEF		70

	/*	LDT	*/
	#define R288_LDT		25
	#define F288_LOCK_THRESHOLD		71

	/*	LDT2	*/
	#define R288_LDT2		26
	#define F288_LOCK_THRESHOLD2		72

	/*	DACR1	*/
	#define R288_DACR1		27
	#define F288_DAC_MODE		73
	#define F288_DACI_LSB		74

	/*	DACR2	*/
	#define R288_DACR2		28
	#define F288_DACI_MSB		75

	/*	TLIRM	*/
	#define R288_TLIRM		29
	#define F288_TMG_LOCK		76
	#define F288_TMG_FINAL_IND_MSB		77

	/*	TLIRL	*/
	#define R288_TLIRL		30
	#define F288_TMG_FINAL_IND_LSB		78

	/*	AGC2I1	*/
	#define R288_AGC2I1		31
	#define F288_AGC2_INTEGRATOR_MSB		79

	/*	AGC2I2	*/
	#define R288_AGC2I2		32
	#define F288_AGC2_INTEGRATOR_LSB		80

	/*	RTFM	*/
	#define R288_RTFM		33
	#define F288_TIMING_LOOP_FREQ_MSB		81

	/*	RTFL	*/
	#define R288_RTFL		34
	#define F288_TIMING_LOOP_FREQ_LSB		82

	/*	VSTATUS	*/
	#define R288_VSTATUS		35
	#define F288_CF		83
	#define F288_VSTATUS_6		84
	#define F288_VSTATUS_5		85
	#define F288_PRF		86
	#define F288_LK		87
	#define F288_PR		88

	/*	LDI	*/
	#define R288_LDI		36
	#define F288_LOCK_DET_INTEGR		89

	/*	ECNTM	*/
	#define R288_ECNTM		37
	#define F288_ERROR_COUNT_MSB		90

	/*	ECNTL	*/
	#define R288_ECNTL		38
	#define F288_ERROR_COUNT_LSB		91

	/*	SFRH	*/
	#define R288_SFRH		39
	#define F288_SYMB_FREQ_HSB		92

	/*	SFRM	*/
	#define R288_SFRM		40
	#define F288_SYMB_FREQ_MSB		93

	/*	SFRL	*/
	#define R288_SFRL		41
	#define F288_SYMB_FREQ_LSB		94

	/*	CFRM	*/
	#define R288_CFRM		42
	#define F288_CARRIER_FREQUENCY_MSB		95

	/*	CFRL	*/
	#define R288_CFRL		43
	#define F288_CARRIER_FREQUENCY_LSB		96

	/*	NIRM	*/
	#define R288_NIRM		44
	#define F288_NOISE_IND_MSB		97

	/*	NIRL	*/
	#define R288_NIRL		45
	#define F288_NOISE_IND_LSB		98

	/*	VERROR	*/
	#define R288_VERROR		46
	#define F288_ERROR_VAL		99

	/*	FECM	*/
	#define R288_FECM		47
	#define F288_FECMODE		100
	#define F288_FECM3		101
	#define F288_VIT_DIFF		102
	#define F288_SYNC		103
	#define F288_SYM		104

	/*	VTH0	*/
	#define R288_VTH0		48
	#define F288_VTH0		105

	/*	VTH1	*/
	#define R288_VTH1		49
	#define F288_VTH1		106

	/*	VTH2	*/
	#define R288_VTH2		50
	#define F288_VTH2		107

	/*	VTH3	*/
	#define R288_VTH3		51
	#define F288_VTH3		108

	/*	VTH4	*/
	#define R288_VTH4		52
	#define F288_VTH4		109

	/*	VTH5	*/
	#define R288_VTH5		53
	#define F288_VTH5		110

	/*	PR	*/
	#define R288_PR		54
	#define F288_E7		111
	#define F288_E6		112
	#define F288_PR_7_8		113
	#define F288_PR_6_7		114
	#define F288_PR_5_6		115
	#define F288_PR_3_4		116
	#define F288_PR_2_3		117
	#define F288_PR_1_2		118

	/*	VAVSRCH	*/
	#define R288_VAVSRCH		55
	#define F288_AM		119
	#define F288_F		120
	#define F288_SN		121
	#define F288_TO		122
	#define F288_H		123

	/*	RS	*/
	#define R288_RS		56
	#define F288_DEINT		124
	#define F288_OUTRS_PS		125
	#define F288_RS		126
	#define F288_DESCRAM		127
	#define F288_ERR_BIT		128
	#define F288_MPEG		129
	#define F288_CLK_POL		130
	#define F288_CLK_CFG		131

	/*	RSOUT	*/
	#define R288_RSOUT		57
	#define F288_INV_DVALID		132
	#define F288_INV_DSTART		133
	#define F288_INV_DERROR		134
	#define F288_EN_STBACKEND		135
	#define F288_ENA8_LEVEL		136

	/*	ERRCTRL	*/
	#define R288_ERRCTRL		58
	#define F288_ERRMODE		137
	#define F288_TSTERS		138
	#define F288_ERR_SOURCE		139
	#define F288_ECOL3		140
	#define F288_RESET_CNT		141
	#define F288_NOE		142

	/*	VITPROG	*/
	#define R288_VITPROG		59
	#define F288_VITPROG_7		143
	#define F288_VITPROG_6		144
	#define F288_VITPROG_5		145
	#define F288_SWAP_ENABLE		146
	#define F288_VITPROG_3		147
	#define F288_VITPROG_2		148
	#define F288_MDIVIDER		149

	/*	ERRCTRL2	*/
	#define R288_ERRCTRL2		60
	#define F288_ERRMODE2		150
	#define F288_TSTERS2		151
	#define F288_ERR_SOURCE2		152
	#define F288_ECOL3_2		153
	#define F288_RESET_CNT2		154
	#define F288_NOE2		155

	/*	ECNTM2	*/
	#define R288_ECNTM2		61
	#define F288_ERROR_COUNT2_MSB		156

	/*	ECNTL2	*/
	#define R288_ECNTL2		62
	#define F288_ERROR_COUNT2_LSB		157

	/*	PLLCTRL	*/
	#define R288_PLLCTRL		63
	#define F288_PLL_MDIV		158

	/*	SYNTCTRL	*/
	#define R288_SYNTCTRL		64
	#define F288_STANDBY		159
	#define F288_PLL_STOP		160
	#define F288_SEL_OSCI		161
	#define F288_PLL_SELRATIO		162
	#define F288_BYP_PLL_ADC		163
	#define F288_BYPASS_PLL		164

	/*	TSTTNR1	*/
	#define R288_TSTTNR1		65
	#define F288_ADC_INVCLK		165
	#define F288_ADC_PON		166
	#define F288_ADC_INMODE		167
	#define F288_OSCI_STOP_I2C		168
	#define F288_REGPOFF		169

	/*	IRQMSKM	*/
	#define R288_IRQMSKM		66
	#define F288_IRQ_MSK_MSB		170

	/*	IRQMSKL	*/
	#define R288_IRQMSKL		67
	#define F288_IRQ_MSK_LSB		171

	/*	IRQSTATM	*/
	#define R288_IRQSTATM		68
	#define F288_IRQ_STATUS_MSB		172

	/*	IRQSTATL	*/
	#define R288_IRQSTATL		69
	#define F288_IRQ_STATUS_LSB		173

	/*	IRQCFG	*/
	#define R288_IRQCFG		70
	#define F288_INV1		174
	#define F288_CHOICE1		175
	#define F288_INV2		176
	#define F288_CHOICE2		177

	/*	SYMBCTRL	*/
	#define R288_SYMBCTRL		71
	#define F288_SYMB_CHOICE		178

	/*	ISYMB	*/
	#define R288_ISYMB		72
	#define F288_I_SYMB		179

	/*	QSYMB	*/
	#define R288_QSYMB		73
	#define F288_Q_SYMB		180

	/*	ASCTRL	*/
	#define R288_ASCTRL		74
	#define F288_FROZE_LOCK		181
	#define F288_KI		182
	#define F288_AUTOCENTRE		183
	#define F288_FINE		184
	#define F288_COARSE		185

	/*	COARP1	*/
	#define R288_COARP1		75
	#define F288_KT		186

	/*	COARP2	*/
	#define R288_COARP2		76
	#define F288_KC		187
	#define F288_KS		188

	/*	FMINM	*/
	#define R288_FMINM		77
	#define F288_STOP_ON_FMIN		189
	#define F288_FMIN_MSB		190

	/*	FMINL	*/
	#define R288_FMINL		78
	#define F288_FMIN_LSB		191

	/*	FMAXM	*/
	#define R288_FMAXM		79
	#define F288_STOP_ON_FMAX		192
	#define F288_FMAX_MSB		193

	/*	FMAXL	*/
	#define R288_FMAXL		80
	#define F288_FMAX_LSB		194

	/*	FINEINC	*/
	#define R288_FINEINC		81
	#define F288_FINE_INCR		195

	/*	STEP2	*/
	#define R288_STEP2		82
	#define F288_STEP2_MINUS		196
	#define F288_STEP2_PLUS		197

	/*	TH2	*/
	#define R288_TH2		83
	#define F288_TH2_MSB		198

	/*	TH2_TH1	*/
	#define R288_TH2_TH1		84
	#define F288_TH2_LSB		199
	#define F288_TH1_MSB		200

	/*	TH1	*/
	#define R288_TH1		85
	#define F288_TH1_LSB		201

	/*	THH	*/
	#define R288_THH		86
	#define F288_THH		202

	/*	IND1MAX	*/
	#define R288_IND1MAX		87
	#define F288_IND1_TRESH		203

	/*	ACCU1VAL	*/
	#define R288_ACCU1VAL		88
	#define F288_IND1_ACC		204

	/*	ACCU2VAL	*/
	#define R288_ACCU2VAL		89
	#define F288_IND2_ACC		205

	/*	IOPGPIO0	*/
	#define R288_IOPGPIO0		90
	#define F288_IOP0_HIGHZ		206
	#define F288_IOP0_CFG		207
	#define F288_IOP0_XOR		208

	/*	IOPGPIO1	*/
	#define R288_IOPGPIO1		91
	#define F288_IOP1_HIGHZ		209
	#define F288_IOP1_CFG		210
	#define F288_IOP1_XOR		211

	/*	IOPGPIO2	*/
	#define R288_IOPGPIO2		92
	#define F288_IOP2_HIGHZ		212
	#define F288_IOP2_CFG		213
	#define F288_IOP2_XOR		214

	/*	IOPGPIO3	*/
	#define R288_IOPGPIO3		93
	#define F288_IOP3_HIGHZ		215
	#define F288_IOP3_CFG		216
	#define F288_IOP3_XOR		217

	/*	IOPGPIO4	*/
	#define R288_IOPGPIO4		94
	#define F288_IOP4_HIGHZ		218
	#define F288_IOP4_CFG		219
	#define F288_IOP4_XOR		220

	/*	IOPGPIO5	*/
	#define R288_IOPGPIO5		95
	#define F288_IOP5_HIGHZ		221
	#define F288_IOP5_CFG		222
	#define F288_IOP5_XOR		223