ct202.c

来自「QPSK Tuner details, for conexant chipset」· C语言 代码 · 共 2,621 行 · 第 1/5 页

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/*author: Tang HU*/
/*SetTsType*/
/*BER masaic issue*/
/*ReSync*/
#include <math.h>
#include "cshdi_typedef.h"
#include "cs_qpsk.h"
#include "cs_frnpublic.h"
#include "CT202.h"
#include "cs_i2c.h"
#include "cs_os.h"


#define DLL_VERSION			// LabView strings do not play nicely in the device handle
#define BERSTART			// makes CNR/RS/Viterbi SetBER functions also start the measurement
#define REVC	1
#define REVD	1
#define TIME_DELAY_BETWEEN_COMMAND 15
HCSHANDLE g_CTK202A[MAX_TUNER_NUM];
#ifdef DLL_VERSION
static u32 tuner_adc_fs;
#endif

static u8 u8Version = 3;		//CT202 Version	
static u32 stu32symbolrate = 33000;//Jeff 20060830
static u32 stu32freq = 940000;//Jeff 20060830
int g_nLockStatus = 0;
int g_nReSyncCnt = 0;/*add by th on 070111 for masaic issue*/
BYTE g_ucTSMode = 0;/*add by th on 070126 for config TS mode*/
int g_nPercent = 0;/*CT202 STS process indicator add by th on 070515*/
//********************************************************************************
//CONSTANTS
//********************************************************************************
// register default initialization
static UINT8 INIT_REGISTERS[][2]={
{0x01,  0x28},// set i2c_inc_disable
{0x20,  0x03},
{0x27,  0x20},
{0xE0,  0x45},
{0xE1,  0x08},
{0xFE,  0x01},
{0x01,  0x28},
{0x89,  0x09},
{0x04,  0x80},
{0x05,  0x01},
{0x06,  0x00},
{0x20,  0x03},
{0x24,  0x88},////th modify
{0x29,  0x09},////carrier offset search range//1.1Mth 
{0x2A,  0x0F},
{0x2C,  0x10},
{0x2D,  0x19},
{0x2E,  0x08},
{0x2F,  0x10},
{0x30,  0x19},
{0x34,  0x20},
{0x35,  0x03},
{0x45,  0x02},
{0x46,  0x45},
{0x47,  0xD0},
{0x48,  0x00},
{0x49,  0x40},
{0x4A,  0x03},
{0x4C,  0xFD},
{0x4F,  0x2E},
{0x50,  0x2E},
{0x51,  0x10},
{0x52,  0x10},
{0x56,  0x92},
{0x59,  0x00},
{0x5A,  0x2D},
{0x5B,  0x33},    
{0x5C,  0x1F},
{0x5F,  0x76},
{0x62,  0xC0},
{0x63,  0xC0},
{0x64,  0xF3},
{0x65,  0xF3},
{0x79,	0x40},
{0x6A,  0x40},
{0x6B,  0x0A},
{0x6C,  0x80},
{0x6D,  0x27},
{0x71,  0x06},
{0x75,  0x60},
{0x78,  0x00},
{0x79,  0xB5},
{0x7C,  0x05},
{0x7D,  0x1A},
{0x87,  0x55},
{0x88,  0x72},
{0x8F,  0x08},
{0x90,  0xE0},
{0x94,  0x40},
{0xA0,  0x3F},
{0xA1,  0xC0},
{0xA4,  0xCC},
{0xA5,  0x66},
{0xA6,  0x66},
{0xA7,  0x7B},
{0xA8,  0x7B},
{0xA9,  0x7B},
{0xAA,  0x9A},
{0xED,  0x04},
{0xAD,  0x00},
{0xAE,  0x03},
{0xCC,  0xAB},
{0x01,  0x08},// clear i2c_inc_disable
{0xff,	0xff} //end marker
};
/*
//column is window length (1024,4096,16384,65536)
//row index is Eb/No
static u16 CNE_0_3_0_LOOKUP_EB_NO[17][4]=
{									
{	65535	,	65535	,	65535	,	65535	}	,
{	65525	,	65525	,	65525	,	65525	}	,
{	193	,	768	,	3072	,	12281	}	,
{	170	,	677	,	2708	,	10834	}	,
{	144	,	573	,	2289	,	9153	}	,
{	118	,	470	,	1878	,	7494	}	,
{	93	,	368	,	1469	,	5862	}	,
{	68	,	271	,	1084	,	4327	}	,
{	48	,	189	,	756	,	3016	}	,
{	31	,	122	,	485	,	1931	}	,
{	18	,	72	,	286	,	1137	}	,
{	10	,	39	,	154	,	609	}	,
{	5	,	18	,	73	,	283	}	,
{	2	,	8	,	29	,	110	}	,
{	1	,	3	,	9	,	31	}	,
{	0	,	1	,	2	,	6	}	,
{	0	,	0	,	0	,	1	}	
};								


static u16 CNE_0_3_5_LOOKUP_EB_NO[17][4]=
{									
{	65535	,	65535	,	65535	,	65535	}	,
{	65525	,	65525	,	65525	,	65525	}	,
{	227	,	905	,	3618	,	14466	}	,
{	204	,	811	,	3243	,	12951	}	,
{	177	,	705	,	2819	,	11258	}	,
{	149	,	594	,	2373	,	9481	}	,
{	121	,	483	,	1928	,	7704	}	,
{	94	,	377	,	1502	,	5997	}	,
{	70	,	279	,	1111	,	4428	}	,
{	49	,	194	,	773	,	3078	}	,
{	32	,	128	,	507	,	2017	}	,
{	20	,	77	,	304	,	1207	}	,
{	11	,	41	,	162	,	641	}	,
{	5	,	20	,	78	,	306	}	,
{	2	,	9	,	33	,	129	}	,
{	1	,	3	,	11	,	42	}	,
{	0	,	1	,	3	,	10	}	
};									
						

static u16 CNE_0_4_0_LOOKUP_EB_NO[17][4]=
{
{	65535	,	65535	,	65535	,	65535	}	,
{	394	,	1551	,	6410	,	24214	}	,
{	335	,	1212	,	5454	,   19358   }	,
{	286	,	1141	,	4565	,	18313	}	,
{	262	,	1042	,	4160	,	16652	}	,
{	233	,	943	,	3768	,	15123	}	,
{	205	,	834	,	3339	,	13346	}	,
{	189	,	726	,	2914	,	11614	}	,
{	148	,	592	,	2385	,	9481	}	,
{	121	,	491	,	1946	,	7863	}	,
{	96	,	380	,	1519	,	6064	}	,
{	70	,	275	,	1122	,	4380	}	,
{	50	,	201	,	788	,	3165	}	,
{	33	,	133	,	557	,	2100	}	,
{	23	,	87	,	325	,	1412	}	,
{	12	,	49	,	193	,	766	}	,
{	0	,	0	,	0	,	0	}	
};*/

#if 0
#define CTNIM_L_DEBUG(p) 		////////printf p
#else
#define CTNIM_L_DEBUG(p)
#endif

//********************************************************************************
//LOW LEVEL READ/WRITES
//********************************************************************************
CSQPSK_Error_t CT202ADiSEqCReset(CSHDITunerIndex bTunerIndex);
bool8 GetReg(HCSHANDLE handle, u8 addr, u8 *u8data, u16 byteCount)
{	
	DWORD u32Handle;
	if (CSI2CRequestBus(0, CSHDI_TIMEOUT_INFINITY) != CSI2C_SUCCESS)
	{
		////////printf("get reg failed!!!!!!!!!!!!!!!");
        	return FALSE;
	}

	if(CSI2CWriteWithoutStop(handle, &addr, 1) !=CSI2C_SUCCESS)		
	{
		////////printf(("\n>> RegisterRead2wb Fail (01)\n"));
		CSI2CReleaseBus(0);
		return FALSE;
	}
	CSSleep(2);
	//CSSleep(2);/*no delay will cause can not lock!!!*/
	if(CSI2CReadWithStop(handle, u8data, byteCount) != CSI2C_SUCCESS )
	{
		////////printf(("\n>> RegisterRead2wb Fail (02)\n"));   
		CSI2CReleaseBus(0);		
		return FALSE;
	}
	CSSleep(2);
	//CSSleep(2);/*no delay will cause can not lock!!!*/
	CSI2CReleaseBus(0);
	return (TRUE);
}

bool8 SetReg(HCSHANDLE handle, u8 addr, u8 *u8data, u16 byteCount)
{	
	u32 u32Handle;
	int i ;
	BYTE	u8TempBuffer[16];
	
	if(byteCount > 16)
	{
		////////printf(("\n>> RegisterWrite2wb Fail (00)\n"));
		return(FALSE);
	}
		
	
	u8TempBuffer[0] = addr;
	for(i=0; i<byteCount; i++)
		u8TempBuffer[i+1] = u8data[i];
	
	byteCount += 1;					
		
	if (CSI2CRequestBus(0, CSHDI_TIMEOUT_INFINITY) != CSI2C_SUCCESS)
	{

		////////printf(("\n>>CSI2CRequestBus failed!!!!!!!!!!!\n"));
		return FALSE;
	}

	if(CSI2CWriteWithStop(handle, u8TempBuffer, byteCount) != CSI2C_SUCCESS )
	{
		CSI2CReleaseBus(0);
		////////printf(("\n>> RegisterWrite2wb Fail (02)\n"));
		return(FALSE);
	}
	//CSSleep(5);
	CSSleep(2);/*no delay will cause can not lock!!!*/
	if (CSI2C_SUCCESS != CSI2CReleaseBus(0))
	{
		////////printf("CSI2CReleaseBus failed!!!!!!!!!!");
		return FALSE;
	}	
	return (TRUE);
}

//********************************************************************************
//INITIALIZATION
//********************************************************************************
//function initializes the device handle specified in 2.1.6 and sets up the device抯 modulation type and system mode.
bool8 Initial()
//i2c_funcPtr	Pointer to user-specified I2C Wrapper.
//mod []	Modulation type:  BPSK or QPSK
//sysmode []	System mode:  DVB or DSS
{
	
	BYTE reg1, reg2;
	//BYTE reg[2];
	u16 i;
	bool8 status;

	status = PASS;
	reg1 = 0;

	//initialize registers using default settings
	for(i = 0; i < sizeof(INIT_REGISTERS) / 2; ++i)
	{
		if(INIT_REGISTERS[i][0]==0xff && INIT_REGISTERS[i][1]==0xff)
			break;
		//////////printf("i ==  %d  ",i); 
		reg1 = INIT_REGISTERS[i][0];
		reg2 = INIT_REGISTERS[i][1];

		//status |= SetReg(TUNER_I2C_ADDRESS,INIT_REGISTERS[i][0],&INIT_REGISTERS[i][1],0x01);
		status &= SetReg(TUNER_I2C_ADDRESS,reg1,&reg2,0x01);
		//////////printf("i ==  %d  ",i); 
	}

	//set modulation scheme
	/*if(!strncmp(mod,"QPSK",4) //mod == "QPSK" )
		reg1 |= 0x08;
	else
		if ( !strncmp(mod,"BPSK",4) )
			reg1 |= 0x00;
		else
		{
			//////////printf("\nERROR: Unknown modulation selection\n");
			return FAIL;
		}

	//set system mode
	if( !strncmp(sysmode,"DVB",3))
		reg1 |= 0x00;
	else
		if ( !strncmp(sysmode,"DSS",3) )
			reg1 |= 0x01;
		else
		{
			//////////printf("\nERROR: Unknown system mode selection\n");
			return FAIL;
		}*/
	
	reg1 = 0x08;  //QPSK & DVB MODE
	//write register 0x01
	status = SetReg(TUNER_I2C_ADDRESS,SYSTEM_MODE_REG,&reg1,0x01);
	if(status != PASS) return status;

	GetPartnum(&reg1,0);
	////////printf("ChipID:%hx\n", reg1);
	GetRevision(&u8Version);		
	////////printf("Revision:%hx\n", u8Version);

#ifdef CT202A
	if( (reg1 != 0x02 && reg1 != 0x03) || u8Version != 0x03 )
	{
		////////printf("CT202A ChipID fail\n");
		return FALSE;
	}
#else
	if( reg1 != 0x01 )
	{
		////////printf("CT202B ChipID fail\n");
		return FALSE;
	}
#endif
#if 0
#ifndef DLL_VERSION
	//load structure device specs
	status = GetPartnum(*hDevicePtr,(*hDevicePtr).partnum);
	if(status != PASS) return status;
	status = GetRevision(*hDevicePtr,(*hDevicePtr).revcode);
#endif
#endif
	return status;
}

bool8 GetPartnum (u8 *partnum,CSHDITunerIndex bTunerIndex)
{
	UINT8 reg0;
	bool8 status;

	status = PASS;

	status = GetReg(g_CTK202A[bTunerIndex], REVISION_REG, &reg0, 1);
    *partnum = (reg0 >> 4) & 0x03;

	return status;
}

bool8 GetRevision (u8 *revcode)
{
	UINT8 reg0;
	bool8 status;

	status = PASS;

	status = GetReg(TUNER_I2C_ADDRESS, REVISION_REG, &reg0, 1);
	*revcode = (reg0 & 0x0F);

	return status;
}

bool8 SetTS (ts_ctrl_S ts_info)
{
	UINT8 reg2_3[2];
	
	bool8 status;

	status = PASS;
	
	reg2_3[0] = 
		ts_info.ts_mode + (ts_info.ts_sdata_form << 1) + (ts_info.ts_clk_edge << 2)
		+ (ts_info.ts_clk_mode << 3) + (ts_info.ts_strt_len << 4) + (ts_info.ts_sync_pol << 5)
		+ (ts_info.ts_val_pol << 6) + (ts_info.ts_err_pol << 7);

	reg2_3[1] = 
		ts_info.ts_sclk_rate +(ts_info.ts_parity << 2) + (ts_info.ts_data_delay << 3)
		+ (ts_info.ts_clk_delay << 4) + (ts_info.ts_pclk_smooth << 5);

	status = SetReg(TUNER_I2C_ADDRESS, TS_CONTROL_REG_1, reg2_3, 0x02);

	return status;
}

//********************************************************************************
//SIGNAL ACQUISITION
//freq: MHz
//datarate: KHz
//********************************************************************************
bool8 SetTune(u32 freq, u32 datarate,CSHDITunerIndex bTunerIndex)
{
	//OUTPUTS
	unsigned char coarse_tune_freq; //in MHz
	u32 fine_tune_freq; //in MHz
	unsigned char sample_rate=0; //in MHz

	u32 symbol_rate;
	//REGISTERS
	unsigned char fine_tune_l_h[2];
	bool8 inband_interferer_ind; //boolean

	//INTERMEDIATE VALUES
	float icoarse_tune_freq; //in MHz
	float ifine_tune_freq; //in MHz
	float band_high;
	float band_low;
	float x1;
	float x2;
	u16 i;
	bool8 inband_interferer_div2[ALLOWABLE_FS_COUNT]=
		{FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE};
	bool8 inband_interferer_div4[ALLOWABLE_FS_COUNT]=
		{FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE,FALSE};

	bool8 status;

	//CONSTANTS
	// allowable sample rates
	double afs[ALLOWABLE_FS_COUNT]={200, 192, 193, 194, 195,
									196, 204, 205, 206, 207};

	float if_limit_high; //MHz
	float if_limit_low; //MHz

	float LNB_lo; //MHz
	float LBN_uncertainty; // MHz +/- 

	float RF_freq; //this needs to be a parameter of the function, in Hz
	float data_rate; //in MS/s

    //redundant
	//for(i=0;i<ALLOWABLE_FS_COUNT;++i)
		//inband_interferer_div2[i] = inband_interferer_div4[i] = FALSE;

	//if_limit_high = -70; //MHz
	//if_limit_low = -10; //MHz

	//LNB_lo = 0; //MHz
	//LBN_uncertainty = 0; // MHz +/- 

	//RF_freq = (float)freq /1000.0; //this needs to be a parameter of the function, in Hz
	//data_rate = datarate/1000000.0; //in MS/s

	RF_freq = (float)freq; //this needs to be a parameter of the function, in Hz
	//data_rate = datarate/1000.0; //in MS/s

	status = PASS;

	
	//band_low = (RF_freq - LNB_lo);
	//band_low -= ((LBN_uncertainty * 2.0) + (data_rate * 1.35))/2.0;

	//band_high = (RF_freq - LNB_lo); 
	//band_high += ((LBN_uncertainty * 2.0) + (data_rate * 1.35))/2.0;

	//////////printf("band_low%ld, band_high%ld", (u32)band_low, (u32)band_high );

	icoarse_tune_freq = 10.0 * floor(((RF_freq) + 40)/10.0);
	ifine_tune_freq = RF_freq - icoarse_tune_freq ;

/*
	for(i = 0;i < ALLOWABLE_FS_COUNT;++i)
	{
		x1 = floor((RF_freq - LNB_lo) / (afs[i]/4.0));
		x1 *=  (afs[i]/4.0);
		x1 += (afs[i]/4.0);

		x2 = floor((RF_freq - LNB_lo) / (afs[i]/4.0));
		x2 *= (afs[i]/4.0);

		//////////printf("inband_interferer_div4: x1:%ld, x2:%ld\n", (u32)x1, (u32)x2 );
		if(  ( (band_low < x1)&&(x1<band_high) ) || ( (band_low < x2)&&(x2<band_high) )  )
		{
			inband_interferer_div4[i] = TRUE;
		}

	}

	for(i=0;i<ALLOWABLE_FS_COUNT;++i)
	{
		x1 = floor((RF_freq - LNB_lo) / (afs[i]/2.0)); 
		x1 *= (afs[i]/2.0) + afs[i]/2.0;
		
        x2 = floor((RF_freq - LNB_lo) / (afs[i]/2.0));
		x2 *= (afs[i]/2.0);

		//////////printf("inband_interferer_div2: x1:%ld, x2:%ld\n", (u32)x1, (u32)x2 );
		if(  ( (band_low < x1)&&(x1<band_high) ) || ( (band_low < x2)&&(x2<band_high) )  )
		{
			inband_interferer_div2[i] = TRUE;
		}
	}
		
	inband_interferer_ind = TRUE;
	for(i=0;i<ALLOWABLE_FS_COUNT;++i)
	{
		inband_interferer_ind &= (inband_interferer_div2[i] | inband_interferer_div4[i]);
	}

	if(inband_interferer_ind)
	{
		for(i=0;i<ALLOWABLE_FS_COUNT;++i)
		{
			if(inband_interferer_div2[i]==FALSE)
			{
				sample_rate=afs[i];
				//////////printf("1afs i:%d\n", i);
				break;
			}
		}
	}
	else
12345

ct202.c - 源码说明

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