stv0299drv.c

QPSK Tuner details, for conexant chipset.

/*************************************************************************

* Stv0299drv.C                                                        *

* Copyright ? Shenzhen Coship Electronics Co.#,LTD.  2002.3             *

* All rights reserved.                                                  *

*                                                                       *

* Author: Zhou Cheng                                                    *

* Date:  2002/3/13                                                      *

* Compiler:					                                             *

*                                                                       *

* Description:	STV0299 QPSK Link IC Driver								*

* Notes:                                                                *

* Update:   2002/3/6  Zhou Cheng										*

*************************************************************************/
#include "cs_typedef.h"
#include "CSHDI_typedef.h"
#include "CSQpskCFG.h"
#include "cs_qpsk.h"
#include "STV0299DRV.h"
#include "cs_os.h"
#include "CS_I2c.h"
#include "Allcommand.h"
#include "cs_frnpublic.h"
#include "cs_gpio.h"
#include "cs_assert.h"
#include "cs_os.h"
#include "Ix2360drv.h"
#include "Ix2273drv.h"
#include "LGTunerDRV.h"
#include "zl10039.h"

//#define STV0299_DEBUG

#define DiSEqCMODE_MASK		0x03
#define PORTCTRL_MASK			0x07
#define TONEBURST_MASK			0x04
#define MODULATED_BURST		0x04
#define UNMODULATED_BURST		0x0
#define FIFO_FULL_MASK			0x01

#define CFOUND_FLAG			0x80
#define TPLOCK_FLAG				0x08
#define VSTATUS_MASK			0x88
#define STV0299_ID				0xA1

/* STV0299 Register VENRATE (0x09) Puncture rate enable */
#define STV0299_VENRATE_E0_MSK  (0x01)  /* Enable Basic Puncture Rate 1/2 */
#define STV0299_VENRATE_E1_MSK  (0x02)  /* Enable Puncture Rate 2/3 */
#define STV0299_VENRATE_E2_MSK  (0x04)  /* Enable Puncture Rate 3/4 */
#define STV0299_VENRATE_E3_MSK  (0x08)  /* Enable Puncture Rate 5/6 */
#define STV0299_VENRATE_E4_MSK  (0x10)  /* Enable Puncture Rate 6/7 Mode B
                                           or 7/8 Mode A */
                                           
#define PERROW  3

DWORD g_ppdwSegSymbR[][PERROW]={
	{ 0,800,50},
	{ 2500,800,80},
	{ 4000,700,100},
	{10000,500,250},
	{0xffffffff,500,500}
};

static int	g_nASIInSelect[MAX_TUNER_NUM];
static int g_nASIStatusPin[MAX_TUNER_NUM];
static int g_nTSOutputMode[MAX_TUNER_NUM];
static HCSHANDLE hSTV0299I2C[MAX_TUNER_NUM];

extern BYTE g_bPLLICType[MAX_TUNER_NUM];
extern BYTE g_bLinkICType[MAX_TUNER_NUM];
extern int		g_nFrequencyOffset[MAX_TUNER_NUM];

CSQPSK_Error_t STV0299GetDerotFreq (CSHDITunerIndex bTunerIndex, int *nDerotFrequency);

// add by sfg for complier
static CSQPSK_Error_t STV0299WaitDiSEqCFree (CSHDITunerIndex bTunerIndex);

CSQPSK_Error_t STV0299ConfigTSOutMode (CSHDITunerIndex bTunerIndex, int nTSOutMode)
{
	if ((TS_PARALLEL == nTSOutMode) || (TS_SERIAL == nTSOutMode))
	{
		g_nTSOutputMode[bTunerIndex] = nTSOutMode;
                
		return CSQPSK_SUCCESS;
	}
	else
		return CSQPSK_INVALID_PARAM;
}

CSQPSK_Error_t STV0299Init(CSHDITunerIndex bTunerIndex)
{
	int ErrorCode;	
	
	hSTV0299I2C[bTunerIndex] = 0;
	ErrorCode = CSI2COpen(bTunerIndex,STV0299_ADDR,&hSTV0299I2C[bTunerIndex]);
	if ( ErrorCode != CSI2C_SUCCESS)
	{
		return CSQPSK_I2C_ERROR;
	}

	return CSQPSK_SUCCESS;
}
/* +==========================================================================+ */
/* | Function:	OrSTV0299P4J}>]												  |	*/		
/* | Input:		FpJ<<D4fFwKwR}:E											  |	*/
/* | 			V8OrJ}>]5DV8Uk												  |	*/
/* | 			4}P4HkJ}>]8vJ}												  |	*/
/* | Output:	N^															  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */
CSQPSK_Error_t STV0299WrtReg ( CSHDITunerIndex bTunerIndex, BYTE StartReg, BYTE *pbValue, DWORD dwLength )
{
	DWORD ii;
	int ErrorCode;
	BYTE bValue[64];

	if(dwLength>=64)
		return CSQPSK_INVALID_PARAM;

	bValue[0] = StartReg;

	for ( ii = 1; ii < dwLength+1; ii++ )
		bValue[ii] = *pbValue++;

	if ( CSI2CRequestBus_inner(bTunerIndex, CSHDI_TIMEOUT_INFINITY) == CSI2C_SUCCESS )
	{
		ErrorCode = CSI2CWriteWithStop ( hSTV0299I2C[bTunerIndex], bValue, dwLength+1) ;  
		CSI2CReleaseBus_inner(bTunerIndex);
		if (ErrorCode == CSI2C_SUCCESS)
		{
			return CSQPSK_SUCCESS;
		}
	}

	return CSQPSK_I2C_ERROR;
}	


CSQPSK_Error_t STV0299WriteReg ( CSHDITunerIndex bTunerIndex, BYTE StartReg, BYTE *pbValue, DWORD dwLength )
{
	DWORD ii;
	int ErrorCode;
	BYTE bValue[64];

	if(dwLength>=64)
		return CSQPSK_INVALID_PARAM;

	bValue[0] = StartReg;

	for ( ii = 1; ii < dwLength+1; ii++ )
		bValue[ii] = *pbValue++;

	ErrorCode = CSI2CWriteWithStop ( hSTV0299I2C[bTunerIndex], bValue, dwLength+1) ;  
	if (ErrorCode!=CSI2C_SUCCESS)
	{
		return CSQPSK_I2C_ERROR;
	}

	return CSQPSK_SUCCESS;
}	


/* +==========================================================================+ */
/* | Function:	4SSTV02996AR;4.J}>]											  |	*/		
/* | Input:		FpJ<<D4fFwKwR}:E											  |	*/
/* | 			V8OrJ}>]5DV8Uk												  |	*/
/* | 			4}6AHkJ}>]8vJ}												  |	*/
/* | Output:	6A3v5DJ}>]													  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t STV0299RdReg(CSHDITunerIndex bTunerIndex, BYTE bStartReg, BYTE *pbValue, DWORD dwLength )
{
	int nResult= CSQPSK_SUCCESS;
	BYTE bValue;

	if ( CSI2CRequestBus_inner(bTunerIndex, CSHDI_TIMEOUT_INFINITY) == CSI2C_SUCCESS )
	{
		bValue = bStartReg;

		if ( CSI2CWriteWithStop ( hSTV0299I2C[bTunerIndex], &bValue, 1 ) != CSI2C_SUCCESS ) 
			nResult = CSQPSK_I2C_ERROR;

		if ( CSI2CReadWithStop (hSTV0299I2C[bTunerIndex], pbValue, dwLength ) !=CSI2C_SUCCESS )
			nResult = CSQPSK_I2C_ERROR;

		CSI2CReleaseBus_inner(bTunerIndex);
	}
	else
		nResult = CSQPSK_I2C_ERROR;

	return nResult;
}	
// end STV0299RdReg()
CSQPSK_Error_t STV0299ReadReg(CSHDITunerIndex bTunerIndex, BYTE bStartReg, BYTE *pbValue, DWORD dwLength )
{
	int nResult= CSQPSK_SUCCESS ;
	BYTE bValue;

	bValue = bStartReg;
	if ( CSI2CWriteWithStop ( hSTV0299I2C[bTunerIndex], &bValue, 1 ) != CSI2C_SUCCESS ) 
		nResult = CSQPSK_I2C_ERROR;

	if ( CSI2CReadWithStop (hSTV0299I2C[bTunerIndex], pbValue, dwLength ) !=CSI2C_SUCCESS )
		nResult = CSQPSK_I2C_ERROR;

	return nResult;
}	


/* +==========================================================================+ */
/* | Function:	?XVFF22R}=EJd3v22KV\FZPE:E									  |	*/		
/* | Input:		?XVFJdHk ( F22KON / F22KOFF )								  |	*/
/* | Output:	N^															  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t STV0299F22KSwitch ( CSHDITunerIndex bTunerIndex, CSHDISwitch nF22KCtrl )
{
	BYTE bValue;

      //  CSTRACE( INFO_LEVEL, "\n===================Enter F22KSwitch====================");
	// CSTRACE( INFO_LEVEL, "\n[F22KSwitch] nF22KCtrl = %d",nF22KCtrl);
	
	if ( nF22KCtrl == CSHDI_ON)
		bValue = 0x60 | F22K_CONTINUOUS ;
	else 
		bValue = 0x60 | F22K_LOW ;
	
  //     CSTRACE( INFO_LEVEL, "\n================================================\n");
	
	return ( STV0299WrtReg ( bTunerIndex,STV0299REG_DiSEqC, &bValue, 1 ) );
}

static CSQPSK_Error_t DiSEqCF22KSwitch ( CSHDITunerIndex bTunerIndex, CSHDISwitch nF22KCtrl )
{
	BYTE bValue;

       // CSTRACE( INFO_LEVEL, "\n=========Enter DiSEqCF22KSwitch=============");
	// CSTRACE( INFO_LEVEL, "\nnF22KCtrl = %d",nF22KCtrl);
		
	if ( nF22KCtrl == CSHDI_ON )
		bValue = F22K_CONTINUOUS ;
	else 
		bValue = F22K_LOW ;


      // CSTRACE( INFO_LEVEL, "\n========================================\n");
	return ( STV0299WriteReg ( bTunerIndex,STV0299REG_DiSEqC, &bValue, 1 ) );
}


/* +==========================================================================+ */
/* | Function:	STV0299KySP<D4fFw3uJ<;/										  |	*/		
/* | Input:		N^														      |	*/
/* | Output:	N^															  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t STV0299RegInit ( CSHDITunerIndex bTunerIndex, int nType )
{
	// sfg DWORD dwDataLen = 0x35;
	BYTE b22KStatus ;
	BYTE bValue[0x35];
	int ErrorCode = CSQPSK_SUCCESS;
	
	STV0299RdReg ( bTunerIndex,8, &b22KStatus, 1 ) ;
        
	switch (nType)
	{
		case SHARP0184:

			bValue[ 0 ]  = 0xa1	;		// Chip ID, Read Only
			bValue[ 1 ]  = 0x15	;		// K = 0, M = 21
			bValue[ 2 ]  = 0x00	;		// VCO ON, P = 0  fVCO = fXTAL*4*(M+1)/(K+1) = 352MHz
			bValue[ 3 ]  = 0x00	;			
			bValue[ 4 ]  = 0x7d	;		// F22 = fVCO / 128 / F22FR = 22KHz
			bValue[ 5 ]  = 0x05	;		// Tuner I2C Not Connect
			bValue[ 6 ]  = 0xA2	;		// DAC Duty cycle modulated at fCLK / 4
			bValue[ 7 ]  = 0x00	;		// DAC = 0x200
			bValue[ 8 ]  = 0x60	;
			bValue[ 9 ]  = 0x00 ;		// DiSEqC FIFO
			bValue[ 0x0a ] = 0x00	;	// DiSEqC staatus
			bValue[ 0x0b ] = 0x00	;	// Reserved
			bValue[ 0x0c ] = 0xF1   ;	// 00 for IQ 01 for I,-Q
			bValue[ 0x0d ] = 0x81	;	// beta_agc1 = 1
			bValue[ 0x0e ] = 0x23	; 	 
			bValue[ 0x0f ] = 0x19	;
			bValue[ 0x10 ] = 0x3f	;
			bValue[ 0x11 ] = 0x84	;	// must program to 0x84
			bValue[ 0x12 ] = 0xf7	;	
			bValue[ 0x13 ] = 0x98	;	// Derotator on or off, alpha_carrier
			bValue[ 0x14 ] = 0x89	;	// Beta_carrier!!!
			bValue[ 0x15 ] = 0x14	;	// Carrier Lock Detector Threshold
			bValue[ 0x16 ] = 0x80	;	// AGC1 integrator value
			bValue[ 0x17 ] = 0x00	;	// Read Only
			bValue[ 0x18 ] = 0x12	;	// AGC2 Integrator MSB bits read only
			bValue[ 0x19 ] = 0x82	;	// AGC2 Integrator LSB bits read only
			bValue[ 0x1a ] = 0x08	;	// timing frequency register
			bValue[ 0x1b ] = 0x00	;	// QPSk lock status, if 80 carrier found if 88 data found
			bValue[ 0x1c ] = 0x7F	;	// Carrier lock detector value read only
			bValue[ 0x1d ] = 0x00	;	// Error Count register MSB
			bValue[ 0x1e ] = 0x00	;	// Error Count register LSB
			bValue[ 0x1f ] = 0x06	;	// fs MSB		[19:12]
			bValue[ 0x20 ] = 0x50	;	// fs Middle SB	[11:04]
			bValue[ 0x21 ] = 0x10	;	// fs LSB		[03:00]
			bValue[ 0x22 ] = 0x00	;	// Derotator Freuencyfs MSB	
			bValue[ 0x23 ] = 0x00	;	// Derotator Freuencyfs LSB	
			bValue[ 0x24 ] = 0x00	;	// Noise Indicator (MSB)
			bValue[ 0x25 ] = 0x00	;	// Noise Indicator (LSB)
			bValue[ 0x26 ] = 0x00	;	// Error Rate
			bValue[ 0x27 ] = 0x00	;	// Reserved
			if(g_nASIInSelect[bTunerIndex] == 1)
				bValue[ 0x28 ] = 0x01	;	// FEC Mode: QPSK, Parallel, Normal Impedance
			else
				bValue[ 0x28 ] = 0x00	;	// FEC Mode: QPSK, Parallel, Normal Impedance
			bValue[ 0x29 ] = 0x1e	;	// Rate = 1/2 Threshold
			bValue[ 0x2a ] = 0x14	;	// Rate = 2/3 Threshold
			bValue[ 0x2b ] = 0x0f   ;	// Rate = 3/4 Threshold
			bValue[ 0x2c ] = 0x09	;	// Rate = 5/6 Threshold
			bValue[ 0x2d ] = 0x05	;	// Rate = 7/8 Threshold
			bValue[ 0x2e ] = 0x00	;	// Reserved
			bValue[ 0x2f ] = 0x00	;	// Reserved
			bValue[ 0x30 ] = 0x00	;	// Reserved
			bValue[ 0x31 ] = 0x1f	;	// All punctured rates Enabled
			bValue[ 0x32 ] = 0x19	;	// Viterbi and Synchro Search
			bValue[ 0x33 ] = 0xfc	;	// RS CONTROL
			bValue[ 0x34 ] = 0x13	;	// Error Control

			break;

		case SHARP0194:
#if 0
			bValue[ 0 ]  = 0xa1	;		// Chip ID, Read Only
			bValue[ 1 ]  = 0x15	;		// K = 0, M = 21
			bValue[ 2 ]  = 0x30	;		// VCO ON, P = 0  fVCO = fXTAL*4*(M+1)/(K+1) = 352MHz
			bValue[ 3 ]  = 0x2a	;			
			bValue[ 4 ]  = 0x7d	;		// F22 = fVCO / 128 / F22FR = 22KHz
			bValue[ 5 ]  = 0x05	;		// Tuner I2C Not Connect
			bValue[ 6 ]  = 0xA2	;		// DAC Duty cycle modulated at fCLK / 4
			bValue[ 7 ]  = 0x00	;		// DAC = 0x200
			bValue[ 8 ]  = 0x60	;
			bValue[ 9 ]  = 0x00 ;		// DiSEqC FIFO
			bValue[ 0x0a ] = 0x00	;	// DiSEqC staatus
			bValue[ 0x0b ] = 0x00	;	// Reserved
			bValue[ 0x0c ] = 0xF1   ;	// 00 for IQ 01 for I,-Q
			bValue[ 0x0d ] = 0x81	;	// beta_agc1 = 1
			
//			bValue[ 0x0e ] = 0x23	; 	 
			bValue[ 0x0e ] = 0x23	; 	// -by yxb 040923
			
			bValue[ 0x0f ] = 0x19	;
			bValue[ 0x10 ] = 0x3f	;
			bValue[ 0x11 ] = 0x84	;	// must program to 0x84
			bValue[ 0x12 ] = 0xca; //0xf7	;	
			bValue[ 0x13 ] = 0x98	;	// Derotator on or off, alpha_carrier
			
			bValue[ 0x14 ] = 0x89	;	// Beta_carrier!!!
//			bValue[ 0x14 ] = 0x94	;	// Beta_carrier!!!  	-by yxb 040923
			
			bValue[ 0x15 ] = 0x14	;	// Carrier Lock Detector Threshold
			bValue[ 0x16 ] = 0x80	;	// AGC1 integrator value
			bValue[ 0x17 ] = 0x00	;	// Read Only
			bValue[ 0x18 ] = 0x12	;	// AGC2 Integrator MSB bits read only
			bValue[ 0x19 ] = 0x82	;	// AGC2 Integrator LSB bits read only
			bValue[ 0x1a ] = 0x00	;	// timing frequency register
			bValue[ 0x1b ] = 0x00	;	// QPSk lock status, if 80 carrier found if 88 data found
			bValue[ 0x1c ] = 0x7F	;	// Carrier lock detector value read only
			bValue[ 0x1d ] = 0x00	;	// Error Count register MSB
			bValue[ 0x1e ] = 0x00	;	// Error Count register LSB
			bValue[ 0x1f ] = 0x06	;	// fs MSB		[19:12]
			bValue[ 0x20 ] = 0x50	;	// fs Middle SB	[11:04]
			bValue[ 0x21 ] = 0x10	;	// fs LSB		[03:00]
			bValue[ 0x22 ] = 0x00	;	// Derotator Freuencyfs MSB	
			bValue[ 0x23 ] = 0x00	;	// Derotator Freuencyfs LSB	
			bValue[ 0x24 ] = 0x00	;	// Noise Indicator (MSB)
			bValue[ 0x25 ] = 0x00	;	// Noise Indicator (LSB)
			bValue[ 0x26 ] = 0x00	;	// Error Rate
			bValue[ 0x27 ] = 0x00	;	// Reserved
			if(g_nASIInSelect[bTunerIndex] == 1)
				bValue[ 0x28 ] = 0x01	;	// FEC Mode: QPSK, Parallel, Normal Impedance
			else
				bValue[ 0x28 ] = 0x00	;	// FEC Mode: QPSK, Parallel, Normal Impedance
			bValue[ 0x29 ] = 0x1e	;	// Rate = 1/2 Threshold
			bValue[ 0x2a ] = 0x14	;	// Rate = 2/3 Threshold
			bValue[ 0x2b ] = 0x1f   ;	// Rate = 3/4 Threshold
			bValue[ 0x2c ] = 0x09	;	// Rate = 5/6 Threshold
			bValue[ 0x2d ] = 0x0a	;	// Rate = 7/8 Threshold
			bValue[ 0x2e ] = 0x00	;	// Reserved
			bValue[ 0x2f ] = 0x00	;	// Reserved
			bValue[ 0x30 ] = 0x00	;	// Reserved
			bValue[ 0x31 ] = 0x1f	;	// All punctured rates Enabled
			bValue[ 0x32 ] = 0x19	;	// Viterbi and Synchro Search
			bValue[ 0x33 ] = 0xfc	;	// RS CONTROL
			bValue[ 0x34 ] = 0x13	;	// Error Control
#else
			bValue[0x00]  =  0xa1;
			bValue[0x01]  =  0x15;
			bValue[0x02]  =  0x00;
			bValue[0x03]  =  0x00;
			bValue[0x04]  =  0x7d;
			bValue[0x05]  =  0x05;
			bValue[0x06]  =  0x02;
			bValue[0x07]  =  0x00;
			bValue[0x08]  =  0x03;
			bValue[0x09]  =  0x00;
			bValue[0x0a]  =  0x00;
			bValue[0x0b]  =  0x00;
			bValue[0x0c]  =  0x01;
			bValue[0x0d]  =  0x81;
			bValue[0x0e]  =  0x44;
			bValue[0x0f]  =  0x14;
			bValue[0x10]  =  0x3f;
			bValue[0x11]  =  0x84;
			bValue[0x12]  =  0xda; //set bit[6..4] to '111' will cause low symborate problem
			bValue[0x13]  =  0x98;
			bValue[0x14]  =  0x95;
			bValue[0x15]  =  0xc9;
			bValue[0x16]  =  0xeb;
			bValue[0x17]  =  0x00;
			bValue[0x18]  =  0x19;
			bValue[0x19]  =  0x8b;
			bValue[0x1a]  =  0x00;
			bValue[0x1b]  =  0x82;
			bValue[0x1c]  =  0x7f;
			bValue[0x1d]  =  0x00;
			bValue[0x1e]  =  0x00;
			bValue[0x1f]  =  0x06;