zl1031xdrv.h

QPSK Tuner details, for conexant chipset.

/*************************************************************************

* ZL1031Xdrv.h                                                          *

* Copyright ? Shenzhen Coship Electronics Co.#,LTD.  2002.3             *

* All rights reserved.                                                  *

*                                                                       *

* Author: Zhou Cheng                                                    *

* Date:  2002/3/13                                                      *

* Compiler:					                                            *

*                                                                        *

* Description:	ZL1031X QPSK Link IC Driver								*

* Notes:                                                                *

* Update:   2002/3/6  Zhou Cheng										*

*************************************************************************/
#ifndef CS_ZL1031XDRV
#define CS_ZL1031XDRV
#include "CSQPSKCfg.h"
#include "CSHDI_typedef.h"
#include "cs_typedef.h"
#include "cs_frnpublic.h"


#define SNIM_ID_MT312				3
#define ZL1031X_ID_ZL10312			4
#define ZL1031X_ID_ZL10313                5


/* Register map  Address,Byte count*/
#define ZL1031X_IRQ            			0
#define ZL1031X_STATUS         		4 
#define ZL1031X_FEC_STATUS     		6   
#define ZL1031X_LNB_FREQ       		7
#define ZL1031X_M_SNR          			9
#define ZL1031X_VIT_ERRCNT     		11
#define ZL1031X_RS_BERCNT      		14
#define ZL1031X_RS_UBC         		17
#define ZL1031X_SIG_LEVEL      		19
#define ZL1031X_GPP            			20
#define ZL1031X_RESET          			21
#define ZL1031X_DISEQC_MODE    		22
#define ZL1031X_SYM_RATE_H     		23
#define ZL1031X_SYM_RATE       		23   // don't modify it to 24
#define ZL1031X_VIT_MODE       		25
#define ZL1031X_QPSK_CTRL      		26
#define ZL1031X_GO             			27
#define ZL1031X_IRQ_ENABLE     		28
#define ZL1031X_QPSK_STAT_EN   		32
#define ZL1031X_FEC_STAT_EN    		33
#define ZL1031X_SYS_CLK        		34
#define ZL1031X_DISEQC_RATIO   		35
#define ZL1031X_DISEQC_INSTR   		36
#define ZL1031X_FR_LIM         			37
#define ZL1031X_FR_OFF         		38
#define ZL1031X_AGC_CTRL       		39
#define ZL1031X_FE_AGC_INIT    		40
#define ZL1031X_FE_AGC_REF     		41
#define ZL1031X_FE_AGC_MAX     		42
#define ZL1031X_FE_AGC_MIN     		43
#define ZL1031X_FE_AGC_LK_TH   		44
#define ZL1031X_TS_AGC_LK_TH   		45
#define ZL1031X_AGC_PWR_SET    		46
#define ZL1031X_QPSK_MISC      		47
#define ZL1031X_SNR_THS_LOW    		48
#define ZL1031X_SNR_THS_HIGH   		49
#define ZL1031X_TS_SW_RATE     		50
#define ZL1031X_TS_SW_LIM_L    		51
#define ZL1031X_TS_SW_LIM_H    		52
#define ZL1031X_CS_SW_RATE_1   	53
#define ZL1031X_CS_SW_RATE_2   	54
#define ZL1031X_CS_SW_RATE_3   	55
#define ZL1031X_CS_SW_RATE_4   	56
#define ZL1031X_CS_SW_LIM      		57
#define ZL1031X_TS_LPK         			58
#define ZL1031X_CS_KPROP       		61
#define ZL1031X_CS_KINT        		63
#define ZL1031X_QPSK_SCALE     		65
#define ZL1031X_TLD_OUTLK_TH   		66
#define ZL1031X_TLD_INLK_TH    		67
#define ZL1031X_FLD_TH         		68
#define ZL1031X_PLD_OUTLK3     		69
#define ZL1031X_PLD_OUTLK2     		70
#define ZL1031X_PLD_OUTLK1     		71
#define ZL1031X_PLD_OUTLK0  		72
#define ZL1031X_PLD_INLK3      		73
#define ZL1031X_PLD_INLK2      		74
#define ZL1031X_PLD_INLK1      		75
#define ZL1031X_PLD_INLK0      		76
#define ZL1031X_PLD_ACC_TIME   		77
#define ZL1031X_SWEEP_PAR      		78
#define ZL1031X_STARTUP_TIME   		79
#define ZL1031X_LOSSLOCK_TH    		80
#define ZL1031X_FEC_LOCK_TM    		81
#define ZL1031X_LOSSLOCK_TM    		82
#define ZL1031X_VIT_ERRPER     		83
#define ZL1031X_HW_CTRL			84
#define ZL1031X_MPEG_CTRL			85  
#define ZL1031X_VIT_SETUP      		86
#define ZL1031X_VIT_REF3       		90
#define ZL1031X_VIT_MAXERR     		94
#define ZL1031X_BA_SETUP       		95
#define ZL1031X_OP_CTRL        		96
#define ZL1031X_FEC_SETUP      		97
#define ZL1031X_PROG_SYNC      		98
#define ZL1031X_AFC_SEAR_TH    		99
#define ZL1031X_CSACC_DIF_TH  		100
#define ZL1031X_QPSK_LK_CT    		101
#define ZL1031X_QPSK_ST_CT    		102
#define ZL1031X_MON_CTRL      		103
#define ZL1031X_QPSK_RESET    		104
#define ZL1031X_QPSK_TST_CT   		105
#define ZL1031X_QPSK_TST_ST   		106
#define ZL1031X_SIGLEV_L      		107
#define ZL1031X_AGC           			108
#define ZL1031X_FREQ_ERR      		111  
#define ZL1031X_TS_ACC        			116  
#define ZL1031X_DISEQC2_INT   		118
#define ZL1031X_DISEQC2_STAT  		119
#define ZL1031X_DISEQC2_FIFO  		120  
#define ZL1031X_DISEQC2_CTRL1 		121
#define ZL1031X_DISEQC2_CTRL2 		122
#define ZL1031X_MONITOR       		123
#define ZL1031X_TEST_MODE     		125
#define ZL1031X_ID            			126
#define ZL1031X_CONFIG        			127



/* 6 only ZL1031X_FEC status only */
#define ZL1031X_FECSTATUS_LOCKED   0x0C    /* BA and Descrambler locked */

/* 20 ZL1031X_GPP */
#define ZL1031X_GPP_PASOPEN	  	0x40  /* GPPs all inputs, "2WPAS open*/
#define ZL1031X_GPP_DEFAULT      	0x00  /* GPPs all inputs, "2WPAS closed*/
#define ZL1031X_GPP_ADCRUN	       0x80  /* add to above if ZL10312*/

/* 21 ZL1031X_RESET */
#define MT312_RESET_FULL	 		0x80
#define MT312_RESET_PART     		0x69 /* Viterbi and QPSK*/

/* 26 ZL313_QPSK_CTRL */
#define ZL1031X_QPSK_CTRL_IQSWP  	0x40  /* bit in QPSK control reg to swap Rx IQ*/
#define ZL1031X_QPSK_CTRL_FSCAN  	0x02  /* linear scan select */
#define ZL1031X_QPSK_CTRL_AFC    	0x04  /* bit in QPSK control reg to improve lock speed with low symbol rates*/
#define ZL1031X_QPSK_CTRL_ROLL20 	0x01

/* ZL31X_XTRA_REG  */
#define ZL313_XTRA_MPEG_USEIRQ           	0x10
#define ZL313_XTRA_MPEG_EXTSERCLK       	0x08
#define ZL31X_XTRA_ADCBYTEL_DEFAULT   0xB0

/* 37 ZL1031X_FR_LIM  */
#define ZL1031X_FR_LIM_SCAN        		48   /* capture range MHz x6 */
#define ZL1031X_FR_LIM_ACQ          		48   /* capture range MHz x6 */

/* 38 ZL1031X_FR_OFF */
#define ZL1031X_FR_OFF_CENTRED      		0

/* 49 ZL1031X_SNR_THS_HIGH*/
#define ZL1031X_SNR_THS_HIGH_DEFAULT      	50

/* 50 ZL1031X_TS_SW_RATE*/
#define ZL1031X_TS_SW_RATE_DSS            		20      /* Sweep rate for DSS */
/* 55 ZL1031X_CW_SW_RATE_3 */
#define ZL1031X_CW_SW_RATE_3_DEFAULT      0x90


/*84 ZL31X_CTRL */
#define ZL312_CTRL_SELEXTRA_ADCBL         0      
#define ZL313_CTRL_SELEXTRA_ADCBL         4      
#define ZL313_CTRL_SELEXTRA_MPEG          0
#define ZL31X_CTRL_MPEGDIS                	0x01
#define ZL31X_CTRL_EXTCLK		            	0x02
#define ZL31X_CTRL_ADCOFF		            	0x1C

/* 96 ZL1031X_OP_CTRL  */
#define ZL1031X_OP_CTRL_MANMOCLK         0x80
#define ZL1031X_OP_CTRL_BKERRINV          	0x40 /* invert the \BKERR output pin*/
#define ZL1031X_OP_CTRL_MOCLKINV          0x20 /* set (default) to invert the MPEG output clock*/
#define ZL1031X_OP_CTRL_TEIMPEG           	0x10 /* set (default) to enable ZL1031X_TPS error indicator in mpeg packet header*/
#define ZL1031X_OP_CTRL_BSO               	0x08

/* 97 ZL1031X_FEC_SETUP */
#define ZL1031X_FEC_SETUP_DIS_SR          0x80

/* 103 ZL1031X_MON_CTRL */
#define ZL1031X_MON_CTRL_ERRNOSIG       	0x80 /*If set BKERR flags missing packets as well as faulty packets*/
#define ZL1031X_MON_CTRL_SYMB             	0x03 /* select monitor register for symbol rate read*/
#define ZL1031X_MON_CTRL_DECRAT           0x05 /* decimation ratio*/

/* 107 ZL1031X_SIGLEV_L */
#define ZL1031X_SIGLEV_L_AGC            	0x01 /* FE AGC Lock Flag */

#define  ZL1031X_MAX_BANDWIDTH    		50    /* requests maximum bandwidth prior to lock, or when bandwidth function disabled */
#define  ZL1031X_UNLOCKED_BANDWIDTH    ZL1031X_MAX_BANDWIDTH
typedef enum
{
	AUTO_BLIND_SCAN,
	CHANNEL_ACQUIRE
	
}Scan_Mode;


CSQPSK_Error_t ZL1031XWrtReg ( CSHDITunerIndex bTunerIndex, BYTE StartReg, BYTE *pbValue, DWORD dwLength );
/* +==========================================================================+ */
/* | Function:	4SZL1031X6AR;4.J}>]											  |	*/		
/* | Input:		FpJ<<D4fFwKwR}:E											  |	*/
/* | 			V8OrJ}>]5DV8Uk												  |	*/
/* | 			4}6AHkJ}>]8vJ}												  |	*/
/* | Output:	6A3v5DJ}>]													  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XRdReg(CSHDITunerIndex bTunerIndex, BYTE bStartReg, BYTE *pbValue, DWORD dwLength ) ;

/* +==========================================================================+ */
/* | Function:	?XVFF22R}=EJd3v22KV\FZPE:E									  |	*/		
/* | Input:		?XVFJdHk ( F22KON / F22KOFF )								  |	*/
/* | Output:	N^															  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031X_F22K_Switch ( CSHDITunerIndex bTunerIndex, CSHDISwitch nF22KCtrl );

/* +==========================================================================+ */
/* | Function:	ZL1031XKySP<D4fFw3uJ<;/										  |	*/		
/* | Input:		N^														      |	*/
/* | Output:	N^															  |	*/
/* | Return:	P4Hk3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XRegInit ( CSHDITunerIndex bTunerIndex, int nTSOutMode ) ;

/* +==========================================================================+ */
/* | Function:	<l2bW*7"FwKx6(W4L,											  |	*/		
/* | Input:		N^														      |	*/
/* | Output:	N^															  |	*/
/* | Return:	Kx6(W4L,:	ALLLOST: CARRIER NOT Found						  |	*/
/* |						CFOUND: CARRIER Found							  |	*/
/* |						TP_LOCK: SYNC Found								  |	*/
/* |						FAILURE: I2C ERROR								  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XGetLockStatus ( CSHDITunerIndex bTunerIndex, int *pnLockStatus ) ;

/* +==========================================================================+ */
/* | Function:	IhVC(I,Q) / (I,-Q)											  |	*/		
/* | Input:		IQW4L,	0: I, Q		IQ Normal								  |	*/
/* |					1: I,-Q		IQ Invert								  |	*/
/* | Output:	N^															  |	*/
/* | Return:	3I9&1jV>													  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XSwapIQ ( CSHDITunerIndex bTunerIndex ) ;

/* +==========================================================================+ */
/* | Function:	4r?*I2CM(5@													  |	*/		
/* | Return:	3I9&1jV>													  |	*/
/* +==========================================================================+ */
CSQPSK_Error_t ZL1031x_I2CPassThrough(CSHDITunerIndex bTunerIndex,BOOL bOpen);

/* +==========================================================================+ */
/* | Function:	<l2bCHIP IDJG7qU}H7 ( SCSZLink ICWT6/J61p )					  |	*/		
/* | Input:		N^															  |	*/
/* | Output:	N^															  |	*/
/* | Return:	U}H7, 75;XSUCCESS, 7qTr75;XFAILURE							  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XCheckChipID ( CSHDITunerIndex bTunerIndex ) ;


/* +==========================================================================+ */
/* | Function:	IhVC Link IC 5D7{:EBJ<D4fFw									  |	*/		
/* | Input:		7{:EBJ(KbpsN*5%N;)											  |	*/
/* | Output:	N^															  |	*/
/* | Return:	2YWw3I9&1jV>												  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XSetSRate ( CSHDITunerIndex bTunerIndex, DWORD dwSymbolRate,Scan_Mode mode );

/* +==========================================================================+ */
/* | Function:	;qH!PE:EVJA?												  |	*/		
/* | Input:		N^															  |	*/
/* | Output:	N^															  |	*/
/* | Return:	PE:EVJA?0-255V.<d (J}V5T=4s, PE:EVJA?T=:C)					  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XSignalQuality(CSHDITunerIndex bTunerIndex, int *pnSignalQuality );

/* +==========================================================================+ */
/* | Function:	;qH!PE:EG?6H ( 4}5wJT )										  |	*/		
/* | Input:		N^															  |	*/
/* | Output:	N^															  |	*/
/* | Return:	PE:EG?6H0-255V.<d (J}V5T=4s, PE:EG?6HT=4s)					  |	*/
/* +==========================================================================+ */

CSQPSK_Error_t ZL1031XSignalStrength ( CSHDITunerIndex bTunerIndex, int *pnSignalStrength );

/* +==========================================================================+ */
/* | Function:  ;qH!PE:ENsBkBJ												  |	*/		
/* +==========================================================================+ */
CSQPSK_Error_t ZL1031XGetBER(CSHDITunerIndex bTunerIndex, DWORD *pdwBer);

/* +==========================================================================+ */
/* | Function:  IhVCCARRIER FREQUENCY REGISTER											  |	*/		
/* | Input:		Derotator Frequency												  |	*/
/* | Output:	N^															  |	*/
/* | Return:	2YWw3I9&1jV>												  |	*/
/* +==========================================================================+ */
#if 1
CSQPSK_Error_t ZL1031XDerotFreq (CSHDITunerIndex bTunerIndex, DWORD dwDerotFrequency);
CSQPSK_Error_t ZL1031X_Optimize(CSHDITunerIndex bTunerIndex, DWORD dwBaudRate, int nTunerType);
CSQPSK_Error_t ZL1031XToneBurstCommandOnly (CSHDITunerIndex bTunerIndex, BYTE bToneBurstSel);

CSQPSK_Error_t ZL1031XSendDiSEqCCommand (CSHDITunerIndex bTunerIndex, PBYTE pbValue, int nCommandNum);

CSQPSK_Error_t ZL1031XSendDiSEqC10Command (CSHDITunerIndex bTunerIndex, BYTE bSwitchType, BYTE bCommittedByte, BYTE bToneBurstSel, BYTE bRepeat);
CSQPSK_Error_t ZL1031XSendDiSEqC11Command (CSHDITunerIndex bTunerIndex, BYTE bCommittedByte, BYTE bUnCommittedByte, BYTE bRepeat);
CSQPSK_Error_t ZL1031XSendOptionCommand(CSHDITunerIndex bTunerIndex, BYTE ucOptionSwitch);
#endif
CSQPSK_Error_t ZL1031XInit(CSHDITunerIndex bTunerIndex );

//CSQPSK_Error_t ZL1031XConfigTSOutMode (CSHDITunerIndex bTunerIndex, int nTSOutMode);

CSQPSK_Error_t ZL1031XSetStandby( CSHDITunerIndex bTunerIndex, int nStandby );

CSQPSK_Error_t ZL1031XCheckLockStatus ( CSHDITunerIndex bTunerIndex, int *pnLockStatus );

CSQPSK_Error_t ZL1031XSetClockPolarity( CSHDITunerIndex bTunerIndex, T_ClockPolarity clockPol );

CSQPSK_Error_t ZL1031XLockChannel(CSHDITunerIndex bTunerIndex, CSQPSKCHANNEL *pCHPara);
CSQPSK_Error_t DiSEqCF22KSwitch ( CSHDITunerIndex bTunerIndex, CSHDISwitch nF22KCtrl );
#endif