📄 ds26528t1.c
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/* BUILDFLAG:"DS26528T1 = 1" */
/*
* Copyright 1997-2005 NComm, Inc. All rights reserved.
*
*
* *** Important Notice ***
* The software contained in this file may only be used within a
* valid license agreement between your company and NComm, Inc.
* The license agreement includes the definition of a PROJECT which
* defines the scope that this software can be used in. Any use outside of
* the definition of the PROJECT is prohibited without executing an additional
* agreement with NComm, Inc. Please refer to you license agreement for
* the definition of the PROJECT.
*
* Verification of your company's license agreement and copies of
* that agreement also may be obtained from:
*
* NComm, Inc.
* 254 N Broadway
* Suite 106
* Salem, NH 03079
* (603) 893-6186
* sales@ncomm.com
*
*/
/*
* The Device version is the chip revision that is supported by this
* driver.
*
* Device Version:
* Rev A3
*
* Revision:
* 08/11/04 - Initial Release
* 10/10/05 - Tested on A3 Rev Silicon
*
* See CUSTOMIZE HERE for areas that may need to be customized for your
* platform.
*/
/*
* Driver for the Dallas DS26528 DS26528 chip, T1 section
*/
/* -------------------------------------------------------------------------- */
/* Device Issues: This section lists any issues with the device.
* The list contains descriptions of:
* 1) Lack of device features which prevent the NComm TMS software
* from meeting the applicable standards.
* 2) Work arounds employed to make the NComm TMS software package(s) operate
* properly.
* 3) Special hardware considerations for implementing the device.
*
*/
#if 0
Device Issues:
1) This driver does not support TR-08 yet.
2) Tri-Level signalling is not supported by the device.
#endif
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
/* Driver Customization Section
* This section contains any specific customizations required for this chip
* and/or driver operation.
* The customizations cover the chip configuration and interfaces to
* other parts of your platform.
*/
/* These get placed in the DEVICE call in the CTRL and POLL driver API.
* It allows for platform speific Control and Poll calls .
*/
#define CUSTOM_CTRL(LnPtr,uparam1,uparam2,uparam3,uparam4) 0
#define CUSTOM_POLL(LnPtr,uparam1,uparam2,uparam3,uparam4) 0
/* -------------------------------------------------------------------------- */
/* Define default T1 technology constraints
*/
#define T1_DRIVER
#define MAX_T1_TIMESLOTS 24
#define TSLOT_IDLECODE 0x17 /* default idle code */
#define SIGNL_IDLECODE 0x0F /* default idle abcd bits for RBS */
#define MAX_PACKET 256
#define DEFAULT_TX_CLOCK SYSCLOCK
#define FIFOSIZE 128
/* -------------------------------------------------------------------------- */
/* This section has T1 driver specific customizations
*/
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
/* Include files
*/
#include "target.h"
#include "apiTE1Dv.h"
#include "ds26528.h"
/* -------------------------------------------------------------------------- */
/* Define API Entry Points
* These are the names you will use in the API registration processor for
* this driver
*/
#define TE1_CTRLENTRY _ds26528T1CTRL
#define TE1_POLLENTRY _ds26528T1POLL
int TE1_CTRLENTRY(void *vptr, TE1DCTRL_FC fcode, ...);
/* ---------------------------------------------------------------------- */
/* ---------------------------------------------------------------------- */
/* General houskeeping strucucture on a per-line basis
*/
enum {
INTFLAG_UTIL = (1 << 1), /* Utility interrupt */
INTFLAG_ALM = (1 << 2), /* Alarm interrupt */
INTFLAG_ONESEC = (1 << 3), /* One second interrupt */
INTFLAG_T1403 = (1 << 4), /* BOC and HDLC interrupt */
INTFLAG_LOOP = (1 << 5), /* Loop up/loop down interrupt */
INTFLAG_TR008 = (1 << 6) /* TR08 interrupt */
};
struct _T1stuff {
FRAMER *myfrmr;
DEVICE *mydevice;
LIU *myliu;
int mysubc;
int rxslip;
unsigned char rx_hdlc_setting;
int sendingBOC;
int sendingPKT;
int txremaining;
};
struct _stuff {
int greset; /* Tracks global reset */
int init; /* 0 = not initalized, 1 = initalized */
int line; /* Line Number */
int subc; /* sub channel number */
void *lnPtr; /* pointer to talk to TMS with */
void *LIUptr; /* pointer to talk to LIU with */
GDEVICE *d; /* reverse pointer to the dev struct */
int (*cback)(void *LnPtr, TE1DCLBK_FC,...);
int isr_hooked; /* 1 = ISR is hooked, 0 = not */
int int_flag; /* deterines which interrupts enabled */
int utility_init; /* 0 = util not init, 1 initalized */
int alarm_init; /* 0 = alarms not inialized, 1 enabled*/
int onesec_init; /* 0 = disabled, 1 = enabled */
int t1403_init; /* 0 = disabled, 1 = enabled */
int loop_init; /* 0 = disabled, 1 = enabled */
int signal_init; /* 0 = RBS disabled, 1 = RBS enabled */
int t1231_init; /* 0 = disabled, 1 = enabled */
int tr008_init; /* 0 = disabled, 1 = enabled */
int tr54016_init; /* 0 = disabled, 1 = enabled */
int cmas_init; /* CMAS channels */
int exz_init; /* 0 = disabled, 1 = enabled */
TE1_CONFIG cfg; /* Current configuration */
int side; /* USR_SIDE or NET_SIDE */
CLOCK_TYPE txclk; /* current setting for transmit clock */
int loopback; /* Loopback information */
int tx_alm; /* current transmit alarms */
struct {
enum {
DS0MODE_CLEAR,
DS0MODE_IDLE,
DS0MODE_RBCAS
} mode; /* Mode of the DS0 */
unsigned char ipat; /* Idle Pattern */
unsigned char rxbits; /* Receive Signaling Bits */
unsigned char txbits; /* Transmit Signaling Bits */
} ds0[MAX_T1_TIMESLOTS];
struct fdl_pkt {
int byte_count;
unsigned char pkt[MAX_PACKET];
int active;
} pktrx,pkttx; /* tx and rx FDL packets */
struct fdl_boc {
unsigned char boc;
int active;
} bocrx,boctx; /* tx and rx BOCs */
struct lcode {
int bits;
int code;
} rxlup, rxldn, txlup, txldn;
struct _T1stuff t1s; /* Device specific items */
};
typedef struct _stuff STUFF;
static STUFF T1stuff[MAX_DEVICES][MAX_T1_CHANNELS];
/* -------------------------------------------------------------------------- */
/* Forward References
*/
static int hook_isr(STUFF *sptr, int set_clear, int flag);
static void hdlc_xmit(STUFF *sptr);
/* -------------------------------------------------------------------------- */
/* Define Helper Defines
* This is a bit map.
*/
/* Loopbacks */
#define DRV_LOOP_REMOTE 0x01
#define DRV_LOOP_LOCAL 0x02
#define DRV_LOOP_PAYLOAD 0x04
#define DRV_LOOP_FRAMER 0x08
/* Testing transmit Alarms */
#define TXA_ISSET(x) (sptr->tx_alm & (x) & (~TMS_TXALARM))
#define STANDARD_DECLARE FRAMER *f = sptr->t1s.myfrmr
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
/* The Device Specific Routines are defined below.
*/
/* -------------------------------------------------------------------------- */
/* Routine to look up the appopriate stuff stucture for the line
* The pointer returned is local to the T1 driver
*/
static STUFF *_te1_get_stuff(GDEVICE *d, int subc)
{
return(&T1stuff[d->id][subc]);
}
/* -------------------------------------------------------------------------- */
/* This routine fills out the device specific stuff information
*/
static void _te1_set_chip_stuff(STUFF *sptr)
{
sptr->t1s.mydevice = (DEVICE *) sptr->d->BaseAdr;
sptr->t1s.mysubc = sptr->subc % MAX_T1_CHANNELS;
sptr->t1s.myfrmr = (FRAMER *)
&sptr->t1s.mydevice->te1[sptr->t1s.mysubc];
sptr->t1s.myliu = (LIU *)
&sptr->t1s.mydevice->bertliu.liu[sptr->t1s.mysubc];
sptr->t1s.rxslip = 0;
return;
}
/* This routine performs the utility initialization
*/
static int utility_init(STUFF *sptr, int set_clear)
{
int retval = 1;
FRAMER *f = (FRAMER *)&sptr->t1s.mydevice->te1[0];
if(set_clear) {
retval = hook_isr(sptr, set_clear, INTFLAG_UTIL);
f->gfimr |= (1 << sptr->t1s.mysubc);
if(!retval)
return(0);
}
else {
f->gfimr &= ~(1 << sptr->t1s.mysubc);
retval = hook_isr(sptr, set_clear, INTFLAG_UTIL);
if(!retval)
return(0);
}
return(retval);
}
/*------------------------------------------------------------------------*/
/* The following tables are used to assist signaling
*/
#define FLIP_EM(x) ((((x) & 0x08) >> 3) | (((x) & 0x04) >> 1) | \
(((x) & 0x02) << 1) | (((x) & 0x01) << 3))
static int flip_table[16] = {
FLIP_EM(0),
FLIP_EM(1),
FLIP_EM(2),
FLIP_EM(3),
FLIP_EM(4),
FLIP_EM(5),
FLIP_EM(6),
FLIP_EM(7),
FLIP_EM(8),
FLIP_EM(9),
FLIP_EM(10),
FLIP_EM(11),
FLIP_EM(12),
FLIP_EM(13),
FLIP_EM(14),
FLIP_EM(15),
};
static int rxsf_flip_table[16] = {
/* ABAB baBA */
/* 0000 0000 */ 0x0,
/* 0001 1000 */ 0x8,
/* 0010 0100 */ 0x4,
/* 0011 1100 */ 0xc,
/* 0100 1000 */ 0x8,
/* 0101 0010 */ 0x2,
/* 0110 1100 */ 0xc,
/* 0111 0110 */ 0x6,
/* 1000 0100 */ 0x4,
/* 1001 1100 */ 0xc,
/* 1010 0001 */ 0x1,
/* 1011 1001 */ 0x9,
/* 1100 1100 */ 0xc,
/* 1101 0110 */ 0x6,
/* 1110 1011 */ 0xb,
/* 1111 0011 */ 0x3,
};
static int txsf_flip_table[16] = {
/* baBA ABAB */
/* 0000 0000 */ 0x0,
/* 0001 1010 */ 0xa,
/* 0010 0101 */ 0x5,
/* 0011 1111 */ 0xf,
/* 0100 1000 */ 0x8,
/* 0101 1000 */ 0x8,
/* 0110 1101 */ 0xd,
/* 0111 1101 */ 0xd,
/* 1000 0100 */ 0x4,
/* 1001 1110 */ 0xe,
/* 1010 0100 */ 0x4,
/* 1011 1110 */ 0xe,
/* 1100 1100 */ 0xc,
/* 1101 1100 */ 0xc,
/* 1110 1100 */ 0xc,
/* 1111 1100 */ 0xc,
};
/*------------------------------------------------------------------------*/
/* This will retreive ONE channel of signaling
* The bits are in dcba
*/
static int poll_rxbits(STUFF *sptr, int ts, int *rxbits)
{
int retval = 1;
int index = 0;
STANDARD_DECLARE;
index = (ts > 11) ? (ts - 12) : ts;
*rxbits = ((ts > 11) ? (f->rs[index]) : ((f->rs[index] >> 4))) & 0x0f;
return(retval);
}
/*------------------------------------------------------------------------*/
/* This routine sets up for signaling
*/
static int signal_init(STUFF *sptr, int set_clear)
{
int retval = 1;
int i, val;
STANDARD_DECLARE;
if(set_clear) {
/* Have the upper levels do the debouncing */
(*sptr->cback)(sptr->lnPtr, TE1DCLBK_SIGNLDEBOUNCE, 1);
f->tcr1 |= TCR1_TSSE;
for(i=0;i<MAX_T1_TIMESLOTS;i++) {
poll_rxbits(sptr, i, &val);
sptr->ds0[i].rxbits = val;
}
}
return(retval);
}
/*------------------------------------------------------------------------*/
/* This routine set a voice channel as clear channel - no CAS
*/
static int signal_clear(STUFF *sptr, int ts, int set_clear)
{
int retval = 1;
int index,bit;
STANDARD_DECLARE;
index = ts / 8;
bit = ts % 8;
f->ssie[index] &= ~(1 << bit);
f->tcice[index] &= ~(1 << bit);
return(retval);
}
/*------------------------------------------------------------------------*/
/* This routine set a voice channel as clear channel - no CAS
*/
static int signal_idle(STUFF *sptr, int ts, int ipat, int set_clear)
{
int retval = 1;
int index, bit;
STANDARD_DECLARE;
if(ipat != (-1)) {
f->tidr[ts] = ipat;
}
index = ts / 8;
bit = ts % 8;
if(set_clear) {
f->tcice[index] |= (1 << bit);
} else {
f->tcice[index] &= ~(1 << bit);
}
return(retval);
}
/*------------------------------------------------------------------------*/
/* This routine set a voice channel as needing CAS processing
*/
static int signal_rbcas(STUFF *sptr, int ts, int set_clear)
{
int retval = 1;
int index,bit;
STANDARD_DECLARE;
index = ts / 8;
bit = ts % 8;
f->ssie[index] |= (1 << bit);
f->tcice[index] &= ~(1 << bit);
return(retval);
}
/*------------------------------------------------------------------------*/
/* This routine sets the transmit signaling bits for a CAS channel
*/
static int signal_txbits(STUFF *sptr, int ts, unsigned char dcba)
{
int retval = 1;
int bits, index;
STANDARD_DECLARE;
index = (ts > 11) ? (ts - 12) : ts;
bits = f->ts[index];
if(sptr->cfg.framing == FF_ESF)
dcba = flip_table[dcba & 0x0f];
else
dcba = txsf_flip_table[dcba & 0x0f];
bits &= (ts > 11) ? 0xf0 : 0x0f;
bits |= (ts > 11) ? dcba : (dcba << 4);
f->ts[index] = bits;
return(retval);
}
/*------------------------------------------------------------------------*/
/* This will poll alarms on the appriate line
*/
static int poll_alarm(STUFF *sptr, int alarm_type, int *valueptr)
{
int retval = 1;
int value = 0;
STANDARD_DECLARE;
switch(alarm_type) {
case TMS_RXLOS:
value = (f->rrts1 & RRTS1_RLOS) ? 1 : 0;
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