dspadd.h

本程序为ST公司开发的源代码

/*******************************************************************************
 *                    CONFIDENTIAL - PHILIPS APM
 *
 *  This is unpublished work is a trade secret. Philips APM owns all rights
 *  to this work and intends to maintain it in confidence to preserve its
 *  trade secret status. Philips Automotive Playback Modules reserves the
 *  right to protect this work as an unpublished copyrighted work in the
 *  event of an inadvertent Automotive Systems also reserves its right.
 *  Those having access to this work mayor deliberate unauthorized publication.
 *  Do not copy it, use it, or disclose the information contained in it
 *  without the written authorization of Philips Automotive Playback Modules.
 ******************************************************************************/
/******************************************************************************/
/*! \file
 *
 *  Project Scope:  CDM M8
 *
 *  Organization:   Philips APM-DS
 *
 *  Version Control:
 *    \source       sources/dsp/dspadd.h
 *    \version      0.1
 *    \author       Bernard Bosnjak
 *    \date         06.06.2005
 *
 *  Target Hardware:      Accordo Plus (ARM core)
 *******************************************************************************
 *  \brief        Memory address space definition for DSP
 *                (used by DSP and ARM)
 *
 *  \par          Change History:
 *
 ***************************************************
 *
 * STM CVS Log:
 *
 * $Log: dspadd.h,v $
 * Revision 1.6  2007/09/26 15:04:16  dellorto
 * dsp hf event converted into acquisition defect event (used for hf detection)
 *
 * Revision 1.5  2007/08/14 15:27:19  dellorto
 * multiple mechanisms
 *
 * Revision 1.4.2.1  2007/05/02 14:53:06  dellorto
 * new defect handling
 *
 * Revision 1.4  2006/09/18 09:55:22  belardi
 * Corrected CVS keyword usage
 *
 * Revision 1.3  2006/09/18 09:23:41  belardi
 * Added Log CVS keyword into file header
 *
 *
 ******************************************************************************/


#ifndef __DSPADD_H
#define __DSPADD_H


/*************************************************************/
/* defines for dsp state management                          */
/*************************************************************/

#define BIT_POS_AGC                    (0)
#define BIT_MASK_AGC                   (0x0003 << BIT_POS_AGC)
#define get_equ_agc(s,x)               (((s) & ~BIT_MASK_AGC) | (((x) << BIT_POS_AGC) & BIT_MASK_AGC))
#define get_clr_agc(s)                 ((s) & ~BIT_MASK_AGC)
#define get_agc(s)                     (((s) & BIT_MASK_AGC) >> BIT_POS_AGC)

#define BIT_POS_FOCUS_CLOSED           (2)
#define BIT_MASK_FOCUS_CLOSED          (1 << BIT_POS_FOCUS_CLOSED)
#define get_set_focus_closed(s)        ((s) | BIT_MASK_FOCUS_CLOSED)
#define get_clr_focus_closed(s)        ((s) & ~BIT_MASK_FOCUS_CLOSED)
#define get_focus_closed(s)            (((s) & BIT_MASK_FOCUS_CLOSED) >> BIT_POS_FOCUS_CLOSED)

#define BIT_POS_TRACKING_GLITCH        (3)
#define BIT_MASK_TRACKING_GLITCH       (1 << BIT_POS_TRACKING_GLITCH)
#define get_set_tracking_glitch(s)     ((s) | BIT_MASK_TRACKING_GLITCH)
#define get_clr_tracking_glitch(s)     ((s) & ~BIT_MASK_TRACKING_GLITCH)
#define get_tracking_glitch(s)         (((s) & BIT_MASK_TRACKING_GLITCH) >> BIT_POS_TRACKING_GLITCH)

#define BIT_POS_ACQ_DEFECT             (4)
#define BIT_MASK_ACQ_DEFECT            (1 << BIT_POS_ACQ_DEFECT)
#define get_set_acq_defect(s)          ((s) | BIT_MASK_ACQ_DEFECT)
#define get_clr_acq_defect(s)          ((s) & ~BIT_MASK_ACQ_DEFECT)
#define get_acq_defect(s)              (((s) & BIT_MASK_ACQ_DEFECT) >> BIT_POS_ACQ_DEFECT)

#define BIT_POS_TTM_FG_OK              (5)
#define BIT_MASK_TTM_FG_OK             (1 << BIT_POS_TTM_FG_OK)
#define get_set_ttm_fg_ok(s)           ((s) | BIT_MASK_TTM_FG_OK)
#define get_clr_ttm_fg_ok(s)           ((s) & ~BIT_MASK_TTM_FG_OK)
#define get_ttm_fg_ok(s)               (((s) & BIT_MASK_TTM_FG_OK) >> BIT_POS_TTM_FG_OK)

#define BIT_POS_TTM_SPEED_OK           (6)
#define BIT_MASK_TTM_SPEED_OK          (1 << BIT_POS_TTM_SPEED_OK)
#define get_set_ttm_speed_ok(s)        ((s) | BIT_MASK_TTM_SPEED_OK)
#define get_clr_ttm_speed_ok(s)        ((s) & ~BIT_MASK_TTM_SPEED_OK)
#define get_ttm_speed_ok(s)            (((s) & BIT_MASK_TTM_SPEED_OK) >> BIT_POS_TTM_SPEED_OK)

#define BIT_POS_CLV_BUFFER_OK          (7)
#define BIT_MASK_CLV_BUFFER_OK         (1 << BIT_POS_CLV_BUFFER_OK)
#define get_set_clv_buffer_ok(s)       ((s) | BIT_MASK_CLV_BUFFER_OK)
#define get_clr_clv_buffer_ok(s)       ((s) & ~BIT_MASK_CLV_BUFFER_OK)
#define get_clv_buffer_ok(s)           (((s) & BIT_MASK_CLV_BUFFER_OK) >> BIT_POS_CLV_BUFFER_OK)

#define BIT_POS_RAMP_STOPPED           (8)
#define BIT_MASK_RAMP_STOPPED          (1 << BIT_POS_RAMP_STOPPED)
#define get_set_ramp_stopped(s)        ((s) | BIT_MASK_RAMP_STOPPED)
#define get_clr_ramp_stopped(s)        ((s) & ~BIT_MASK_RAMP_STOPPED)
#define get_ramp_stopped(s)            (((s) & BIT_MASK_RAMP_STOPPED) >> BIT_POS_RAMP_STOPPED)

#define BIT_POS_SHORT_JUMP_STOPPED     (9)
#define BIT_MASK_SHORT_JUMP_STOPPED    (1 << BIT_POS_SHORT_JUMP_STOPPED)
#define get_set_short_jump_stopped(s)  ((s) | BIT_MASK_SHORT_JUMP_STOPPED)
#define get_clr_short_jump_stopped(s)  ((s) & ~BIT_MASK_SHORT_JUMP_STOPPED)
#define get_short_jump_stopped(s)      (((s) & BIT_MASK_SHORT_JUMP_STOPPED) >> BIT_POS_SHORT_JUMP_STOPPED)

#define SLEDGE_MOVED_FORWARD           0x0001
#define SLEDGE_MOVED_BACKWARD          0x0002
#define BIT_POS_SLEDGE_MOVED           (10)
#define BIT_MASK_SLEDGE_MOVED          (0x0003 << BIT_POS_SLEDGE_MOVED)
#define get_equ_sledge_moved(s,x)      (((s) & ~BIT_MASK_SLEDGE_MOVED) | (((x) << BIT_POS_SLEDGE_MOVED) & BIT_MASK_SLEDGE_MOVED))
#define get_clr_sledge_moved(s)        ((s) & ~BIT_MASK_SLEDGE_MOVED)
#define get_sledge_moved(s)            (((s) & BIT_MASK_SLEDGE_MOVED) >> BIT_POS_SLEDGE_MOVED)


/*************************************************************/
/* compiling options                                         */
/*************************************************************/

/*-----------------------------------------------------------*/
/* Switches for enabling/disabling DSP debugging code        */
/*-----------------------------------------------------------*/
#define DEBUG_DSP                  0  /* Include debug signals and parameters. */
                                      /*   0 => no debug signals. */
                                      /*   1 => only YMEM signals, 12 additional instructions. */
                                      /*   2 => all signals, 99 additional instructios. */
#define SAMPLERATE_TESTING         0  /* Include sample rate testing on gpio. */

/*-----------------------------------------------------------*/
/* Switches for enabling/disabling optimized DSP code        */
/*-----------------------------------------------------------*/
#define OPTIMIZED_DEC              1  /* Optimized decimation of fe, fa, fa2, te, ta, ta2 and hfl. */
#define HARDWARE_LOOP              0  /* Optimized decimation using HW loops, does not work inside interrupt routine. */
#define OPTIMIZED_INIT             1  /* Initialize X and Y memory to zero after reset. */
#define DSP_PROC_ENABLE            1  /* Include DSP processing enable. */
#define OPTIMIZED_DEADZONE         1  /* Deadzone optimized for execution speed. */
#define WORKAROUND_SPIKE_BUG       1  /* Workaround for the TE spike bug. */
#define OPTIMIZED_SHIFT_OUT_PREVENTION 1  /* Shift out prevention optimized for size/speed. */
#define OPTIMIZED_NOISE_SHAPING    1  /* Radial/Focus actuator noise shaping optimized for size/speed. */

/*---------------------------------------------------------------*/
/* Switches for enabling/disabling possible future improvements. */
/* NOTE: THESE STILL NEED TO BE TESTED.                          */
/*---------------------------------------------------------------*/
#define ALTERNATIVE_TEOK           1  /* Alternative version for generation of TEOK using the ntracks from RATE. */
#define NLC_DELTA_ZERO_TRACK_ON    1  /* Set NLC threshold to zero when closing radial controller, i.e. always high bandwidth independent of the size of the radial tracking error. */
#define NLC_DELTA_ZERO_SHORT_JUMP  1  /* Set NLC threshold to zero when closing radial controller, i.e. always high bandwidth independent of the size of the radial tracking error. */
#define TRACK_ON_WITHOUT_I_ACTION  0  /* Enable integral action on radial controller */
#define FE_INTERP_DURING_JUMPS_AND_DEFECTS 0 /* Interpolate focus error during defects, now also during short jump. */


/*************************************************************/
/* X and Y memory limits                                     */
/*************************************************************/

#if (1 == OPTIMIZED_INIT)
  /* Define the range in Y-Mem that must be cleared */
  #define YMEM_START_ADD            0x00
  #define YMEM_END_ADD              0xff
  /* Define the range in X-Mem that must be cleared */
  #define XMEM_START_ADD            0x10
  #define XMEM_END_ADD              0xf0
#endif


/*************************************************************/
/* Y memory parameters, accessed by both the ARM and the DSP */
/*************************************************************/

/*-----------------------------------------------------------*/
/* offsets for coefficient arrays                            */
/*-----------------------------------------------------------*/
#define COEFF_FOCUS_ADD           0x12     /* YMemory, coeff array size 16, only 0...10 in use */
#define COEFF_TRACKING_ADD        0x22     /* YMemory, coeff array size 16 */
#define COEFF_ERROR_ADD           0x32     /* YMemory, coeff array size 11 */
#define COEFF_SLEDGE_ADD          0x3d     /* YMemory, coeff array size 3  */
#define COEFF_CLV_ADD             0x42     /* YMemory, coeff array size 10 */
#define COEFF_MISC_ADD            0x4c     /* YMemory, coeff array size 12 */

/*-----------------------------------------------------------*/
/* controller gain and shift part adresses                   */
/*-----------------------------------------------------------*/
#define FOCUS_GAIN_ADD            (COEFF_FOCUS_ADD + 10)
#define TRACKING_GAIN_ADD         (COEFF_TRACKING_ADD + 10)
#define FOCUS_SHIFT_GAIN_ADD      (COEFF_FOCUS_ADD + FOCUS_SHIFT_GAIN_INDEX)
#define TRACKING_SHIFT_GAIN_ADD   (COEFF_TRACKING_ADD + TRACKING_SHIFT_GAIN_INDEX)

/*-----------------------------------------------------------*/
/* functional servo signals (decimated)                      */
/*-----------------------------------------------------------*/
#if (1 == OPTIMIZED_DEC || 1 == DEBUG_DSP || 2 == DEBUG_DSP)
  #define SIGDEC_ARRAY_ADD        ((memoryY*)0x70)
  #define FEDEC_ADD               0x70     /* YMemory */
  #define FADEC_ADD               0x71     /* YMemory */
  #define FA2DEC_ADD              0x72     /* YMemory */
  #define TEDEC_ADD               0x73     /* YMemory */
  #define TADEC_ADD               0x74     /* YMemory */
  #define TA2DEC_ADD              0x75     /* YMemory */
  #define HFLDEC_ADD              0x76     /* YMemory */
  #define HFDC_ADD                0x7e     /* YMemory */