lld_eic.c

本程序为ST公司开发的源代码

void ISR_HandlerServe (tU32 par)
{
	OS_TASK_PROFILE_ISR_START();   //jg
	
	ISRSelect(par);
		
	{
		int a2;
	__asm {
	  MRS     a2,CPSR                           
	  ORR     a2,a2,#0x80 // disable IRQ only (was 0xC0 to disable IRQ and FIQ)
	  MSR     CPSR_cxsf,a2                   
	}
	}
       
    wr32_reg (Eic, IPR0, ((tU32)1 << par));
       
   OS_TASK_PROFILE_ISR_END(par); //jg
}

#pragma POP

/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*                                                                       *
*      ExceptionHandler                                                 *
*                                                                       *
* DESCRIPTION                                                           *
*      To be implemented for now is an endless loop						*
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*                                                                       *
* OUTPUTS                                                               *
*      None                                                             *
*                                                                       *
************************************************************************/
void ExceptionHandler (void)
{	
	while (1);
}

/************************************************************************
|function implementation (scope: global)
|-----------------------------------------------------------------------*/
/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*      INT_EnableChannel                                                *
*                                                                       *
* DESCRIPTION                                                           *
*      Install ISR function, priority and enables interrupt register    *
*      for source channel												*
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*      - source                                                         *
*      - priority                                                       *
*      - callback function                                              *
*                                                                       *
* OUTPUTS                                                               *
*      None                                                             *
*                                                                       *
************************************************************************/
void EIC_InstallChannel (tU32 source, tU32 priority, CALLBACK_fnct fnct)
{
	volatile rEic  *EicPtr;
	
	EicPtr = &Eic;
	
	INSTALL_ISR (source, fnct);
	wr32 (Eic, rSIR[source], SIPL, priority); 

	*(tU32*)&(EicPtr->IER0) |= (1<<source);
}

#ifdef APM_PICKUP // [RB] commented out to reduce ROM space
/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*      INT_DisableChannel                                               *
*                                                                       *
* DESCRIPTION                                                           *
*      Disinstall ISR function, priority and disables interrupt register*
*      for source channel												*
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*      - source                                                         *
*                                                                       *
* OUTPUTS                                                               *
*      None                                                             *
*                                                                       *
************************************************************************/
void EIC_UninstallChannel (tU32 source)
{
	volatile rEic  *EicPtr;
	
	EicPtr = &Eic;
	
    ISRInfoVect[source].FuncPtr = DEFAULT_ISR;
	
	wr32 (Eic, rSIR[source], SIPL, EIC_INT_LEVEL_00);
	
	*(tU32*)&(EicPtr->IER0) &= ~(1 << source);
}
#endif

void EIC_EnableChannel (tU32 source)
{
	volatile rEic  *EicPtr;
	
	EicPtr = &Eic;
	*(tU32*)&(EicPtr->IER0) |= (1 << source);
}

void EIC_DisableChannel (tU32 source)
{
	volatile rEic  *EicPtr;
	
	EicPtr = &Eic;
	*(tU32*)&(EicPtr->IER0) &= ~(1 << source);
}

tSInt EIC_ChannelStatus (tU32 source)
{
	volatile rEic  *EicPtr;
	
	EicPtr = &Eic;
	return (*(tU32*)&(EicPtr->IER0) & (1 << source));
}

/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*      INT_IntEnable                                                    *
*                                                                       *
* DESCRIPTION                                                           *
*      Enable EIC global interrupt setting IRQ_EN in ICR register       *
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*      None                                                             *
*                                                                       *
* OUTPUTS                                                               *
*      None                                                             *
*                                                                       *
************************************************************************/
void EIC_IntEnable (void)
{        
    /* Enable IRQs in the IEC block -> IRQs are disabled as long as the
       IRQ chs bits into the IER0 reg is cleared */
    wr32 (Eic, ICR, IRQ_EN, INC_ICR_INT_ENA);   
}

#ifdef APM_PICKUP // [RB] commented out to reduce ROM space
/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*      INT_IntDisable                                                   *
*                                                                       *
* DESCRIPTION                                                           *
*      Disable EIC global interrupt resetting IRQ_EN in ICR register    *
*      and it clears all pending bits								    *
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*      None                                                             *
*                                                                       *
* OUTPUTS                                                               *
*      None                                                             *
*                                                                       *
************************************************************************/
void EIC_IntDisable (void) 
{    
    /* Disable IRQs in the IEC block */
    wr32 (Eic, ICR, IRQ_EN, INC_ICR_INT_DIS);   
    
    /* Clear pending interrupts */
    wr32_reg (Eic, IPR0, 0xFFFFFFFF);
}
#endif

/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*      INT_vEicGlobalDis                                                *
*                                                                       *
* DESCRIPTION                                                           *
*      Disable EIC global interrupt clearing IRQ_EN in ICR register     *
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*      None                                                             *
*                                                                       *
* OUTPUTS                                                               *
*      0x80 -> Global interrupt is disabled at reception                *
*              of disable request                                       *
*      0x00 -> Global interupt is enabled at recpetion of disable       *
*              request                                                  *          *
*                                                                       *
************************************************************************/
#pragma push
#pragma arm
tSInt EIC_vEicGlobalDis (void)
{ 
  tSInt ret;
  tSInt reg;

  //ret = rd32 (Eic, ICR, IRQ_EN);
  __asm{
         MRS ret , CPSR;
  }
  /* Disable IRQs in the EIC block */
  //wr32 (Eic, ICR, IRQ_EN, INC_ICR_INT_DIS);
  if((ret & ARM7_MODE_MASK) == ARM7_USER_MODE)      
  {
   interrupt_lock();
  } 
  else
  {    //Don't Enable IRQ Interrupt while FIQ interrupt 
       if((ret & ARM7_MODE_MASK) != ARM7_FIQ_MODE)
       {                  
      __asm {
	         MRS     reg,CPSR                           
	         ORR     reg,reg,#0x80 
	         MSR     CPSR_cxsf,reg                   
   	        }  
   	    }    
  }
  return (ret & 0x80);
}

/************************************************************************
*                                                                       *
* FUNCTION                                                              *
*      EIC_vEicGlobalRest                                               *
*                                                                       *
* DESCRIPTION                                                           *
*      Restore EIC global interrupt setting IRQ_EN in ICR register      *
*                                                                       *
* CALLS                                                                 *
*      None                                                             *
*                                                                       *
* INPUTS                                                                *
*      None                                                             *
*                                                                       *
* OUTPUTS                                                               *
*      None                                                             *
*                                                                       *
************************************************************************/
void EIC_vEicGlobalRest (tSInt val)
{
   tSInt ret;
   tSInt reg;
   
   __asm{
         MRS ret , CPSR;
        }

    /* Enable IRQs in the EIC block */
    //!!wr32 (Eic, ICR, IRQ_EN, val);
    
    //If global interrupt was disabled don't enable
    //val = 0 -> Global Interrupt was Enable before disabling
    //val = 1 -> Global Interupt was already Disabled when
    //           Disable request was received
    
    if(0==val)
    {     
     if((ret & ARM7_MODE_MASK) == ARM7_USER_MODE)
     {
       interrupt_unlock();
     } 
     else
     {
         //Don't Enable IRQ Interrupt while FIQ interrupt 
                       
         if((ret & ARM7_MODE_MASK) != ARM7_FIQ_MODE)
         {                
         __asm {
	            MRS     reg,CPSR                           
	            BIC     reg,reg,#0x80 
	            MSR     CPSR_cxsf,reg                   
   	           }      
   	     }      
     }
    } 
}
#pragma pop
#ifdef __cplusplus
}
#endif

/* End of file */