blvectors.s

本程序为ST公司开发的源代码

;;; Copyright ARM Ltd 2001. All rights reserved.

        PRESERVE8

        AREA Vect, CODE, READONLY

; These are example exception vectors and exception handlers
;
; Where there is ROM fixed at 0x0 (build_b), these are hard-coded at 0x0.
; Where ROM/RAM remapping occurs (build_c), these are copied from ROM to RAM.
; The copying is done automatically by the C library code inside __main.

; *****************
; Exception Vectors
; *****************

; Note: LDR PC instructions are used here, though branch (B) instructions
; could also be used, unless the ROM is at an address >32MB.


        ENTRY

        LDR     PC ,Reset_Addr           ; Address 0x00
        LDR     PC, Undefined_Addr       ; Address 0x04
        LDR     PC, SWI_Addr             ; Address 0x08
        LDR     PC, Prefetch_Addr        ; Address 0x0C
        LDR     PC, Abort_Addr           ; Address 0x10
        NOP                              ; Address 0x14

        LDR     PC, [PC, #0xFFFFF7F8]    ; Address 0x18 0xFFFFF818 - 0x20 = 0xFFFFF7F8
        LDR     PC, FIQ_Addr             ; Address 0x1C

        IMPORT  bl_Reset_Handler         ; In init.s
        IMPORT  handler_svc              ; Taken from ROM CODE
        IMPORT  dma_ch0_isr_fiq
        IMPORT  exception_hdl

Reset_Addr      DCD     bl_Reset_Handler ; Address 0x20
Undefined_Addr  DCD     Undefined_Handler; Address 0x24
SWI_Addr        DCD     handler_svc      ; Address 0x28
Prefetch_Addr   DCD     Prefetch_Handler ; Address 0x2C
Abort_Addr      DCD     Abort_Handler    ; Address 0x30
IRQ_Addr        DCD     IRQ_Handler      ; Address 0x34
FIQ_Addr        DCD     FIQ_Handler      ; Address 0x38
;
;
; ************************
; Exception Handlers
; ************************

; The following dummy handlers do not do anything useful in this example.
; They are set up here for completeness.

Undefined_Handler
        B       exception_hdl

SWI_Handler
        B       SWI_Handler
Prefetch_Handler
        B       exception_hdl
Abort_Handler
        B       exception_hdl
IRQ_Handler
        B       IRQ_Handler
FIQ_Handler
        B       dma_ch0_isr_fiq




        END