dcmdef.h

本程序为ST公司开发的源代码

/**************************************************
 *
 *
 * CVS ID:   $Id: dcmdef.h,v 1.2 2006/04/26 17:59:52 kutik Exp $
 * Author:   Maurizio Marcucci [MM] - STM
 * Date:     $Date: 2006/04/26 17:59:52 $
 * Revision: $Revision: 1.2 $
 * 
 * Description:
 * 
 *   Accordo+ Hardware registers definition
 *
 ***************************************************
 * 
 * COPYRIGHT (C) ST Microelectronics  2005
 *            All Rights Reserved
 *
 ***************************************************/

/* DFCR register type definition */
typedef struct
{
  UInt  df_stasel_af  : 1;
  UInt  df_bypass_af  : 1;
  UInt  df_aux_sync   : 2;
  UInt  df_te_mux     : 1;
  UInt  df_hf_mux     : 1;
  UInt  bit6          : 1;
  UInt  bit7          : 1;
  UInt                : 24;
} DFCR_STRUCT;

typedef union
{
  uint32 all;
  DFCR_STRUCT field;
} DFCR_UNION;

/* RATE_CTRL1 register type definition */
typedef struct
{
  UInt  speed       : 4;
  UInt  linear_te   : 1;
  UInt  tess_en     : 1;
  UInt  offset_cal  : 1;
  UInt  agc_dis     : 1;
  UInt              : 24;
} RA_CTRL1_STRUCT;

typedef union
{
  uint32 all;
  RA_CTRL1_STRUCT field;
} RA_CTRL1_UNION;

/* RATE_CTRL2 register type definition */

typedef struct
{
  UInt  agc_gain    : 2;
  UInt  rate_init   : 1;
  UInt  di_stepper  : 1;
  UInt  env_gain    : 3;
  UInt  pll_init    : 1;
  UInt              : 24;
} RA_CTRL2_STRUCT;

typedef union
{
  uint32 all;
  RA_CTRL2_STRUCT field;
} RA_CTRL2_UNION;

/* RATE CTRL3 register type definition */

typedef struct
{
  UInt  phase_gain  : 4;
  UInt  freq_gain   : 4;
  UInt              : 24;
} RA_CTRL3_STRUCT;

typedef union
{
  uint32 all;
  RA_CTRL3_STRUCT field;
} RA_CTRL3_UNION;

/* RATE_STATUS register type definition */

typedef struct
{
  UInt  ntracks_positive  : 1;
  UInt  ntracks_is_zero   : 1;
  UInt  ntracks_is_ok     : 1;
  UInt  stepper_int       : 1;
  UInt  no_hf             : 1;
  UInt  recov_mode        : 1;
  UInt  limiter_on        : 1;
  UInt  jump_complete     : 1;
  UInt                    : 24;
} RA_STATUS_STRUCT;

typedef union
{
  uint32 all;
  RA_STATUS_STRUCT field;
} RA_STATUS_UNION;

/* RATE Indirect Register Type Definition */

/* RATE_CTRL4 register type definition */
#define dfc_freq_lock   0x01
#define it_cond         0x0e
#define p_gain          0xf0

/* RATE_CTRL5 register type definition */
#define reserved5       0x03
#define offset_gain     0x0c
#define offset_init     0x70
#define jump_mode       0x80

/*  RATE_CTRL6 register type definition */
#define prof_clk        0x07
#define stop_acc_dfct   0x08
#define reserved6       0xf0

/* RATE_CTRL7 register type definition */
#define strobe          0x01
#define jump_exec       0x02
#define jump_direction  0x04
#define reserved7       0x18
#define jp_freq_lock    0x20
#define reserved72      0xc0

/* RATE_CTRLB register type definition */
#define fok_thres       0x0f
#define no_hf_thres     0xf0