dspreg.h

本程序为ST公司开发的源代码

/**************************************************
 *
 *
 * CVS ID:   $Id: dspreg.h,v 1.1 2006/01/31 18:50:16 belardi Exp $
 * Author:   Maurizio Marcucci [MM] - STM
 * Date:     $Date: 2006/01/31 18:50:16 $
 * Revision: $Revision: 1.1 $
 * 
 * Description:
 * 
 *   Accordo+ Hardware registers definition
 *
 ***************************************************
 * 
 * COPYRIGHT (C) ST Microelectronics  2005
 *            All Rights Reserved
 *
 ***************************************************/
#include "dspdef.h"

#define DSP_BASE_ADDR   0xE8008000


#define ERESET          (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0500)))
#define EPRADL          (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0504)))
#define EPRADH          (*((volatile EPRADH_UNION          *) (DSP_BASE_ADDR + 0x0508)))
#define EPRD            (*((volatile uint32                *) (DSP_BASE_ADDR + 0x050C)))
#define ETEST           (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0510)))

#define SER_FACTL       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0520)))
#define SER_FACTH       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0524)))
#define SER_TACTL       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0528)))
#define SER_TACTH       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x052C)))
#define SER_CLK_ACT     (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0530)))

#define SER_CAV_REGL    (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0514)))
#define SER_CAV_REGH    (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0518)))
#define SER_CAV_CTRL    (*((volatile SER_CAV_CTRL_UNION    *) (DSP_BASE_ADDR + 0x051C)))

#define DSP_DSPDL       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0540)))
#define DSP_DSPDH       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0544)))
#define DSP_NSTPL       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0550)))
#define DSP_NSTPH       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0554)))
#define DSP_SSPDL       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0560)))
#define DSP_SSPDH       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0564)))
#define DSP_SACCL       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0568)))
#define DSP_SACCH       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x056C)))
#define DSP_TEST1_SPDL  (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0548)))
#define DSP_TEST1_SPDH  (*((volatile uint32                *) (DSP_BASE_ADDR + 0x054C)))
#define DSP_TEST2_SPDL  (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0578)))
#define DSP_TEST2_SPDH  (*((volatile uint32                *) (DSP_BASE_ADDR + 0x057C)))
#define SER_STEP_CTRL   (*((volatile SER_STEP_CTRL_UNION   *) (DSP_BASE_ADDR + 0x0570)))
#define SER_STEP_CLK    (*((volatile SER_STEP_CLK_UNION    *) (DSP_BASE_ADDR + 0x0534)))
#define SER_MCR1        (*((volatile SER_MCR1_UNION        *) (DSP_BASE_ADDR + 0x0574)))
#define SER_STEP_MODE   (*((volatile SER_STEP_MODE_UNION   *) (DSP_BASE_ADDR + 0x0558)))
#define SER_STEP_STATUS (*((volatile uint32                *) (DSP_BASE_ADDR + 0x055C)))

#define CPU_M_0L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0580)))
#define CPU_M_0H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0584)))
#define CPU_M_1L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0588)))
#define CPU_M_1H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x058C)))
#define CPU_M_2L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0590)))
#define CPU_M_2H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0594)))
#define CPU_M_3L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x0598)))
#define CPU_M_3H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x059C)))
#define CPU_M_4L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05A0)))
#define CPU_M_4H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05A4)))
#define CPU_M_5L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05A8)))
#define CPU_M_5H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05AC)))
#define CPU_M_6L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05B0)))
#define CPU_M_6H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05B4)))
#define CPU_M_7L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05B8)))
#define CPU_M_7H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05BC)))
#define CPU_M_8L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05C0)))
#define CPU_M_8H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05C4)))
#define CPU_M_9L        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05C8)))
#define CPU_M_9H        (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05CC)))
#define CPU_M_10L       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05D0)))
#define CPU_M_10H       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05D4)))
#define CPU_M_11L       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05D8)))
#define CPU_M_11H       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05DC)))
#define CPU_M_12L       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05E0)))
#define CPU_M_12H       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05E4)))
#define CPU_M_13L       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05E8)))
#define CPU_M_13H       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05EC)))
#define CPU_M_14L       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05F0)))
#define CPU_M_14H       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05F4)))
#define CPU_M_15L       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05F8)))
#define CPU_M_15H       (*((volatile uint32                *) (DSP_BASE_ADDR + 0x05FC)))