📄 st79.h
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#define TIM4_EGR_UG U_TIM4_EGR.field.B0 //Update Generation.
#define TIM4_CNTR U_TIM4_CNTR.byte
#define TIM4_PSCR U_TIM4_PSCR.byte
#define TIM4_ARR U_TIM4_ARR.byte
//ADC
ext volatile UCharField U_ADC_CSR @0x5400;//ADC Control/Status Register
ext volatile UCharField U_ADC_CR1 @0x5401;//ADC configuration 1
ext volatile UCharField U_ADC_CR2 @0x5402;//ADC configuration 2
ext volatile UCharField U_ADC_CR3 @0x5403;//ADC configuration 3
ext volatile UCharField U_ADC_DRH @0x5404;//ADC Data Register High
ext volatile UCharField U_ADC_DRL @0x5405;//ADC Data Register Low
ext volatile UCharField U_ADC_TDRH @0x5406;//ADC Schmitt Trigger Disable Register High
ext volatile UCharField U_ADC_TDRL @0x5407;//ADC Schmitt Trigger Disable Register Low
#define AIN0 0
#define AIN1 1
#define AIN2 2
#define AIN3 3
#define AIN4 4
#define AIN5 5
#define AIN6 6
#define AIN7 7
#define AIN8 8
#define AIN9 9
#define AIN10 10
#define AIN11 11
#define AIN12 12
#define AIN13 13
#define AIN14 14
#define AIN15 15
#define ADC_CSR U_ADC_CSR.byte
#define ADC_CSR_ITEN U_ADC_CSR.field.B5 //Interrupt enable for EOC
#define ADC_CSR_EOC U_ADC_CSR.field.B7 //End of conversion
#define ADC_CR1 U_ADC_CR1.byte
#define ADC_CR1_ADON U_ADC_CR1.field.B0 //A/D Converter on/off
#define ADC_CR1_CONT U_ADC_CR1.field.B1 //Continuous conversion
#define ADC_CR2 U_ADC_CR2.byte
#define ADC_CR2_ALIGN U_ADC_CR2.field.B3 //Data alignment
#define ADC_CR2_EXTTRIG U_ADC_CR2.field.B6 //External trigger enable
#define ADC_CR3 U_ADC_CR3.byte
#define ADC_DRH U_ADC_DRH.byte
#define ADC_DRL U_ADC_DRL.byte
#define ADC_TDRH U_ADC_TDRH.byte
#define ADC_TDRL U_ADC_TDRL.byte
//CAN
ext volatile UCharField U_CAN_MCR @0x5420;//CAN Master Control register
ext volatile UCharField U_CAN_MSR @0x5421;//CAN Master Status register
ext volatile UCharField U_CAN_TSR @0x5422;//CAN Transmit Status register
ext volatile UCharField U_CAN_TPR @0x5423;//CAN Transmit Priority register
ext volatile UCharField U_CAN_RFR @0x5424;//CAN Receive FIFO register
ext volatile UCharField U_CAN_IER @0x5425;//CAN Interrupt Enable register
ext volatile UCharField U_CAN_DGR @0x5426;//CAN Diagnosis register
ext volatile UCharField U_CAN_FPSR @0x5427;//CAN Page Selection register
ext volatile UCharField U_CAN_P0 @0x5428;//CAN Page Register 0
ext volatile UCharField U_CAN_P1 @0x5429;//CAN Page Register 1
ext volatile UCharField U_CAN_P2 @0x542A;//CAN Page Register 2
ext volatile UCharField U_CAN_P3 @0x542B;//CAN Page Register 3
ext volatile UCharField U_CAN_P4 @0x542C;//CAN Page Register 4
ext volatile UCharField U_CAN_P5 @0x542D;//CAN Page Register 5
ext volatile UCharField U_CAN_P6 @0x542E;//CAN Page Register 6
ext volatile UCharField U_CAN_P7 @0x542F;//CAN Page Register 7
ext volatile UCharField U_CAN_P8 @0x5430;//CAN Page Register 8
ext volatile UCharField U_CAN_P9 @0x5431;//CAN Page Register 9
ext volatile UCharField U_CAN_PA @0x5432;//CAN Page Register A
ext volatile UCharField U_CAN_PB @0x5433;//CAN Page Register B
ext volatile UCharField U_CAN_PC @0x5434;//CAN Page Register C
ext volatile UCharField U_CAN_PD @0x5435;//CAN Page Register D
ext volatile UCharField U_CAN_PE @0x5436;//CAN Page Register E
ext volatile UCharField U_CAN_PF @0x5437;//CAN Page Register F
#define CAN_MCR U_CAN_MCR.byte
#define CAN_MSR U_CAN_MSR.byte
#define CAN_TSR U_CAN_TSR.byte
#define CAN_TPR U_CAN_TPR.byte
#define CAN_RFR U_CAN_RFR.byte
#define CAN_IER U_CAN_IER.byte
#define CAN_DGR U_CAN_DGR.byte
#define CAN_FPSR U_CAN_FPSR.byte
#define CAN_P0 U_CAN_P0.byte
#define CAN_P1 U_CAN_P1.byte
#define CAN_P2 U_CAN_P2.byte
#define CAN_P3 U_CAN_P3.byte
#define CAN_P4 U_CAN_P4.byte
#define CAN_P5 U_CAN_P5.byte
#define CAN_P6 U_CAN_P6.byte
#define CAN_P7 U_CAN_P7.byte
#define CAN_P8 U_CAN_P8.byte
#define CAN_P9 U_CAN_P9.byte
#define CAN_PA U_CAN_PA.byte
#define CAN_PB U_CAN_PB.byte
#define CAN_PC U_CAN_PC.byte
#define CAN_PD U_CAN_PD.byte
#define CAN_PE U_CAN_PE.byte
#define CAN_PF U_CAN_PF.byte
/* Tx MailBox / Receive FIFO Registers */
ext volatile UCharField U_CAN_MCSR @0x5428;
ext volatile UCharField U_CAN_MFMI @0x5428;
ext volatile UCharField U_CAN_MDLC @0x5429;
ext volatile UCharField U_CAN_MIDR1 @0x542a;
ext volatile UCharField U_CAN_MIDR2 @0x542b;
ext volatile UCharField U_CAN_MIDR3 @0x542c;
ext volatile UCharField U_CAN_MIDR4 @0x542d;
//ext volatile UCharField U_CAN_MDAR[8] @0x542e;
ext volatile UCharField U_CAN_MTSLR @0x5436;
ext volatile UCharField U_CAN_MTSHR @0x5437;
ext volatile UCharField U_CAN_MIDR12 @0x542a;
ext volatile UCharField U_CAN_MIDR34 @0x542c;
volatile unsigned char CAN_MDAR[8] @0x542e;
#define CAN_MCSR U_CAN_MCSR.byte
#define CAN_MFMI U_CAN_MFMI.byte
#define CAN_MDLC U_CAN_MDLC.byte
#define CAN_MIDIR1 U_CAN_MIDIR1.byte
#define CAN_MIDIR2 U_CAN_MIDIR2.byte
#define CAN_MIDIR3 U_CAN_MIDIR3.byte
#define CAN_MIDIR4 U_CAN_MIDIR4.byte
#define CAN_MTSLR U_CAN_MTSLR.byte
#define CAN_MTSHR U_CAN_MTSHR.byte
#define CAN_MIDR12 U_CAN_MIDR12.byte
#define CAN_MIDR34 U_CAN_MIDR34.byte
/* Configuaration/Diagnosis Registers */
ext volatile UCharField U_CAN_ESR @0x5428;
ext volatile UCharField U_CAN_EIER @0x5429;
ext volatile UCharField U_CAN_TECR @0x542a;
ext volatile UCharField U_CAN_RECR @0x542b;
ext volatile UCharField U_CAN_BTR1 @0x542c;
ext volatile UCharField U_CAN_BTR2 @0x542d;
ext volatile UCharField U_CAN_FMR1 @0x5430;
ext volatile UCharField U_CAN_FMR2 @0x5431;
ext volatile UCharField U_CAN_FCR1 @0x5432;
ext volatile UCharField U_CAN_FCR2 @0x5433;
ext volatile UCharField U_CAN_FCR3 @0x5434;
#define CAN_ESR U_CAN_ESR.byte
#define CAN_EIER U_CAN_EIER.byte
#define CAN_TECR U_CAN_TECR.byte
#define CAN_RECR U_CAN_RECR.byte
#define CAN_BTR1 U_CAN_BTR1.byte
#define CAN_BTR2 U_CAN_BTR2.byte
#define CAN_FMR1 U_CAN_FMR1.byte
#define CAN_FMR2 U_CAN_FMR2.byte
#define CAN_FCR1 U_CAN_FCR1.byte
#define CAN_FCR2 U_CAN_FCR2.byte
#define CAN_FCR3 U_CAN_FCR3.byte
/* Acceptance filter 0:1 Registers */
ext volatile UCharField U_CAN_FxR0 @0x5428;
ext volatile UCharField U_CAN_FxR1 @0x5429;
ext volatile UCharField U_CAN_FxR2 @0x542a;
ext volatile UCharField U_CAN_FxR3 @0x542b;
ext volatile UCharField U_CAN_FxR4 @0x542c;
ext volatile UCharField U_CAN_FxR5 @0x542d;
ext volatile UCharField U_CAN_FxR6 @0x542e;
ext volatile UCharField U_CAN_FxR7 @0x542f;
ext volatile UCharField U_CAN_FyR0 @0x5430;
ext volatile UCharField U_CAN_FyR1 @0x5431;
ext volatile UCharField U_CAN_FyR2 @0x5432;
ext volatile UCharField U_CAN_FyR3 @0x5433;
ext volatile UCharField U_CAN_FyR4 @0x5434;
ext volatile UCharField U_CAN_FyR5 @0x5435;
ext volatile UCharField U_CAN_FyR6 @0x5436;
ext volatile UCharField U_CAN_FyR7 @0x5437;
#define CAN_FxR0 U_CAN_FxR0.byte
#define CAN_FxR1 U_CAN_FxR1.byte
#define CAN_FxR2 U_CAN_FxR2.byte
#define CAN_FxR3 U_CAN_FxR3.byte
#define CAN_FxR4 U_CAN_FxR4.byte
#define CAN_FxR5 U_CAN_FxR5.byte
#define CAN_FxR6 U_CAN_FxR6.byte
#define CAN_FxR7 U_CAN_FxR7.byte
#define CAN_FyR0 U_CAN_FyR0.byte
#define CAN_FyR1 U_CAN_FyR1.byte
#define CAN_FyR2 U_CAN_FyR2.byte
#define CAN_FyR3 U_CAN_FyR3.byte
#define CAN_FyR4 U_CAN_FyR4.byte
#define CAN_FyR5 U_CAN_FyR5.byte
#define CAN_FyR6 U_CAN_FyR6.byte
#define CAN_FyR7 U_CAN_FyR7.byte
//CPU
ext volatile UCharField U_CPU_A @0x7F00; //Accumulater
ext volatile UCharField U_CPU_PCE @0x7F01;//Program counter extended
ext volatile UCharField U_CPU_PCH @0x7F02;//Program counter high
ext volatile UCharField U_CPU_PCL @0x7F03;//Program counter low
ext volatile UCharField U_CPU_XH @0x7F04;//X index register high
ext volatile UCharField U_CPU_XL @0x7F05;//X index register low
ext volatile UCharField U_CPU_YH @0x7F06;//Y index register high
ext volatile UCharField U_CPU_YL @0x7F07;//Y index register low
ext volatile UCharField U_CPU_SPH @0x7F08;//Stack pointer high
ext volatile UCharField U_CPU_SPL @0x7F09;//Stack pointer low
ext volatile UCharField U_CPU_CCR @0x7F0A;//condition code register
#define CPU_A U_CPU_A.byte
#define CPU_PCE U_CPU_PCE.byte
#define CPU_PCH U_CPU_PCH.byte
#define CPU_PCL U_CPU_PCL.byte
#define CPU_XH U_CPU_XH.byte
#define CPU_XL U_CPU_XL.byte
#define CPU_YH U_CPU_YH.byte
#define CPU_YL U_CPU_YL.byte
#define CPU_SPH U_CPU_SPH.byte
#define CPU_SPL U_CPU_SPL.byte
#define CPU_CCR U_CPU_CCR.byte
//CORE
ext volatile UCharField U_MCR @0x7F60;//core configuration register
#define MCR U_MCR.byte
//ITC
ext volatile UCharField U_ITC_SPR1 @0x7F70;//Interrupt Software priority register 1
ext volatile UCharField U_ITC_SPR2 @0x7F71;//Interrupt Software priority register 2
ext volatile UCharField U_ITC_SPR3 @0x7F72;//Interrupt Software priority register 3
ext volatile UCharField U_ITC_SPR4 @0x7F73;//Interrupt Software priority register 4
ext volatile UCharField U_ITC_SPR5 @0x7F74;//Interrupt Software priority register 5
ext volatile UCharField U_ITC_SPR6 @0x7F75;//Interrupt Software priority register 6
ext volatile UCharField U_ITC_SPR7 @0x7F76;//Interrupt Software priority register 7
ext volatile UCharField U_ITC_SPR8 @0x7F77;//Interrupt Software priority register 8
#define ITC_SPR1 U_ITC_SPR1.byte
#define ITC_SPR2 U_ITC_SPR2.byte
#define ITC_SPR3 U_ITC_SPR3.byte
#define ITC_SPR4 U_ITC_SPR4.byte
#define ITC_SPR5 U_ITC_SPR5.byte
#define ITC_SPR6 U_ITC_SPR6.byte
#define ITC_SPR7 U_ITC_SPR7.byte
#define ITC_SPR8 U_ITC_SPR8.byte
//SWIN
ext volatile UCharField U_SWIM_CSR @0x7F80;//SWIM control status register
#define SWIM_CSR U_SWIM_CSR.byte
ext volatile unsigned char EEPROMBuff[2048] @0x4000;
/******************************************************************************/
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