st79.h

我个人编写的车载dvd上的程序

ext volatile UCharField U_LINUART_BRR1 @0x5242;//Baud Rate Register 1
ext volatile UCharField U_LINUART_BRR2 @0x5243;//Baud Rate Register 2
ext volatile UCharField U_LINUART_CR1 @0x5244;//Control Register 1
ext volatile UCharField U_LINUART_CR2 @0x5245;//Control Register 2
ext volatile UCharField U_LINUART_CR3 @0x5246;//Control Register 3
ext volatile UCharField U_LINUART_CR4 @0x5247;//Control Register 4
ext volatile UCharField U_LINUART_CR5 @0x5249;//Control Register 5
#define LINUART_SR                  U_LINUART_SR.byte
#define LINUART_DR                  U_LINUART_DR.byte
#define LINUART_BRR1                U_LINUART_BRR1.byte
#define LINUART_BRR2                U_LINUART_BRR2.byte
#define LINUART_CR1                 U_LINUART_CR1.byte
#define LINUART_CR2                 U_LINUART_CR2.byte
#define LINUART_CR3                 U_LINUART_CR3.byte
#define LINUART_CR4                 U_LINUART_CR4.byte
#define LINUART_CR5                 U_LINUART_CR5.byte




//TIM1
ext volatile UCharField U_TIM1_CR1 @0x5250;  //Control Register 1
ext volatile UCharField U_TIM1_CR2 @0x5251;  //Control Register 2
ext volatile UCharField U_TIM1_SMCR @0x5252; //Slave Mode Control Register
ext volatile UCharField U_TIM1_ETR @0x5253;  //external Trigger Register
ext volatile UCharField U_TIM1_IER @0x5254;  //Interrupt Enable Register
ext volatile UCharField U_TIM1_SR1 @0x5255;  //Status Register 1
ext volatile UCharField U_TIM1_SR2 @0x5256;  //Status Register 2
ext volatile UCharField U_TIM1_EGR @0x5257;  //Event Generation Register
ext volatile UCharField U_TIM1_CCMR1 @0x5258;//Capture/Compare Mode Register 1
ext volatile UCharField U_TIM1_CCMR2 @0x5259;//Capture/Compare Mode Register 2
ext volatile UCharField U_TIM1_CCMR3 @0x525A;//Capture/Compare Mode Register 3
ext volatile UCharField U_TIM1_CCER1 @0x525B;//Capture/Compare Enable Register 1
ext volatile UCharField U_TIM1_CCER2 @0x525C;//Capture/Compare Enable Register 2
ext volatile UCharField U_TIM1_CNTRH @0x525D;//Counter High
ext volatile UCharField U_TIM1_CNTRL @0x525E;//Counter Low
ext volatile UCharField U_TIM1_PSCRH @0x525F;//Prescaler high
ext volatile UCharField U_TIM1_PSCRL @0x5260;//Prescaler Low
ext volatile UCharField U_TIM1_ARRH @0x5261; //Auto-Reload Register High
ext volatile UCharField U_TIM1_ARRL @0x5262; //Auto-Reload Register Low
ext volatile UCharField U_TIM1_RCR @0x5263;  //Repetition Counter Register
ext volatile UCharField U_TIM1_CCR1H @0x5264;//Capture/Compare Register 1 High
ext volatile UCharField U_TIM1_CCR1L @0x5265;//Capture/Compare Register 1 Low
ext volatile UCharField U_TIM1_CCR2H @0x5266;//Capture/Compare Register 2 High
ext volatile UCharField U_TIM1_CCR2L @0x5267;//Capture/Compare Register 2 Low
ext volatile UCharField U_TIM1_CCR3H @0x5268;//Capture/Compare Register 3 High
ext volatile UCharField U_TIM1_CCR3L @0x5269;//Capture/Compare Register 3 Low
ext volatile UCharField U_TIM1_BKR @0x526A;  //Break Register
ext volatile UCharField U_TIM1_DTR @0x526B;  //Dead-Time Register
ext volatile UCharField U_TIM1_OISR @0x526C; //Output Idle State Register
#define TIM1_CR1                        U_TIM1_CR1.byte
#define TIM1_CR2                        U_TIM1_CR2.byte
#define TIM1_SMCR                       U_TIM1_SMCR.byte
#define TIM1_ETR                        U_TIM1_ETR.byte
#define TIM1_IER                        U_TIM1_IER.byte
#define TIM1_SR1                        U_TIM1_SR1.byte
#define TIM1_SR2                        U_TIM1_SR2.byte
#define TIM1_EGR                        U_TIM1_EGR.byte
#define TIM1_CCMR1                      U_TIM1_CCMR1.byte
#define TIM1_CCMR2                      U_TIM1_CCMR2.byte
#define TIM1_CCMR3                      U_TIM1_CCMR3.byte
#define TIM1_CCER1                      U_TIM1_CCER1.byte
#define TIM1_CCER2                      U_TIM1_CCER2.byte
#define TIM1_CNTRH                      U_TIM1_CNTRH.byte
#define TIM1_CNTRL                      U_TIM1_CNTRL.byte
#define TIM1_PSCRH                      U_TIM1_PSCRH.byte
#define TIM1_PSCRL                      U_TIM1_PSCRL.byte
#define TIM1_ARRH                       U_TIM1_ARRH.byte
#define TIM1_ARRL                       U_TIM1_ARRL.byte
#define TIM1_RCR                        U_TIM1_RCR.byte
#define TIM1_CCR1H                      U_TIM1_CCR1H.byte
#define TIM1_CCR1L                      U_TIM1_CCR1L.byte
#define TIM1_CCR2H                      U_TIM1_CCR2H.byte
#define TIM1_CCR2L                      U_TIM1_CCR2L.byte
#define TIM1_CCR3H                      U_TIM1_CCR3H.byte
#define TIM1_CCR3L                      U_TIM1_CCR3L.byte
#define TIM1_BKR                        U_TIM1_BKR.byte
#define TIM1_DTR                        U_TIM1_DTR.byte
#define TIM1_OISR                       U_TIM1_OISR.byte


//TIM2
ext volatile UCharField U_TIM2_CR1 @0x5300;
ext volatile UCharField U_TIM2_IER @0x5301;
ext volatile UCharField U_TIM2_SR1 @0x5302;
ext volatile UCharField U_TIM2_SR2 @0x5303;
ext volatile UCharField U_TIM2_EGR @0x5304;
ext volatile UCharField U_TIM2_CCMR1 @0x5305;
ext volatile UCharField U_TIM2_CCMR2 @0x5306;
ext volatile UCharField U_TIM2_CCMR3 @0x5307;
ext volatile UCharField U_TIM2_CCER1 @0x5308;
ext volatile UCharField U_TIM2_CCER2 @0x5309;
ext volatile UCharField U_TIM2_CNTRH @0x530A;
ext volatile UCharField U_TIM2_CNTRL @0x530B;
ext volatile UCharField U_TIM2_PSCR @0x530C;
ext volatile UCharField U_TIM2_ARRH @0x530D;
ext volatile UCharField U_TIM2_ARRL @0x530E;
ext volatile UCharField U_TIM2_CCR1H @0x530F;
ext volatile UCharField U_TIM2_CCR1L @0x5310;
ext volatile UCharField U_TIM2_CCR2H @0x5311;
ext volatile UCharField U_TIM2_CCR2L @0x5312;
ext volatile UCharField U_TIM2_CCR3H @0x5313;
ext volatile UCharField U_TIM2_CCR3L @0x5314;
#define TIM2_CR1                        U_TIM2_CR1.byte
#define TIM2_CR1_CEN                    U_TIM2_CR1.field.B0
#define TIM2_CR1_UDIS                   U_TIM2_CR1.field.B1
#define TIM2_CR1_URS                    U_TIM2_CR1.field.B2
#define TIM2_CR1_OPM                    U_TIM2_CR1.field.B3
#define TIM2_CR1_ARPE                   U_TIM2_CR1.field.B7


#define TIM2_IER                        U_TIM2_IER.byte
#define TIM2_IER_UIE                    U_TIM2_IER.field.B0
#define TIM2_IER_CC1IE                  U_TIM2_IER.field.B1
#define TIM2_IER_CC2IE                  U_TIM2_IER.field.B2
#define TIM2_IER_CC3IE                  U_TIM2_IER.field.B3


#define TIM2_SR1                        U_TIM2_SR1.byte
#define TIM2_SR1_UIF                    U_TIM2_SR1.field.B0
#define TIM2_SR1_CC1IF                  U_TIM2_SR1.field.B1
#define TIM2_SR1_CC2IF                  U_TIM2_SR1.field.B2
#define TIM2_SR1_CC3IF                  U_TIM2_SR1.field.B3
#define TIM2_SR1_TIF                    U_TIM2_SR1.field.B6

#define TIM2_SR2                        U_TIM2_SR2.byte
#define TIM2_SR2_CC1OF                  U_TIM2_SR2.field.B1
#define TIM2_SR2_CC2OF                  U_TIM2_SR2.field.B2
#define TIM2_SR2_CC3OF                  U_TIM2_SR2.field.B3

#define TIM2_EGR                        U_TIM2_EGR.byte
#define TIM2_EGR_UG                     U_TIM2_EGR.field.B0
#define TIM2_EGR_CC1G                   U_TIM2_EGR.field.B1
#define TIM2_EGR_CC2G                   U_TIM2_EGR.field.B2
#define TIM2_EGR_CC3G                   U_TIM2_EGR.field.B3
#define TIM2_EGR_TG                     U_TIM2_EGR.field.B6

#define TIM2_CCMR1                      U_TIM2_CCMR1.byte
#define TIM2_CCMR2                      U_TIM2_CCMR2.byte
#define TIM2_CCMR3                      U_TIM2_CCMR3.byte
#define TIM2_CCER1                      U_TIM2_CCER1.byte
#define TIM2_CCER1_CC1E                 U_TIM2_CCER1.field.B0
#define TIM2_CCER1_CC1P                 U_TIM2_CCER1.field.B1
#define TIM2_CCER1_CC2E                 U_TIM2_CCER1.field.B4
#define TIM2_CCER1_CC2P                 U_TIM2_CCER1.field.B5

#define TIM2_CCER2                      U_TIM2_CCER2.byte
#define TIM2_CCER2_CC3E                 U_TIM2_CCER2.field.B0
#define TIM2_CCER2_CC3P                 U_TIM2_CCER2.field.B1

#define TIM2_CNTRH                      U_TIM2_CNTRH.byte
#define TIM2_CNTRL                      U_TIM2_CNTRL.byte
#define TIM2_PSCR                       U_TIM2_PSCR.byte
#define TIM2_ARRH                       U_TIM2_ARRH.byte
#define TIM2_ARRL                       U_TIM2_ARRL.byte
#define TIM2_CCR1H                      U_TIM2_CCR1H.byte
#define TIM2_CCR1L                      U_TIM2_CCR1L.byte
#define TIM2_CCR2H                      U_TIM2_CCR2H.byte
#define TIM2_CCR2L                      U_TIM2_CCR2L.byte
#define TIM2_CCR3H                      U_TIM2_CCR3H.byte
#define TIM2_CCR3L                      U_TIM2_CCR3L.byte

//TIM3
ext volatile UCharField U_TIM3_CR1 @0x5320;
ext volatile UCharField U_TIM3_IER @0x5321;
ext volatile UCharField U_TIM3_SR1 @0x5322;
ext volatile UCharField U_TIM3_SR2 @0x5323;
ext volatile UCharField U_TIM3_EGR @0x5324;
ext volatile UCharField U_TIM3_CCMR1 @0x5325;
ext volatile UCharField U_TIM3_CCMR2 @0x5326;
ext volatile UCharField U_TIM3_CCER1 @0x5327;
ext volatile UCharField U_TIM3_CNTRH @0x5328;
ext volatile UCharField U_TIM3_CNTRL @0x5329;
ext volatile UCharField U_TIM3_PSCR @0x532A;
ext volatile UCharField U_TIM3_ARRH @0x532B;
ext volatile UCharField U_TIM3_ARRL @0x532C;
ext volatile UCharField U_TIM3_CCR1H @0x532D;
ext volatile UCharField U_TIM3_CCR1L @0x532E;
ext volatile UCharField U_TIM3_CCR2H @0x532F;
ext volatile UCharField U_TIM3_CCR2L @0x5330;

#define TIM3_CR1                        U_TIM3_CR1.byte
#define TIM3_CR1_CEN                    U_TIM3_CR1.field.B0
#define TIM3_CR1_UDIS                   U_TIM3_CR1.field.B1
#define TIM3_CR1_URS                    U_TIM3_CR1.field.B2
#define TIM3_CR1_OPM                    U_TIM3_CR1.field.B3
#define TIM3_CR1_ARPE                   U_TIM3_CR1.field.B7


#define TIM3_ETR                        U_TIM3_ETR.byte
#define TIM3_IER                        U_TIM3_IER.byte
#define TIM3_IER_UIE                    U_TIM3_IER.field.B0
#define TIM3_IER_CC1IE                  U_TIM3_IER.field.B1
#define TIM3_IER_CC2IE                  U_TIM3_IER.field.B2
#define TIM3_IER_CC3IE                  U_TIM3_IER.field.B3

#define TIM3_SR1                        U_TIM3_SR1.byte
#define TIM3_SR1_UIF                    U_TIM3_SR1.field.B0
#define TIM3_SR1_CC1IF                  U_TIM3_SR1.field.B1
#define TIM3_SR1_CC2IF                  U_TIM3_SR1.field.B2
#define TIM3_SR1_CC3IF                  U_TIM3_SR1.field.B3
#define TIM3_SR1_TIF                    U_TIM3_SR1.field.B6

#define TIM3_SR2                        U_TIM3_SR2.byte
#define TIM3_SR2_CC1OF                  U_TIM3_SR2.field.B1
#define TIM3_SR2_CC2OF                  U_TIM3_SR2.field.B2
#define TIM3_SR2_CC3OF                  U_TIM3_SR2.field.B3


#define TIM3_EGR                        U_TIM3_EGR.byte
#define TIM3_EGR_UG                     U_TIM3_EGR.field.B0
#define TIM3_EGR_CC1G                   U_TIM3_EGR.field.B1
#define TIM3_EGR_CC2G                   U_TIM3_EGR.field.B2
#define TIM3_EGR_CC3G                   U_TIM3_EGR.field.B3
#define TIM3_EGR_TG                     U_TIM3_EGR.field.B6

#define TIM3_CCMR1                      U_TIM3_CCMR1.byte
#define TIM3_CCMR2                      U_TIM3_CCMR2.byte
#define TIM3_CCER1                      U_TIM3_CCER1.byte
#define TIM3_CCER1_CC1E                 U_TIM3_CCER1.field.B0
#define TIM3_CCER1_CC1P                 U_TIM3_CCER1.field.B1
#define TIM3_CCER1_CC2E                 U_TIM3_CCER1.field.B4
#define TIM3_CCER1_CC2P                 U_TIM3_CCER1.field.B5

#define TIM3_CNTRH                      U_TIM3_CNTRH.byte
#define TIM3_CNTRL                      U_TIM3_CNTRL.byte
#define TIM3_PSCR                       U_TIM3_PSCR.byte
#define TIM3_ARRH                       U_TIM3_ARRH.byte
#define TIM3_ARRL                       U_TIM3_ARRL.byte
#define TIM3_CCR1H                      U_TIM3_CCR1H.byte
#define TIM3_CCR1L                      U_TIM3_CCR1L.byte
#define TIM3_CCR2H                      U_TIM3_CCR2H.byte
#define TIM3_CCR2L                      U_TIM3_CCR2L.byte

//TIM4
ext volatile UCharField U_TIM4_CR1 @0x5340;//TIM4 Control register1
ext volatile UCharField U_TIM4_IER @0x5341;//TIM4 interrupt enable register
ext volatile UCharField U_TIM4_SR @0x5342;//TIM4 status register
ext volatile UCharField U_TIM4_EGR @0x5343;//TIM4 Event Generation register
ext volatile UCharField U_TIM4_CNTR @0x5344;//TIM4 Counter
ext volatile UCharField U_TIM4_PSCR @0x5345;//TIM4 Prescaler register
ext volatile UCharField U_TIM4_ARR @0x5346;//TIM4 Auto-reload register
#define TIM4_CR1                       U_TIM4_CR1.byte
#define TIM4_CR1_CEN               U_TIM4_CR1.field.B0 //Counter Enable.
#define TIM4_CR1_UDIS             U_TIM4_CR1.field.B1 //Update Disable.
#define TIM4_CR1_URS               U_TIM4_CR1.field.B2 //Update Request Source.
#define TIM4_CR1_OPM               U_TIM4_CR1.field.B3 //One Pulse Mode.
#define TIM4_CR1_ARPE             U_TIM4_CR1.field.B7 //Auto-Reload Preload Enable.

#define TIM4_IER                       U_TIM4_IER.byte
#define TIM4_IER_UIE                U_TIM4_IER.field.B0 //Update Interrupt Enable.

#define TIM4_SR                        U_TIM4_SR.byte
#define TIM4_SR_UIF                U_TIM4_SR.field.B0 //Update Interrupt Flag.

#define TIM4_EGR                       U_TIM4_EGR.byte