chips.txt

比较详尽的VGA端口寄存器的文档

3d6h index 51h (R/W):  Panel Type                     (82c455/6/7, 655x0 Only)
bit   0  (82c455/6) Double drive if set, single else
      1  Double panel if set, single else
    2-3  (82c455-7) Type of display
          0=LCD, 1=CRT, 2=Plasma or Electroluminescent.
      2  (655x0) Display Type. 0=CRT, 1=Flat Panel.
      3  (655x0) 8/16 bit FP Video Interface.
         If set the Flat Panel Video interface is 16 bit.
    4-5   0=Color panel 3 bit data pack
          1=Color Panel 1 bit data pack
          2=(82c455/6) Monochrome Panel
          3=(82c457)   Extended 4-bit pack
      4  (655x0) Video Skew.
         If set Video data is delayed 1 shift clock cycle.
      5  (655x0) Shift Clock Mask (SM). Flat Panel mode only.
         If set the shift clock is forced low outside the display
         interval. If clear it also toggles outside the interval.
      6  Flat Panel Compatibility enabled if set
      7  Text Video output polarity

3d6h index 52h (R/W):  Panel Size                            (82c455/6/7 Only)
bit 0-1  Horizontal Size of panel
          1=640 pixels, 2=720 pixels
    3-6  Vertical Size of panel
          1=200 lines, 2=350, 4=400, 8=480 lines

3d6h index 52h (R/W):  Power Down Control Register.               (655x0 only)
bit 0-2  FP Normal Refresh Count. Flat Panel modes only.
         Number of memory refresh cycles to perform per scanline.
      3  Panel Off Mode. If set the CRT/FP interface is inactive.
      4  Panel Off Control Bit 0. Only effective if bit 3 is set.
         If set the Video data, CRT and Flat Panel timing signals
         are forced inactive, rather than only the Video data.
      5  Panel Off Control bit 1. Only effective if bit 3 is set.
         If set inactive video data and/or timing pins are tri-stated
         rather than being driven.
      6  Standby Control. Only effective if the STNDBY/ is low.
         In standby mode the video output, timings and CPU interface
         are inactive. If set the Display memory refresh is derived
         from the 32kHz input. If clear the DRAMs are self-refreshed.
      7  CRT Mode Panel Off. Only effective in CRT modes.
         If set Video data and timing signals are tri-stated.

3d6h index 53h (R/W):  Override Register              (82c455/6/7, 655x0 Only)
bit   0  Disable AR10D2. If set the ninth pixel of characters is
         controlled by this register, if clear it is controlled
         by the Mode Control Register (3C0h index 10h) bit 2.
      1  Alternate Line Graphics Character Code.
         Only effective if bit 0 is set.
         If set the ninth pixel of a character is forced to the same value
         as the 8th pixel. If clear it is forced to the background color.
      2  (655x0) FRC option 1.
      3  (655x0) FRC option 2.
    4-5  (65530) Pixel Packing. Only effective for Color STN panels.
            0: 3-bit Pack. 3d6h index 50h bits 4-5 can be 0,1 or 2.
            1: 4-bit Pack. 3d6h index 50h bits 4-5 can be 1 or 1.
            3: Extended 4-bit Pack. 3d6h index 50h bits 4-5 must be 1.
      7  (65530) High Color Mode Flat Panel Operation.
         If set Hi-Color operation is enabled in hi-res modes on
         Flat panel. If clear it is enabled in low-res modes.

3d6h index 54h (R/W):  Alternate Miscellaneous Output Register
                                                             (82c455/6/7 Only)
bit   0  Panel Video Skew
    2-3  Clock Select Bits
      6  Hsync. Negative if set, Positive if clear.
      7  Vsync. Negative if set, Positive if clear.
Note: For Flat Panel systems this register replaces the Miscellaneous
      Output Register (3C2h).

3d6h index 54h (R/W):  FP Interface Register                      (655x0 Only)
bit   0  FP Blank Polarity.
         If set the BLANK/ pin has negative polarity.
      1  If set the BLANK/ pin outputs only the FP Horizontal Blank
         signal, if clear it outputs both Vertical and Horizontal
         Blank signals.
    2-3  FP Clock Select Bits 0-1.
         In Flat Panel modes these bits replace 3C2h bits 2-3.
    4-5  FP Feature Control bits 0-1.
         In Flat Panel modes these bits replace 3dAh bits 0-1.
      6  FP HSync (LP) Polarity.
         If set the HSync (LP) pin has negative polarity.
      7  FP VSync (FLM) Polarity.
         If set the Vsync (FLM) pin has negative polarity.
Note: This register is only effective in Flat Panel modes.

3d6h index 55h (R/W):  Text Mode 350_A                       (82c455/6/7 Only)
bit 0-3  (Number of blank lines)-1 inserted between text rows
         I.e.  if 5, insert 6 blank lines after a text line.
      4  If clear lines are inserted.
Note: This register is used if in a 350 line text mode
      and fonts are larger than 8 lines.

3d6h index 55h (R/W):  Horizontal Compensation Register           (655x0 Only)
bit   0  Enable Horizontal Compensation (EHCP)
         If set Horizontal compensation is enabled.
      1  Enable Automatic Horizontal Centering (EAHC)
         If set (and bit 0 is set) EAHC is enabled.
         Horizontal left and right borders will be computed
         automatically.
      2  Enable Text Mode Horizontal Compression (ETHC).
         If set, bit 0 is set and we are in a Flat Panel Text
         mode ETHC is enabled.
         9-dot text modes will be forced to 8-bit.
      5  Enable Automatic Horizontal Doubling (EAHD).
         If set and bit 0 is set, EAHD is enabled.
         If Horizontal Display Width (3d4h index 1) is less
         than or equal to half the Horizontal Panel Size
         (3d6h index 18h) horizontal pixel doubling will be forced.
      6  Alternate CRT Hsync Polarity. Negative if set, Positive if clear.
      7  Alternate CRT Vsync Polarity. Negative if set, Positive if clear.

3d6h index 56h (R/W):  Text Mode 350_B                       (82c455/6/7 Only)
bit 0-3  (Number of blank lines)-1 inserted between text rows
      4  If clear lines are inserted.
Note: This register is used if in a 350 line text mode
      and fonts are smaller than or equal to 8 lines.

3d6h index 56h (R/W):  Horizontal Centering Register              (655x0 Only)
bit 0-7  Horizontal Left Border. Size of the left border in pixels  -1.
         Only used if in a Flat Panel mode and non-automatic
         horizontal centering is enabled.

3d6h index 57h (R/W):  Text Mode 400                         (82c455/6/7 Only)
bit 0-3  (Number of blank lines)-1 inserted between text rows
      4  If clear lines are inserted.
Note: This register is used if in a 400 line text mode.

3d6h index 57h (R/W):  Vertical Compensation Register             (655x0 Only)
bit   0  Enable Vertical Compensation if set.
      1  Enable Automatic Vertical Centering. If set and bit 0 set, the image
         will automatically be centered vertically.
      2  Enable Text Mode Vertical Stretching.
         If set and bit 0 set, text mode vertical
         stretching is enabled.
    3-4  Text Mode Vertical Stretching. If bit 0 & 2 set.
           0 = Double Scanning (DS) and Line Insertion (LI)
               with priority: DS+li, DS, LI.
           1 = Double Scanning (DS) and Line Insertion (LI)
               with priority: DS+LI, LI, DS.
           2 = Double Scanning (DS) and TallFont (TF)
               with priority: DS+TF, DS, TF.
           3 = Double Scanning (DS) and TallFont (TF)
               with priority: DS+TF, TF, DS.
      5  Enable Vertical Stretching if set and bit 0 set.
      6  Vertical Stretching. If bits 0 and 5 set.
           0 = Double Scanning (DS) and Line Replication (LR)
               with priority: DS+LR, DS, LR.
           1 = Double Scanning (DS) and Line Replication (LR)
               with priority: DS+LR, LR, DS.

3d6h index 58h (R/W):  Graphics Mode 350                     (82c455/6/7 Only)
bit 0-3  Number of scan lines between stretch/delete
      4  Enable vertical Stretching if set
      5  Enable vertical deletion if set
      6  If set the value in bits 0-3 is incremented every other period.
Note: This register is used if in a 350 line graphics mode.

3d6h index 58h (R/W):  Vertical Centering Register                (655x0 Only)
bit 0-7  Vertical Top Border LSBs.
         Lower 8 bits of the Vertical Top Border.
         Bits 8-9 are in 3d6h index 59h bits 5-6.
Note: used only in Flat panel modes when non-automatic
      vertical centering is enabled.

3d6h index 59h (R/W):  Graphics Mode 400                     (82c455/6/7 Only)
bit 0-3  Number of scan lines between stretch/delete
      4  Enable vertical Stretching if set
      5  Enable vertical deletion if set
      6  If set the value in bits 0-3 is incremented every other period.
Note: This register is used if in a 400 line graphics mode.

3d6h index 59h (R/W):  Vertical Line Insertion Register           (655x0 Only)
bit 0-3  Vertical line Insertion Height.
         Number of lines -1 to insert between text rows.
    5-6  Bits 8-9 of the Vertical Top Border (3d6h index 58h).
Note: This register is only used in Flat Panel text modes.

3d6h index 5Ah (R/W):  Flat Panel Vertical Display Start_400 (82c455/6/7 Only)
bit 0-7  For 400 line Flat Panel modes  these are the lower 8 bits of the
         Vertical Display Start (in scanlines). The upper 2 bits are in the
         Flat Panel Vertical Overflow 2 Register (3d6h index 6Bh) bits 2-3.

3d6h index 5Ah (R/W):  Vertical Line Replication Register.        (655x0 Only)
bit 0-3  Vertical line Replication Height.
         Number of lines-1 between replicated lines.
         Double scanned lines are also counted.
Note: This register is only used when in Flat Panel text modes
      and Line Replication is enabled.

3d6h index 5Bh (R/W):  Flat Panel Vertical Display End_400   (82c455/6/7 Only)
bit 0-7  For 400 line Flat Panel modes these are the lower 8 bits of the
         Vertical Display End (in scanlines). The upper 2 bits are in the
         Flat Panel Vertical Overflow 2 Register (3d6h index 6Bh) bits 6-7.

3d6h index 5Bh (R/W):  Panel Power Sequencing Delay register      (65530 Only)
bit 0-3  Panel Power Down sequencing Delay in 32ms counts. (0-480ms)
    4-7  Panel Power Up Sequencing Delay in 4ms counts. (0-60ms)
Note: This register is used only when the Panel power Sequencing feature is
      enabled. Default to 81h for compatibility with 65520.

3d6h index 5Ch (R/W):  Weight Clock Control Register A         (82c455/6 only)
bit 0-5  This register is used in Flat Panel mode when bit 7 of the Panel
         Format Register (3d6h index 50h) is set and bits 2-3 of the same
         register is either 1 or 2.
         The time from Hsync to the first pulse on the WGTCLK is this
         value*4 dot clocks.  See also 3d6h index 5Dh and 6Ch.

3d6h index 5Dh (R/W):  Weight Clock Control Register B         (82c455/6 only)
bit 0-5  This register is used in Flat Panel mode when bit 7 of the Panel
         Format Register (3d6h index 50h) is set and bits 2-3 of the same
         register is either 1 or 2.
         The time between WGTCLK pulses is this value*4 dot clocks.
         See also 3d6h index 5Ch and 6Ch.

3d6h index 5Eh (R/W):  ACDCLK Control Register        (82c455/6/7, 655x0 only)
bit 0-6  ACDCLK Count. Number of Hsync pulses between changes in ACDCLK.
      7  If set the ACDCLK phase inverts every frame, if clear the ACDCLK
         changes phase when the number of Hsync pulses specified in
         bits 0-6 have elapsed.

3d6h index 5Fh (R/W):  Power Down Mode Refresh Register
                                                      (82c455/6/7, 655x0 only)
bit 0-7  (82c455/6/7) Sleep Mode Refresh Frequency.
         A refresh will happen for every (4*this value)+8 dot clocks.
    0-1  (655x0) Power Down Refresh Frequency.
         Refresh happens every xx micro seconds:
           0=16usek, 1=32 usek, 2=64 usek and 3=128 usek.

3d6h index 60h (R/W):  Blink Rate Control             (82c455/6/7, 655x0 Only)
bit 0-5  Blink Rate.
         Character Blink Freq = Vertical sync Freq * (Blink rate+1)
         Cursor blink freq = Character Blink Freq *2.
    6-7  Blink Cycle  1=25%, 2=50%, 3=75%

3d6h index 61h (R/W):  Smartmap Control                 (82c455/6, 655x0 Only)
bit   0  If set enables Smartmap and bypasses internal color lookup table.
    1-4  Threshold for (Foreground - Background) diff
         if diff less than the threshold the foreground and
         background colors will be spread (See 3d6h index 62h).
      5  Smartmap Saturation value.
         If set the result is calculated modulo 16,
         if clear it is rounded to min. or max. values (0 and 0Fh).
      6  (82c456, 655x0) Enhanced text if set
         (reverses attributes 7h and Fh)
      7  (655x0) Text Video Output Polarity (TVP) if set.
         Only effective in Flat Panel modes.

3d6h index 62h (R/W):  Smartmap Shift Parameter         (82c455/6, 655x0 Only)
bit 0-3  Number of levels to shift foreground color
         when too little difference (See 3d6h index 61h bit 1-4).
    4-7  Number of levels to shift background color.

3d6h index 63h  (R/W): Graphics Color Mapping Control          (82c455/6 Only)
bit 0-3  Threshold color value for mono output.
         All colors >= this value will be set to 1,
         all lower to 0.
      4  Use upper 4 bits of 256 color if set, lower if not.
      5  Enable internal color lookup table if set
      6  Write protect internal color look up table if set
      7  Graphics output polarity

3d6h index 63h  (R/W): Smartmap Color Mapping Control             (655x0 only)
bit 0-5  Color Threshold. Used for mapping 6 bit color to 1 bit.
         Color values greater than or equal than this value
         are mapped to 1, and lower values are mapped to 0.
      6  Must be set to 1.
      7  Graphics Video Output Polarity
         Inverted polarity if set, normal if clear.
         Graphics video output only.

3d6h index 64h  (R/W): Alternate Vertical Total       (82c455/6/7, 655x0 only)
bit 0-7  Alternate Vertical Total
Note: For Flat Panel modes this register replaces the Vertical Total Register
      (3d4h index 6).

3d6h index 65h  (R/W): Alternate Overflow             (82c455/6/7, 655x0 only)
bit   0  Alternate Vertical Total bit 8
      1  (455/6/7) Alternate Vertical Display End bit 8.
         (655x0)   Alternate Vertical Panel Size bit 8.
      2  Alternate Vertical Sync Start bit 8.
      3  (655x0) Alternate Vertical Sync Start bit 10.
      4  (655x0) Alternate Vertical Total bit 10.
      5  Alternate Vertical Total bit 9
      6  (455/6/7) Alternate Vertical Display End bit 9.
         (655x0)   Alternate Vertical Panel Size bit 9.
      7  Alternate Vertical Sync Start bit 9.

3d6h index 66h  (R/W): Alternate Vertical Sync Start  (82c455/6/7, 655x0 only)
bit 0-7  Alternate Vertical Sync Start
Note: For Flat Panel modes this register replaces the Vertical
      Sync Start Register (3d4h index 10h).

3d6h index 67h  (R/W): Alternate Vertical Sync End    (82c455/6/7, 655x0 only)
bit 0-3  Alternate Vertical Sync End
Note: For Flat Panel modes this register replaces the Vertical
      Sync End Register (3d4h index 11h).

3d6h index 68h  (R/W): Alternate Vertical Display Enable     (82c455/6/7 only)
bit 0-7  Alternate Vertical Display Enable
Note: For Flat Panel modes this register replaces the Vertical Display Enable
      Register (3d4h index 12h)