s3.txt

比较详尽的VGA端口寄存器的文档

        6  YMAJAXIS. For Bresenham line drawing commands this bit determines
           which axis is the independent or major axis. INC_X and INC_Y
           determines which quadrant the slope falls within. This bit further
           defines the slope to within an octant.
           If set Y is the major (independent) axis.
        7  INC_Y. This bit together with INC_X determines which quadrant
           the slope of a line lies within. They also determine the
           orientation of rectangle draw commands.
           If set lines are drawn in the positive Y direction (down).
        8  WAIT YES. If set the drawing engine waits for read/write of the
           PIX_TRANS register (E2E8h) for each pixel during a draw operation.
        9  (911-928) BUS SIZE. If set the PIX_TRANS register (E2E8h) is
            processed internally as two bytes in the order specified by BYTE
            SWAP. If clear all accesses to E2E8h are 8bit.
     9-10  (864,964) BUS SIZE. Select System Bus Size. Controls the width of
            the Pixel Data Transfer registers (E2E8h,E2EAh) and the memory
            mapped I/O. 0: 8bit, 1: 16bit, 2: 32bit
       12  BYTE SWAP. Affects both reads and writes of SHORT_STROKE (9EE8h)
           and PIX_TRANS (E2E8h) when 16bit=1.
           If set take low byte first, if clear take high byte first.
    13-15  Draw Command:
            0 = NOP. Used for Short Stroke Vectors.
            1 = Draw Line. If bit 3 is set the line is drawn to the angle in
                bits 5-7 and the length in the Major Axis Pixel Count register
                (96E8h), if clear the line is drawn from the Bresenham
                constants in the Axial Step Constant register(8AE8h), Diagonal
                Step Constant register (8EE8h), Line Error Term register
               (92E8h) and bits 5-7 of this register.
            2 = Rectangle Fill. The Destination X (8EE8h) and Y (8AE8h)
                registers holds the coordinates of the rectangle to fill and
                the Major Axis Pixel Count register (96E8h) holds the
                horizontal width (in pixels) fill and the Minor Axis Pixel
                Count register (BEE8h index 0) holds the height of the
                rectangle.
            6 = BitBLT. Copies the source rectangle specified by the Current X
                (86E8h) and Y (8AE8h) registers to the destination rectangle,
                specified as for the Rectangle Fills.
            7 = (80x +) Pattern Fill. The source rectangle is an 8x8 pattern
                rectangle, which is copied repeatably to the destination
                rectangle.

9EE8h W(W):  Short Stroke Vector Transfer Register (SHORT_STROKE)
bit   0-3  PIXEL-LENGTH. Length of vector projected onto the major axis.
           This is also the number of pixels drawn.
        4  DRW-MV. Set to draw the line, clear to move over it.
      5-7  DRWG DIR. The angle measured counter-clockwise from horizontal
           right) at which the line is drawn,
             0 = 000 degrees
             1 = 045 degrees
             2 = 090 degrees
             3 = 135 degrees
             4 = 180 degrees
             5 = 225 degrees
             6 = 270 degrees
             7 = 315 degrees
     8-15  The lower 8 bits are duplicated in the upper 8 bits so two
           short stroke vectors can be drawn with one command.
Note: The upper byte must be written for the SSV command to be executed.
      Thus if a byte is written to 9EE8h another byte must be written to
      9EE9h before execution starts. A single 16bit write will do.
      If only one SSV is desired the other byte can be set to 0.

A2E8h W(R/W):  Background Color Register (BKGD_COLOR)
bit   0-7  (911/924) Background Color. This is the color used for writing
            pixels where the Foreground Color Mix is selected and FSS=0, or
            the Background Color Mix is selected and BSS=0.
     0-15  (801/5) Background color. See above.
     0-31  (928 +) Background color. See above. In 32 bits per pixel modes
            there are two 16bit registers at this address. BEE8h index 0Eh bit
             4 selects which 16 bits are accessible and each access toggles to
            the other 16 bits.

A6E8h W(R/W):  Foreground Color Register (FRGD_COLOR)
bit   0-7  (911/924) Foreground Color. This is the color used for writing
            pixels where the Foreground Color Mix is selected and FSS=1, or
            the Background Color Mix is selected and BSS=1.
     0-15  (801/5) Foreground color. See above.
     0-31  (928 +) Foreground color. See above. In 32 bits per pixel modes
            there are two 16bit registers at this address. BEE8h index 0Eh bit
             4 selects which 16 bits are accessible and each access toggles to
            the other 16 bits.

AAE8h W(R/W):  Write Mask Register (WRT_MASK)
bit   0-7  (911/924) Writemask. A plane can only be modified if the
            corresponding bit is set.
     0-15  (801/5) Writemask. See above.
     0-31  (928 +) Writemask. See above. In 32 bits per pixel modes there are
            two 16bit registers at this address. BEE8h index 0Eh bit 4 selects
            which 16 bits are accessible and each access toggles to the other
            16 bits.

AEE8h W(R/W):  Read Mask Register (RD_MASK)
bit   0-7  (911/924) Read Mask affects the following commands: CMD_RECT,
            CMD_BITBLT and reading data in Across Plane Mode.
            Each bit set prevents the plane from being read.
     0-15  (801/5) Readmask. See above.
     0-31  (928 +) Readmask. See above. In 32 bits per pixel modes there are
            two 16bit registers at this address. BEE8h index 0Eh bit 4 selects
            which 16 bits are accessible and each access toggles to the other
            16 bits.

B2E8h W(R/W):  Color Compare Register (COLOR_CMP)                (not 911/924)
bit  0-15  (801/5) This is the color which is compared to the destination data
            during BitBlts. The arithmetic comparison to be used (<,>,=,true,
            false, etc..) is specified by the COLCMPO bits of the PIX_CNTL
            register. If the result of the comparison is true, the destination
            data is left unchanged.
     0-31  (928 +) See above. In 32 bits per pixel modes there are two 16bit
            registers at this address. BEE8h index 0Eh bit 4 selects which 16
            bits are accessible and each access toggles to the other 16 bits.

B6E8h W(R/W):  Background Mix Register (BKGD_MIX)
bit   0-3  Background MIX (BACKMIX).
            00  not DST
            01  0 (false)
            02  1 (true)
            03  2 DST
            04  not SRC
            05  SRC xor DST
            06  not (SRC xor DST)
            07  SRC
            08  not (SRC and DST)
            09  (not SRC) or DST
            0A  SRC or (not DST)
            0B  SRC or DST
            0C  SRC and DST
            0D  SRC and (not DST)
            0E  (not SRC) and DST
            0F  not (SRC or DST)
           DST is always the destination bitmap, bit SRC has four
           possible sources selected by the BSS bits.
      5-6  Background Source Select (BSS)
             0  BSS is Background Color
             1  BSS is Foreground Color
             2  BSS is Pixel Data from the PIX_TRANS register (E2E8h)
             3  BSS is Bitmap Data (Source data from display buffer).

BAE8h W(R/W):  Foreground Mix Register (FRGD_MIX)
bit   0-3  Foreground MIX (FOREMIX).
           Same as BACKMIX in B6E8h.
      5-6  Foreground Source Select (FSS)
             0  FSS is Background Color
             1  FSS is Foreground Color
             2  FSS is Pixel Data from the PIX_TRANS register (E2E8h)
             3  FSS is Bitmap Data (Source data from display buffer).

BEE8h W(R):  Read Register Data Register (RD_REG_DT)               (801/5,928)
bit  0-15  BEE8h index Fh bits 0-2 selects the index which is read from this
           address. Each read of this address increases the pointer so all
           indices can be read by sequential reads of this register.

BEE8h W(W):  Multifunction Control Register (MULTIFUNC_CTRL)
bit  0-11  Data.
    12-15  INDEX. indicates which Multifunction register
           will be written with the data in bits 0-11.
Note: Several registers are placed at BEE8h. When BEE8 is written
      the bits 12-15 selects the specific register to receive the write.
Note: These registers are write-only on the 911 and 924, but read/write on
      later chips.

BEE8h index 00h W(R/W): Minor Axis Pixel Count Register (MIN_AXIS_PCNT).
bit  0-10  (911/924) Rectangle Height. Height of BITBLT or rectangle command.
            Actual height is one larger.
     0-11  (80x +) Rectangle Height. See above
Note: See note above on reading BEE8h.

BEE8h index 01h W(R/W):  Top Scissors Register (SCISSORS_T).
bit  0-10  (911/924) Clipping Top Limit. Defines the upper bound of the
            Clipping Rectangle (Lowest Y coordinate).
     0-11  (80x +) Clipping Top Limit. See above
Note: See note above on reading BEE8h.

BEE8h index 02h W(R/W):  Left Scissors Registers (SCISSORS_L).
bit  0-10  (911,924) Clipping Left Limit. Defines the left bound of the
            Clipping Rectangle (Lowest X coordinate).
     0-11  (80x +) Clipping Left Limit. See above.
Note: See note above on reading BEE8h.

BEE8h index 03h W(R/W):  Bottom Scissors Register (SCISSORS_B).
bit  0-10  (911,924) Clipping Bottom Limit. Defines the bottom bound of the
            Clipping Rectangle (Highest Y coordinate).
     0-11  (80x +) Clipping Bottom Limit. See above.
Note: See note above on reading BEE8h.

BEE8h index 04h W(R/W):  Right Scissors Register (SCISSORS_R).
bit  0-10  (911,924) Clipping Right Limit. Defines the right bound of the
            Clipping Rectangle (Highest X coordinate).
     0-11  (80x +) Clipping Bottom Limit. See above.
Note: See note above on reading BEE8h.

BEE8h index 0Ah W(R/W):  Pixel Control Register (PIX_CNTL).
BIT     2  (911-928) Pack Data. If set image read data is a monochrome bitmap,
            if clear it is a bitmap of the current pixel depth
      6-7  DT-EX-DRC. Select Mix Select.
             0  Foreground Mix is always used.
             2  CPU Data determines the Mix register used.
             3  Video memory determines the Mix register used.
Note: See note above on reading BEE8h.

BEE8h index 0Dh W(R/W):  Multifunction Control Miscellaneous 2 Register
                           (MULT_MISC2)                              (864,964)
bit   0-2  DST-BASE. Destination Base. Selects the megabyte the first
           destination address is in (huh?)  0: 1st MB, 1: 2nd MB
               3: 4th Mb, 4: 5th MB, 5: 6th MB, 6: 7th MB, 7: 8th MB
           If this is >0 it will override index Eh bits 0-1
      4-6  (864,964) SRC-BASE. Source Base. Selects the megabyte the first
            source address is in (huh?).  0: 1st MB, 1: 2nd MB, 2: 3rd MB,
              3: 4th MB, 4: 5th MB, 5: 6th MB, 6: 7th MB, 7: 8th MB
           If this is >0 it will override index Eh bits 2-3

BEE8h index 0Eh W(R/W):  Multifunction Control Miscellaneous Register
                           (MULT_FUNC)                                 (80x +)
bit     0  (801/5) DEST-BA. Destination Base Address. Selects the megabyte the
             first destination address is in (huh?)  0: 1st MB, 1: 2nd MB
      0-1  (928 +) DEST-BA. See above, plus  2: 3rd MB, 3: 4th MB
        2  (801/5) SRC-BA. Source Base Address. Selects the megabyte the
             first source address is in (huh?)
               0: 1st MB, 1: 2nd MB, 2: (928) 3rd MB, 3: (928) 4th MB
      2-3  (928 +) SRC-BA. See above
        4  (928 +) RSF. Register Select Flag. In 32bits per pixel modes this
            flag determines which half of the 32bit registers (A2E8h, A6E8h,
            AAE8h, AEE8h, B2E8h) will be accessible.
              0: Lower half (bits 0-15), 1: Upper half (bits 16-31).
        5  EXT CLIP. External Clipping. If set only pixels outside the
           Clipping Rectangle are drawn, if clear only pixels inside are
           drawn.
        6  SLW RMW. Slow Read/Modify/Write Cycle. Set to use slow RMW cycles
            (4 MCLKs), clear to use fast RMW cycles (3 MCLKs).
        7  SRC NE. Source Not Equal. If set bitmap data will only be updated
            if the Color Compare register (B2E8h) is equal to the source data,
            if clear the update only happens if the register and the source
            data differ. If bit 8 is clear the bitmap data will always be
            updated.
        8  Enable Color Compare. If set enables Color Comparison.