8514.txt

比较详尽的VGA端口寄存器的文档

      9EE9h before execution starts. A single 16bit write will do.
      If only one SSV is desired the other byte can be set to 0.
Note: In the original IBM 8514/A this register is Write only.
      In the CT82c480 it is read/writable

A2E8h W(W):  Background Color Register (BKGD_COLOR)
bit   0-7  Background Color. This is the color used for writing pixels
           where the Foreground Color Mix is selected and FSS=0, or the
           Background Color Mix is selected and BSS=0.
     8-15  Reserved(0)
Note: During drawing commands reading this register is equivalent to
      reading the PIX_TRANS register (E2E8h).
      This register is writable when GPBUSY=DATARDY=0 or when PCDATA=0.
      Otherwise during drawing commands with PCDATA=1 a write to A2E8h
      functions as a write to the PIX_TRANS register.

A6E8h W(W):  Foreground Color Register (FRGD_COLOR)
bit   0-7  Foreground Color. This is the color used for writing pixels
           where the Foreground Color Mix is selected and FSS=1, or the
           Background Color Mix is selected and BSS=1.
     8-15  Reserved(0)
Note: During drawing commands reading this register is equivalent to
      reading the PIX_TRANS register (E2E8h).
      This register is writable when GPBUSY=DATARDY=0 or when PCDATA=0.
      Otherwise during drawing commands with PCDATA=1 a write to A6E8h
      functions as a write to the PIX_TRANS register.

AAE8h W(R/W):  Write Mask Register (WRT_MASK)
bit   0-7  Writemask. A plane can only be modified if the corresponding
           bit is set.
     8-15  Reserved(0)
Note: In the original IBM 8514/A this register is Write only.
      In the CT82c480 it is read/writable

AEE8h W(R/W):  Read Mask Register (RD_MASK)
bit   0-7  Read Mask affects the following commands: CMD_RECT, CMD_BITBLT
           and reading data in Across Plane Mode.
           Each bit set prevents the plane from being read.
     8-15  Reserved(0)
Note: In the original IBM 8514/A this register is Write only.
      In the CT82c480 it is read/writable

B2E8h W(R/W):  Color Compare Register (COLOR_CMP)
bit   0-7  This is an 8 bit color which is compared to the destination
           data during BitBlts. The arithmetic comparison to be used
           (<,>,=,true,false, etc..) is specified by the COLCMPO bits
           of the PIX_CNTL register.
           If the result of the comparison is true, the destination data
           is left unchanged.
     8-15  Reserved(0)
Note: In the original IBM 8514/A this register is Write only.
      In the CT82c480 it is read/writable

B6E8h W(R/W):  Background Mix Register (BKGD_MIX)
bit   0-4  Background MIX (BACKMIX).
            00  not DST
            01  0 (false)
            02  1 (true)
            03  2 DST
            04  not SRC
            05  SRC xor DST
            06  not (SRC xor DST)
            07  SRC
            08  not (SRC and DST)
            09  (not SRC) or DST
            0A  SRC or (not DST)
            0B  SRC or DST
            0C  SRC and DST
            0D  SRC and (not DST)
            0E  (not SRC) and DST
            0F  not (SRC or DST)
            10  min(SRC,DST)
            11  DST-SRC with underflow
            12  SRC-DST with underflow
            13  SRC+DST with overflow
            14  max(SRC,DST)
            15  (DST-SRC)/2 with underflow
            16  (SRC-DST)/2 with underflow
            17  (SRC+DST)/2 with overflow
            18  DST-SRC with saturate
            19  DST-SRC with saturate
            1A  SRC-DST with saturate
            1B  SRC+DST with saturate
            1C  (DST-SRC)/2 with saturate
            1D  (DST-SRC)/2 with saturate
            1E  (SRC-DST)/2 with saturate
            1F  (SRC+DST)/2 with saturate
           DST is always the destination bitmap, bit SRC has four
           possible sources selected by the BSS bits.
      5-6  Background Source Select (BSS)
             0  BSS is Background Color
             1  BSS is Foreground Color
             2  BSS is Pixel Data from the PIX_TRANS register (E2E8h)
             3  BSS is Bitmap Data (Source data from display buffer).
     7-15  Reserved(0)
Note: In the original IBM 8514/A this register is Write only.
      In the CT82c480 it is read/writable

BAE8h W(R/W):  Foreground Mix Register (FRGD_MIX)
bit   0-4  Foreground MIX (FOREMIX).
           Same as BACKMIX in B6E8h.
      5-6  Foreground Source Select (FSS)
             0  FSS is Background Color
             1  FSS is Foreground Color
             2  FSS is Pixel Data from the PIX_TRANS register (E2E8h)
             3  FSS is Bitmap Data (Source data from display buffer).
     7-15  Reserved(0)
Note: In the original IBM 8514/A this register is Write only.
      In the CT82c480 it is read/writable

BEE8h W(W):  Multifunction Control Register (MULTIFUNC_CTRL)
bit  0-11  Data.
    12-15  INDEX. indicates which Multifunction register
           will be written with the data in bits 0-11.
Note: Several registers are placed at BEE8h. When BEE8 is written
      the bits 12-15 selects the specific register to receive the write.
Note: In the original IBM 8514/A these registers are write-only.
      The CT 82c480 allows reading the registers by writing the index
      to bits 0-3 of the Extended Configuration Register 3 (5EE8h)
      and then reading BEE8h. Bits 12-15 read are not valid.

BEE8h index 00h W(W): Minor Axis Pixel Count Register (MIN_AXIS_PCNT).
bit  0-10  Height of BITBLT or rectangle command.
           Actual height is one larger.
       11  Reserved(0)
Note: See note above on reading BEE8h.

BEE8h index 01h W(W):  Top Scissors Register (SCISSORS_T).
bit  0-11  Minimum Y co-ordinate value for the scissors rectangle.
Note: See note above on reading BEE8h.

BEE8h index 02h W(W):  Left Scissors Registers (SCISSORS_L).
bit  0-11  Minimum X co-ordinate value for the scissors rectangle.
Note: See note above on reading BEE8h.

BEE8h index 03h W(W):  Bottom Scissors Register (SCISSORS_B).
bit  0-11  Maximum Y co-ordinate value for the scissors rectangle.
Note: See note above on reading BEE8h.

BEE8h index 04h W(W):  Right Scissors Register (SCISSORS_R).
bit  0-11  Maximum X co-ordinate value for the scissors rectangle.
Note: See note above on reading BEE8h.

BEE8h index 05h W(W):  Memory Control Register (MEM_CNTL).
bit   0-1  HORCFG. Xco-ordinate divider.
             0=4, 1=5, 2=8 and 3=10.
           Bit 0 is set if using 5-pixel operations
           and bit 1 is set if the VRAMs are interleaved horizontally.
      2-3  VRTCFG.  VRAM banks.
           If using 256KBit banks 0=2 banks and 1=4banks.
           If using 1MBit banks 1=1 Bank, 2=2 banks and 3=4 banks.
        4  BUFSWP. Used to select planes when in Pseudo 8-plane mode.
           If set buffer 1 (upper 4 planes) is selected.
           If clear buffer 0 (lower 4 planes) is selected.
     5-11  Reserved(0)
Note: See note above on reading BEE8h.

BEE8h index 08h W(W):  Fixed Pattern Low Register (PATTERN_L).
bit   0-4  Mask low is used to select the mix on a pixel by pixel basis.
           If MIXSEL=01 then test pattern registers are used to select
           ForeGround or background mix. Mask Low applies to even numbered
           nuggets (0 is leftmost on the screen).
           A 0 selects BACKMIX and a 1 selects FOREMIX.
           Bit 4 is pixel 0 and bit 0 is pixel 4 (if in 5PN mode).
     5-11  Reserved(0)
Note: See note above on reading BEE8h.

BEE8h index 09h W(W):  Fixed Pattern High Register (PATTERN_H).
bit   0-4  Mask low is used to select the mix on a pixel by pixel basis.
           If MIXSEL=01 then test pattern registers are used to select
           ForeGround or background mix. Mask High applies to odd numbered
           nuggets (0 is leftmost on the screen).
           A 0 selects BACKMIX and a 1 selects FOREMIX.
           Bit 4 is pixel 0 and bit 0 is pixel 4 (if in 5PN mode).
     5-11  Reserved(0)
Note: See note above on reading BEE8h.

BEE8h index 0Ah W(W):  Pixel Control Register (PIX_CNTL).
BIT     0  Intra-Nugget Alignment (INA5PN).
           If set BitBlt data in the internal data buffer is aligned on
           Modulos 5 basis rather than Modulos 4.
      1-2  PLANEMODE.
             0  Normal Operation
             1  Indeterminate
             2  Fill area using RD_MASK as boundary mask.
                Does not fill second edge of boundary;
                Plane Mask is a mixture of RD_MASK and WRT_MASK.
             3  Fill area using WRT_MASK as boundary mask.
                Does fill second edge of boundary;
                Plane Mask is WRT_MASK (although RD_MASK must be
                non-zero for correct operation).
      3-5  Color Comparison operation (COLCMPOP).
           Determines the comparison performed on each pixel.
             0  False  (always write DST)
             1  true   (never write DST)
             2  DST >= COLOR_CMP
             3  DST <  COLOR_CMP
             4  DST <> COLOR_CMP
             5  DST =  COLOR_CMP
             6  DST <= COLOR_CMP
             7  DST >  COLOR_CMP
      6-7  Mix Select (MIXSEL).
             0  FOREMIX is always used.
             1  PATTERN_L,PATTERN_H select mix.
             2  Data from PIX_TRANS selects the mix (1=FOREMIX).
             3  SRC selects mix (used for transparency during BITBLT).
     8-11  Reserved(0)
Note: See note above on reading BEE8h.

E2E8h W(R/W):  Pixel Data Transfer Register (PIX_TRANS)
bit  0-15  Data can be read from or written to the display buffer.
           In through plane mode (PLANAR=0), bits 0-7 and 8-15 map onto
           bit planes 0-7 of an individual pixel.
           In across plane mode (PLANAR=1) bits 0-4 and 8-12 map onto pixels
           0-4 within a nugget (1 bit per pixel).
Note: The original IBM 8514/A should always be accessed with 16bit read/writes
Note: The original IBM 8514/A can also access this register at A2E8h and A6E8h
      during drawing commands.