eval5500.c

boot loader示范程序

/*
 * ***********************************************************************
 *
 * Copyright (c) SGS-Thomson Microelectronics Limited 1997
 *
 * Description  : 5500 Flash ROM programming software
 *
 * $Revision: 1 $
 * $History: eval5500.c $
 *
 * *****************  Version 1  *****************
 * User: Onyettr      Date: 10/29/98   Time: 11:40a
 * Created in $/5500-FlashBurner/burner
 * ***********************************************************************
 */
#include "flashprg.h"
#include "stdlib.h"


#define         PIO0_OUT       0x2000A000      /* PIO 0 output reg         */
#define         PIO0_C0         0x2000A020      /* PIO 0 C0 reg             */
#define         PIO0_C1         0x2000A030      /* PIO 0 C1 reg             */
#define         PIO0_C2         0x2000A040      /* PIO 0 C2 reg             */

/* =============================FlashROM block defines========================= */



/********************************AMD define*******************************************/
#define 	AMD_ID				0x0001		
#define		AMD_AM29F800		0x22da

#define 	STATUS_ERROR		0x00
#define 	STATUS_READY		0x01
#define 	STATUS_ERSUSP		0x02
#define 	STATUS_TIMEOUT		0x03
#define 	STATUS_BUSY			0x04

/********************************INTEL define*******************************************/
#define 	INTEL_ID			0x0089		
#define		INTEL_28F800TL		0x889c
#define     INTEL_28F004BX_TL   0x7878
#define     INTEL_28F004BX_BL   0x7979  
#define		INTEL_28F800C3_T	0x88c0
#define		INTEL_28F160C3_T	0x88c2				
#define  	ERASE_SETUP    		0x0020               /* erase_setup command          */
#define  	ERASE_CONFIRM  		0x00d0               /* erase_confirm command        */
#define  	ERASE_SUSPEND  		0x00b0               /* erase_suspend command        */
#define  	ERASE_RESUME   		0x00d0               /* erase_confirm command        */
#define  	PROGRAM_SETUP  		0x0040               /* program_setup command        */
#define  	CLEAR_SREG     		0x0050               /* clear status_reg command     */
#define  	READ_SREG      		0x0070               /* read status_reg command      */
#define  	READ_IDENT     		0x0090               /* read flash_rom ident command */
#define  	READ_ARRAY     		0x00ff               /* read flash_rom_array command */
#define  	BIT7_STATUS    		0x0080               /* condition P/E success        */
#define  	BIT6_STATUS    		0x0040               /* condition P/E success        */
#define  	BIT5_STATUS    		0x0020               /* condition P/E success        */
#define  	BIT4_STATUS    		0x0010               /* condition P/E success        */
#define  	BIT3_STATUS  		0x0008               /* condition P/E success        */
#define  	ALLBITS1       		0x00ff

#define 	ADT_CONTROL_PORTF0 0xc0f00000


/********************************SST define*******************************************/
#define 	SST_ID				0xBFBF		
#define		SST_28SF040			0x0404
#define 	ROW_SIZE            256             /* Must be 256 bytes for 28SF040  */


/********************************ST define*******************************************/
#define 	ST_ID				0x2020		
#define		ST_M28F411			0xf6f6
#define		ST_M28F410			0xf2f2
#define 	ST_M28F211			0xe4e4

/***RpG***/
/***********************************MX-IC de'f**************************************/
#define MXIC_ID			0x00c2
#define MX29LV160AT		0x22c4

unsigned int mfr_id;
unsigned int dev_id;


typedef enum{
	BOOTBLK,
	PARAMBLK1,
	PARAMBLK2,
	PARAMBLK3,
	PARAMBLK4,
	PARAMBLK5,
	PARAMBLK6,
	PARAMBLK7,
	MAINBLK1,
	MAINBLK2,
	MAINBLK3,
	MAINBLK4,
	MAINBLK5,
	MAINBLK6,
	MAINBLK7,
	MAINBLK8,
	MAINBLK9,
	MAINBLK10,
	MAINBLK11,
	MAINBLK12,
	MAINBLK13,
	MAINBLK14,
	MAINBLK15,
	MAINBLK16,
	MAINBLK17,
	MAINBLK18,
	MAINBLK19,
	MAINBLK20,
	MAINBLK21,
	MAINBLK22,
	MAINBLK23,
	MAINBLK24,
	MAINBLK25,
	MAINBLK26,
	MAINBLK27,
	MAINBLK28,
	MAINBLK29,
	MAINBLK30,
	MAINBLK31
} flashblock;


#define 	MAXSECTORS          39

struct flashinfo {
	 char *manufacture_name;
	 char *device_name;         /* "", etc. */
	 int num_sector;          /* # of sectors */
	 int start_address;
 struct {
	 unsigned int base;           /* offset from beginning of device */
	 }sec[MAXSECTORS];  /* per-sector info */
};

struct flashinfo *meminfo;
	
struct flashinfo used_flash[8]= {
	{ "AMD","AM29F800",24,0,{0x7E000,0x7D000,0x7C000, 0,0,0,0,0,0x78000,0x70000,0x68000,0x60000,0x58000,0x50000,
						0x48000,0x40000,0x38000,0x30000,0x28000,0x20000,0x18000,0x10000,0x08000,0x0000,
						0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},
	{ "INTEL","28F800TL",16,0,{0xFC000,0xFA000,0xF8000, 0,0,0,0,0,0xE0000,0xC0000,0xA0000,0x80000,0x60000,0x40000,0x20000,0x00000,0,0,0,0,0,0,0,0,
								0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},                
	{ "INTEL","28F004BX_TL",12,0,{0x7E000,0x7D000,0x7c000, 0,0,0,0,0,0x70000,0x60000,0x50000,0x40000,0,0,0,0,0,0,0,0,0,0,0,0,
								0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},             
	{ "SST","28SF040",0,0,{0,0,0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},                   
	{ "ST","M28F411",12,0,{0x1f0000,0x1e8000,0x1e0000, 0,0,0,0,0,0x1c0000,0x100000,0x080000,0x000000,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},                     
	{ "ST","M28F410",12,0,{0x1f0000,0x1e8000,0x1e0000, 0,0,0,0,0,0x1c0000,0x100000,0x080000,0x000000,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},                     
	{ "INTEL","28F800C3",23,0,{0x7E000,0x7D000,0x7c000,0x7b000,0x7a000,0x79000,0x78000,0x70000,0x68000,0x60000,0x58000,
							   0x50000,0x48000,0x40000,0x38000,0x30000,0x28000,0x20000,0x18000,0x10000,0x08000,0x00000, 
							   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}},             
	{ "INTEL","28F800C3",39,0,{0xFE000,0xFD000,0xFC000,0xFB000,0xFA000,0xF9000,0xF8000,0xF0000,0xE8000,0xE0000,0xD8000,
							   0xD0000,0xC8000,0xC0000,0xB8000,0xB0000,0xA8000,0xA0000,0x98000,0x90000,0x88000,0x80000,
							   0x78000,0x70000,0x68000,0x60000,0x58000,0x50000,0x48000,0x40000,0x38000,0x30000,0x28000,
							   0x20000,0x18000,0x10000,0x08000,0x00000,0}}             
};                                         

#define MEMBLOCK(x)  	(meminfo->start_address | meminfo->sec[x].base)

unsigned short int flash_status(unsigned short int *fp);
void Check_Toggle_Ready (volatile unsigned short int *Dst);
void ram_task_delay(int time);
void mxFlashReset(void);

//ram task delay time = 1 micro sec 
void ram_task_delay(int time)
{
	long i;
	for(i=0; i<time; i++) {
  /* --- Suspend DMA to audio CD fifo and wait 1 micro second @50MHz--- */
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	  __asm{ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0; ldc 0;}
	}
	return;
}

/***********************************************************
Function 	: mxFlashReset
Description : reset to read state
Input 		: address - not used, compatiable with other 
			  flash only
Output		: none
Return 		: none
Status		: Done
***********************************************************/
void mxFlashReset(void)//RpG
{
	unsigned short int          *ptr_to_b;

       ptr_to_b  = (unsigned short int *)(START_ADDR_2M | 0x00000000); /* set up address to be C000:0000h  */

  	/****mxFlashPreCommand****/
  	ptr_to_b[0x555] = 0xaa;
	ptr_to_b[0x2AA] = 0x55;

  	/*reset command*/
  	ptr_to_b[0x555] = 0xf0;
	return;
}

int FlashCheck(void) {
	
  	unsigned short int          *ptr_to_b, OriginalByte;              /* block_pointer def'n                  */

	int ReturnStatus;
	
/*************************INTEL Flash  ID check*****************************************************/

	ReturnStatus = 0;
	                     /* reset error value for return         */

	ptr_to_b = (unsigned short int *)(0x7FF00000 | 0x00000000);
	OriginalByte = *ptr_to_b;                   /* save the original memory contents    */		

	*ptr_to_b = 0x0090;               /* write read_ident command             */

	mfr_id = *ptr_to_b & 0xffff;                   /* read mfr_id                          */

	ptr_to_b = (unsigned short int *)(0x7FF00000 | 0x00000002);                /* address A0=1  */

	dev_id = *ptr_to_b;

	printf("\n 1 Manufacture ID[%x], Device ID [%x] ",mfr_id,dev_id);
	if ((mfr_id == INTEL_ID) && (dev_id == INTEL_28F800TL)){
		meminfo = &used_flash[1];	
		meminfo->start_address = 0x7ff00000;
		ReturnStatus = 0;
		return 0;
	}
	else if ((mfr_id == INTEL_ID) && (dev_id ==INTEL_28F004BX_TL)){
		meminfo = &used_flash[2];	
		meminfo->start_address = 0x7ff00000;
		ReturnStatus = 0;
		return 0;		
	}
	else if ((mfr_id == INTEL_ID) && (dev_id ==INTEL_28F004BX_BL)){
		meminfo->start_address = 0x7ff00000;		
		ReturnStatus = 0;
		return 0;		
	}
	else if ((mfr_id == INTEL_ID) && (dev_id == INTEL_28F800C3_T)){
		meminfo = &used_flash[6];		
		meminfo->start_address = 0x7ff00000;
		ReturnStatus = 0;
		return 0;		
	}	
	else{
		ptr_to_b = (unsigned short int *)(0x7FE00000 | 0x00000000);
		OriginalByte = *ptr_to_b;                   /* save the original memory contents    */		
	
		*ptr_to_b = 0x0090;               /* write read_ident command             */
	
		mfr_id = *ptr_to_b & 0xffff;                   /* read mfr_id                          */
	
		ptr_to_b = (unsigned short int *)(0x7FE00000 | 0x00000002);                /* address A0=1  */
	
		dev_id = *ptr_to_b;

		printf("\n 2 Manufacture ID[%x], Device ID [%x] ",mfr_id,dev_id);
		if ((mfr_id == INTEL_ID) && (dev_id == INTEL_28F160C3_T)){
			meminfo = &used_flash[7];	
			meminfo->start_address = 0x7fe00000;
			ReturnStatus = 0;
			return 0;			
		}
		else 
			ReturnStatus = -1;		
	}

	if (ReturnStatus ==-1){
		*ptr_to_b = OriginalByte;    
	}


/***************************************************************************************************/	

/*************************AMD Flash  ID check*****************************************************/

	if(ReturnStatus == -1){

		ReturnStatus = 0;

		ptr_to_b  = (unsigned short int *)(0x7FF00000 | 0x00000000);
	    OriginalByte = *ptr_to_b;                   /* save the original memory contents    */
	
		ptr_to_b[0] = 0xF0;                  /* reset tje 28SF040 chip first                */
		
		ptr_to_b[0x555] = 0xAA;
		ptr_to_b[0x2AA] = 0x55;
		ptr_to_b[0x555] = 0x90;		
	
		
		ptr_to_b = (unsigned short int *)(0x7FF00000 | 0x00000000);			
	
		mfr_id = *ptr_to_b;                   /* read mfr_id                          */
	
		ptr_to_b[0] = 0xF0;               
		
		ptr_to_b[0x555] = 0xAA;
		ptr_to_b[0x2AA] = 0x55;
		ptr_to_b[0x555] = 0x90;		
	
		ptr_to_b = (unsigned short int *)(0x7FF00000 | 0x00000002);			
	
		dev_id = *ptr_to_b;  

		printf("\n 3 Manufacture ID[0x%x], Device ID [0x%x] ",mfr_id,dev_id);
			
		*ptr_to_b = 0xF0;                 
		
		if ((mfr_id == AMD_ID) && (dev_id == AMD_AM29F800)){
			meminfo = &used_flash[0];	
			meminfo->start_address = 0x7ff00000;			
			ReturnStatus = 0;
			return 0;			
		}
		else
			ReturnStatus = -1;