📄 cstartup.lst
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126 00000054 88E09FE5 ldr r14, =AT91C_BASE_AIC
127 00000058 00019EE5 ldr r0 , [r14, #AIC_IVR]
128 0000005C 00E18EE5 str r14, [r14, #AIC_IVR]
129 00000060
130 00000060 ;- Enable Interrupt and Switch in Supervisor
Mode
131 00000060 13F021E3 msr CPSR_c, #ARM_MODE_SVC
132 00000064
133 00000064 ;- Save scratch/used registers and LR in User
Stack
134 00000064 0E502DE9 stmfd sp!, { r1-r3, r12, r14}
135 00000068
136 00000068 ;----------------------------------------------
137 00000068 ;- Branch to the routine pointed by the
AIC_IVR
138 00000068 ;----------------------------------------------
139 00000068 0FE0A0E1 mov r14, pc
140 0000006C 10FF2FE1 bx r0
141 00000070
142 00000070 ;----------------------------------------------
143 00000070 ;- Manage Exception Exit
144 00000070 ;----------------------------------------------
145 00000070 ;- Restore scratch/used registers and LR from
User Stack
146 00000070 0E50BDE8 ldmia sp!, { r1-r3, r12, r14}
147 00000074
148 00000074 ;- Disable Interrupt and switch back in IRQ
mode
149 00000074 92F021E3 msr CPSR_c, #I_BIT | ARM_MODE_IRQ
150 00000078
151 00000078 ;- Mark the End of Interrupt on the AIC
152 00000078 64E09FE5 ldr r14, =AT91C_BASE_AIC
153 0000007C 30E18EE5 str r14, [r14, #AIC_EOICR]
154 00000080
155 00000080 ;- Restore SPSR_irq and r0 from IRQ stack
156 00000080 0140BDE8 ldmia sp!, {r0,r14}
157 00000084 0EF06FE1 msr SPSR_cxsf, r14
158 00000088
159 00000088 ;- Restore adjusted LR_irq from IRQ stack
directly in the PC
160 00000088 0080FDE8 ldmia sp!, {pc}^
161 0000008C
162 0000008C
163 0000008C
164 0000008C InitReset:
165 0000008C
166 0000008C ;-----------------------------------------------
-------------------------------
167 0000008C ;- Low level Init is performed in a C function:
AT91F_LowLevelInit
168 0000008C ;- Init Stack Pointer to a valid memory area
before calling AT91F_LowLevelInit
169 0000008C ;-----------------------------------------------
-------------------------------
170 0000008C
171 0000008C ;- Retrieve end of RAM address
172 0000008C __iramend EQU SFB(INTRAMEND_REMAP) ;-
Segment begin
173 0000008C
174 00000000 EXTERN AT91F_LowLevelInit
175 0000008C 54D09FE5 ldr r13,=__iramend ;-
Temporary stack in internal RAM
for Low Level Init execution
176 00000090 54009FE5 ldr r0,=AT91F_LowLevelInit
177 00000094 0FE0A0E1 mov lr, pc
178 00000098 10FF2FE1 bx r0 ;-
Branch
on C
functio
n (with
interwo
rking)
179 0000009C
180 0000009C ;-----------------------------------------------
-------------------------------
181 0000009C ;- Top of Stack Definition
182 0000009C ;-----------------------------------------------
-------------------------------
183 0000009C ;- Interrupt and Supervisor Stack are located at
the top of internal memory in
184 0000009C ;- order to speed the exception handling context
saving and restoring.
185 0000009C ;- ARM_MODE_SVC (Application, C) Stack is
located at the top of the external memory.
186 0000009C ;-----------------------------------------------
-------------------------------
187 0000009C
188 00000060 IRQ_STACK_SIZE EQU (3*8*4) ; 3
words to be saved per interrupt priority
level
189 00000011 ARM_MODE_FIQ EQU 0x11
190 00000012 ARM_MODE_IRQ EQU 0x12
191 00000013 ARM_MODE_SVC EQU 0x13
192 00000080 I_BIT EQU 0x80
193 00000040 F_BIT EQU 0x40
194 0000009C
195 0000009C ;-----------------------------------------------
-------------------------------
196 0000009C ;- Setup the stack for each mode
197 0000009C ;-----------------------------------------------
-------------------------------
198 0000009C 44009FE5 ldr r0, =__iramend
199 000000A0
200 000000A0 ;- Set up Fast Interrupt Mode and set FIQ Mode
Stack
201 000000A0 D1F021E3 msr CPSR_c, #ARM_MODE_FIQ |
I_BIT | F_BIT
202 000000A4 ;- Init the FIQ register
203 000000A4 38809FE5 ldr r8, =AT91C_BASE_AIC
204 000000A8
205 000000A8 ;- Set up Interrupt Mode and set IRQ Mode
Stack
206 000000A8 D2F021E3 msr CPSR_c, #ARM_MODE_IRQ | I_BIT |
F_BIT
207 000000AC 00D0A0E1 mov r13, r0 ; Init
stack IRQ
208 000000B0 600040E2 sub r0, r0, #IRQ_STACK_SIZE
209 000000B4
210 000000B4 ;- Enable interrupt & Set up Supervisor Mode and
set Supervisor Mode Stack
211 000000B4 13F021E3 msr CPSR_c, #ARM_MODE_SVC
212 000000B8 00D0A0E1 mov r13, r0
213 000000BC
214 000000BC ;-----------------------------------------------
-------------------------------
215 000000BC ; Initialize segments.
216 000000BC ;-----------------------------------------------
-------------------------------
217 000000BC ; __segment_init is assumed to use
218 000000BC ; instruction set and to be reachable by BL from
the ICODE segment
219 000000BC ; (it is safest to link them in segment
ICODE).
220 000000BC ;-----------------------------------------------
-------------------------------
221 00000000 EXTERN __segment_init
222 000000BC 2C009FE5 ldr r0,=__segment_init
223 000000C0 0FE0A0E1 mov lr, pc
224 000000C4 10FF2FE1 bx r0
225 000000C8
226 000000C8 ;-----------------------------------------------
-------------------------------
227 000000C8 ;- Branch on C code Main function (with
interworking)
228 000000C8 ;-----------------------------------------------
-------------------------------
229 00000000 EXTERN main
230 00000000 PUBLIC __main
231 000000C8 ?jump_to_main:
232 000000C8 24E09FE5 ldr lr,=?call_exit
233 000000CC 24009FE5 ldr r0,=main
234 000000D0 __main:
235 000000D0 10FF2FE1 bx r0
236 000000D4
237 000000D4 ;-----------------------------------------------
-------------------------------
238 000000D4 ;- Loop for ever
239 000000D4 ;-----------------------------------------------
-------------------------------
240 000000D4 ;- End of application. Normally, never
occur.
241 000000D4 ;- Could jump on Software Reset ( B 0x0
).
242 000000D4 ;-----------------------------------------------
-------------------------------
243 000000D4 ?call_exit:
244 000000D4 End
245 000000D4 FEFFFFEA b End
246 000000D8
247 000000D8 ;-----------------------------------------------
-------------------------------
248 000000D8 ;- Exception Vectors
249 000000D8 ;-----------------------------------------------
-------------------------------
250 00000000 PUBLIC AT91F_Default_FIQ_handler
251 00000000 PUBLIC AT91F_Default_IRQ_handler
252 00000000 PUBLIC AT91F_Spurious_handler
253 000000D8
254 000000D8 CODE32 ; Always ARM mode after
exeption
255 000000D8
256 000000D8 AT91F_Default_FIQ_handler
257 000000D8 FEFFFFEA b AT91F_Default_FIQ_handler
258 000000DC
259 000000DC AT91F_Default_IRQ_handler
260 000000DC FEFFFFEA b AT91F_Default_IRQ_handler
261 000000E0
262 000000E0 AT91F_Spurious_handler
263 000000E0 FEFFFFEA b AT91F_Spurious_handler
264 000000E4
265 000000E4 ENDMOD ;- Terminates the assembly of
the current module
265.1 000000E4 TABLE
265.2 000000E4 00F0FFFF Reference on line 126,152,203
265.3 000000E8 ........ Reference on line 175,198
265.4 000000EC ........ Reference on line 176
265.5 000000F0 ........ Reference on line 222
265.6 000000F4 ........ Reference on line 232
265.7 000000F8 ........ Reference on line 233
265 000000FC ENDMOD ;- Terminates the assembly of
the current module
##############################
# CRC:2AF5 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 252 #
##############################
##############################
# CRC:2AF5 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 252 #
##############################
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