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📁 AMI 主板的BIOS源码
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// PBlockAddress
!if "$(A_CPU_PBLK)" != ""
                0x$(A_CPU_PBLK),
// PBlockLength hardwired to 6 byte
                0x06
!else
                0,
                0
!endif
	){}
!endif
        }                       // end CPU scope

// Value to be set in SLP_TYP register
	Name(\_S0, Package(4){$(A_S0),0,0,0})	// working state on this chip set
!if "$(A_S1)" != ""
	Name(\_S1, Package(4){$(A_S1),0,0,0})	// Power on suspend with CPU context maintained.
!endif
!if "$(A_S2)" != ""
	Name(\_S2, Package(4){$(A_S2),0,0,0})	// Power on suspend with CPU context lost.
!endif
!if "$(A_S3)" != ""
	Name(\_S3, Package(4){$(A_S3),0,0,0})	// Power on suspend with CPU context lost.
!endif
!if "$(A_S4)" != ""
	Name(\_S4, Package(4){$(A_S4),0,0,0})	// Suspend to disk + Soft Off
!endif
	Name(\_S5, Package(4){$(A_S5),0,0,0})	// Soft Off

!if $(A_START_UP_OEM)
// OEM start-up code. Will be called once while OS booting
	Include("$(ACPI_ASL_PATH)cust_stp.oem")
!endif

// MCTH(Str1, Str2) - Compare Str1 and Str2.
        Method(MCTH, 2)
        {
//                    Returns One if Str1 <> Str2
//                    Returns Zero if Str1 == Str2
//1. If Length str1 < Str2 - Return (Err)

            If(LLess(Sizeof(Arg0), Sizeof(Arg1)))
		{
                    Return(0)
            }

//2. Convert str1 & str2 into buffer with length of str2

    // Local0 contains length of string + NULL.
    //
            Add(Sizeof(Arg0), 1, Local0)

            Name(BUF0, Buffer(Local0) {})
            Name(BUF1, Buffer(Local0) {})
            Store(Arg0, BUF0)
            Store(Arg1, BUF1)

            While(Local0)
            {
                Decrement(Local0)
                If(LEqual(Derefof(Index(BUF0, Local0)), Derefof(Index(BUF1, Local0))))
                { }
                Else
                { Return(Zero) }
            }
            Return(One)         // Str1 & Str2 are match
        }
//-----------------------------------------------------------------------
// System Bus scope
//-----------------------------------------------------------------------
Scope(\_SB){

	Name(APIC, 0)			// 0-PIC mode
					// 1-APIC mode
        Method(_PIC, 1)
        {
		Store(Arg0, APIC)
        }
//-----------------------------------------------------------------------
// PCI ROOT (NORTH) BRIDGE
//-----------------------------------------------------------------------
        Device(PCI0) {                          // Start of Root PCI Bus

                Name(_HID, EISAID("PNP0A03"))   // PnP ID for PCI Bus

                Name(_ADR, 0x0000)              // Root Bus is Bus # 0

                Name(_BBN, 0)                   // PCI 0 Bus device address

                Name(CRS,                       //

                ResourceTemplate()
                {
// Tag 0 Bus Number Resources
        WORDBusNumber(
                ResourceProducer,               // bit 0 of general flags 1
		MinFixed,			// Range fixed
		MaxFixed,			// Range fixed
		PosDecode,			// Positive Decode
		0x00,				// Granularity
		0x00,				// Min
		0xff,				// Max
		0x00,				// Translation
                0x0100                          // Range Length = Max-Min+1
		)

// Tag 1 Consumed Resources

	IO(Decode16, 0xCF8, 0xCF8, 1, 8)

// Tag 2 Consumed-&-Produced Resources(I/O Window 1)
// all I/O below CF8

	WORDIO(
		ResourceProducer,		// bit 0 of general flags 0
		MinFixed,			// Range fixed
		MaxFixed,			// Range fixed
		PosDecode,			// Positive Decode
		EntireRange,
		0x00,				// Granularity A = 0x0
		0x00,				// Min
                0x0CF7,                         // Max
		0x00,				// Translation
                0x0CF8                          // Range Length
		)

// Tag 3 Consumed-&-Produced Resources(I/O Window 2)
// all I/O above CFF

	WORDIO(
		ResourceProducer,		// bit 0 of general flags 0
		MinFixed,			// Range is not fixed
		MaxFixed,			// Range is not fixed
		PosDecode,			// Positive Decode
		EntireRange,
		0x00,				// Granularity
		0x0D00,				// Min
		0xffff,				// Max
		0x00,				// Translation
		0xf300				// Range Length
		)

// Tag 4 Consumed-&-Produced Resources(Memory Window 1)
// Descriptor for video RAM behind ISA bus

	DWORDMemory(
		ResourceProducer,		// bit 0 of general flags 0
		PosDecode,
		MinFixed,			// Range is not fixed
		MaxFixed,			// Range is not fixed
		Cacheable,
		ReadWrite,
		0x0,				// Granularity
		0x0a0000,			// Min
		0x0bffff,			// Max
		0x00,				// Translation
		0x020000			// Range Length
		)

// Tag 5 Consumed-&-Produced Resources(Memory Window 2)
// for device ROMs for ISA plugins devices
// OEM specific

	DWORDMemory(
		ResourceProducer,		// bit 0 of general flags 0
		PosDecode,
		MinFixed,			// Range is not fixed
		MaxFixed,			// Range is not fixed
		Cacheable,
		ReadWrite,
		0x0,				// Granularity
		0x0cb000,			// Min
		0x0dffff,			// Max
		0x00,				// Translation
		0x015000			// Range Length
		)

// Tag 6 Consumed-&-Produced Resources(Memory Window 3)

	DWORDMemory(
		ResourceProducer,		// bit 0 of general flags 0
		PosDecode,
		MinFixed,			// Range is not fixed
		MaxFixed,			// Range is not fixed
		Cacheable,
		ReadWrite,
                0x0,                            // Granularity
                0x020000000,                    // Min 512M (calculated dinamically)
		0xffdfffff,			// Max 4Gb-2Mb
		0x00,				// Translation
		0xDFE00000,			// Range Length
						// (4G-2M)-TOM (calculated dinamically)
		,
		,
		MEM6				// Name declaration for this descriptor
		)

!ifdef MPS_SUPPORT
! if $(MPS_SUPPORT)
// Memory hole for APIC access
// Tag 7 Consumed-&-Produced Resources(Memory Window 4)
	DWORDMemory(
                ResourceProducer,              // bit 0 of general flags 0
		PosDecode,
                MinFixed,                      // Range is not fixed
                MaxFixed,                      // Range is not fixed
		Cacheable,
		ReadWrite,
                0x0,                            // Granularity
                0xfee01000,                     // Min (Local APIC + 0x1000)
                0xffdfffff,                     // Max 4Gb-2Mb (hardwired)
                0x00,                           // Translation
                0xfff000,                       // Range Length (hardwired)
                                                // (4G-2M) - APIC
		)
! endif
!endif
	}
	)					// end of CRS


// PCI North bridge specific code
	Include("$(ACPI_ASL_PATH)$(A_NRTH_BRG_PATH).asl")

                Name(FLAG, 1)                   // PCI Bus access Flag
                                                // Reset flag if test NT 5.0
                    Name(OSFL, 1)               // Curernt OS name 1 - Win 98
                                                //                 0 - NT 5.0
                Method(_INI, 0)
                {
! if $(A_START_UP_OEM)
// Run OEM start up code
				\INI()
! endif
! if "$(A_OEMIO_PATH_SUPERIO)" != ""
// Detect SuperIO devices present onboard
                        \_SB.PCI0.SBRG.IODT()
! endif
!if "$(A_OEMIO_PATH_AUDIO)" != ""
// Detect Audio devices present onboard
                        \_SB.PCI0.SBRG.AUDT()
!endif
// Detect currently running OS
                If(MCTH(\_OS, "Microsoft Windows"))     // Is the running OS - Win98?
                        { }
                        Else                            // It is not Win 98 (it's NT 5.0)
                        {
				Store(0, OSFL)
				}
	}

                Method(_REG, 2)                         // is PCI Config space accessible as OpRegion?
                                                        // _REG to update FLAG status
                {
                        If(LEqual(Arg0, 0x2))
                        {
					  Store(Arg1, FLAG)
                        }
                }

                Method(_CRS, 0)                     // PCI 0 Bus resources
                {

				CreateDwordField(CRS, \_SB.PCI0.MEM6._MIN, TMEM)        // Top of memory
				CreateDwordField(CRS, \_SB.PCI0.MEM6._LEN, TLEN)        // 4G-TOM
                                                        // MDET Control Method
                                                        // returns available system memory
                                Store(MDET(), TMEM)     // MDET defined in a \_SB.PCI0 scope

!ifdef MPS_SUPPORT
! if $(MPS_SUPPORT)
// PCI available memory has a hole for Local/IO APIC access
// IO APIC address hirdwired to 0xfec0000
                                Subtract(0xfec00000, TMEM, TLEN)// IO APIC-TOM
! else
                                Subtract(0xffe00000, TMEM, TLEN)// Local(4G - 2M)-TOM
! endif
!endif

!	if  !$(A_THERMAL) && ("$(A_FAN_PATH)" != "")
				If(OSFL){}                      // If NT 5.0-Turn FAN On
				Else
				{
					  \GFAN._ON()
				}
!	endif
				Return(CRS)
                }                                       // end PCI _CRS
//-----------------------------------------------------------------------
// 	PCI IRQ ROUTING TABLE (PRT)
//-----------------------------------------------------------------------
!if $(A_PCI_IRQ_ROUTE_STANDARD)
! ifdef MPS_SUPPORT
!  if $(MPS_SUPPORT)
                Method(_PRT)
                {
                         If(APIC)
                         {
                                 Return(PIC0)
                         }
                         Else
                                {
                                 Return(PIC1)
                                }
                }                                       // end PCI0 _PRT
                Name(PIC0, Package() {                  // Table applies in APIC mode
//-----------------------------------------------------------------------
!if $(A_S_IRQ_FIXED)
		$(A_S_APIC_IRQ_TABLE)
!endif
!  if "$(A_PCI_SLOT1)" != ""
// Slot 1
		Package(){0x$(A_PCI_SLOT1)ffff, 0, 0, 0x$(A_PCI_INTA_APIC)},
		Package(){0x$(A_PCI_SLOT1)ffff, 1, 0, 0x$(A_PCI_INTB_APIC)},
		Package(){0x$(A_PCI_SLOT1)ffff, 2, 0, 0x$(A_PCI_INTC_APIC)},
		Package(){0x$(A_PCI_SLOT1)ffff, 3, 0, 0x$(A_PCI_INTD_APIC)},
!  endif
!  if "$(A_PCI_SLOT2)" != ""
// Slot 2
		Package(){0x$(A_PCI_SLOT2)ffff, 0, 0, 0x$(A_PCI_INTB_APIC)},
		Package(){0x$(A_PCI_SLOT2)ffff, 1, 0, 0x$(A_PCI_INTC_APIC)},
		Package(){0x$(A_PCI_SLOT2)ffff, 2, 0, 0x$(A_PCI_INTD_APIC)},
		Package(){0x$(A_PCI_SLOT2)ffff, 3, 0, 0x$(A_PCI_INTA_APIC)},
!  endif
!  if "$(A_PCI_SLOT3)" != ""
// Slot 3
		Package(){0x$(A_PCI_SLOT3)ffff, 0, 0, 0x$(A_PCI_INTC_APIC)},
		Package(){0x$(A_PCI_SLOT3)ffff, 1, 0, 0x$(A_PCI_INTD_APIC)},
		Package(){0x$(A_PCI_SLOT3)ffff, 2, 0, 0x$(A_PCI_INTA_APIC)},
		Package(){0x$(A_PCI_SLOT3)ffff, 3, 0, 0x$(A_PCI_INTB_APIC)},
!  endif
!  if "$(A_PCI_SLOT4)" != ""
// Slot 4
		Package(){0x$(A_PCI_SLOT4)ffff, 0, 0, 0x$(A_PCI_INTD_APIC)},
		Package(){0x$(A_PCI_SLOT4)ffff, 1, 0, 0x$(A_PCI_INTA_APIC)},
		Package(){0x$(A_PCI_SLOT4)ffff, 2, 0, 0x$(A_PCI_INTB_APIC)},
		Package(){0x$(A_PCI_SLOT4)ffff, 3, 0, 0x$(A_PCI_INTC_APIC)},
!  endif
!  if "$(A_PCI_SLOT5)" != ""
// Slot 5
		Package(){0x$(A_PCI_SLOT5)ffff, 0, 0, 0x$(A_PCI_INTA_APIC)},
		Package(){0x$(A_PCI_SLOT5)ffff, 1, 0, 0x$(A_PCI_INTB_APIC)},
		Package(){0x$(A_PCI_SLOT5)ffff, 2, 0, 0x$(A_PCI_INTC_APIC)},
		Package(){0x$(A_PCI_SLOT5)ffff, 3, 0, 0x$(A_PCI_INTD_APIC)},
!  endif
!  if "$(A_PCI_SLOT6)" != ""
// Slot 6
		Package(){0x$(A_PCI_SLOT6)ffff, 0, 0, 0x$(A_PCI_INTA_APIC)},
		Package(){0x$(A_PCI_SLOT6)ffff, 1, 0, 0x$(A_PCI_INTB_APIC)},
		Package(){0x$(A_PCI_SLOT6)ffff, 2, 0, 0x$(A_PCI_INTC_APIC)},
		Package(){0x$(A_PCI_SLOT6)ffff, 3, 0, 0x$(A_PCI_INTD_APIC)},
!  endif
!  if "$(A_PCI_DEV1_IRQA)" != ""
// Device 1, IRQA
		Package(){0x$(A_PCI_DEV1_IRQA:.=), 0, 0x$(A_PCI_INTA_APIC)},
!  endif
!  if "$(A_PCI_DEV1_IRQB)" != ""
// Device 1, IRQB
		Package(){0x$(A_PCI_DEV1_IRQB:.=), 0, 0x$(A_PCI_INTB_APIC)},
!  endif
!  if "$(A_PCI_DEV1_IRQC)" != ""
// Device 1, IRQC
		Package(){0x$(A_PCI_DEV1_IRQC:.=), 0, 0x$(A_PCI_INTC_APIC)},
!  endif
!  if "$(A_PCI_DEV1_IRQD)" != ""
// Device 1, IRQD
		Package(){0x$(A_PCI_DEV1_IRQD:.=), 0, 0x$(A_PCI_INTD_APIC)},
!  endif
!  if "$(A_PCI_DEV2_IRQA)" != ""
// Device 2, IRQA
		Package(){0x$(A_PCI_DEV2_IRQA:.=), 0, 0x$(A_PCI_INTA_APIC)},
!  endif
!  if "$(A_PCI_DEV2_IRQB)" != ""
// Device 2, IRQB
		Package(){0x$(A_PCI_DEV2_IRQB:.=), 0, 0x$(A_PCI_INTB_APIC)},
!  endif
!  if "$(A_PCI_DEV2_IRQC)" != ""
// Device 2, IRQC
		Package(){0x$(A_PCI_DEV2_IRQC:.=), 0, 0x$(A_PCI_INTC_APIC)},
!  endif
!  if "$(A_PCI_DEV2_IRQD)" != ""
// Device 2, IRQD
		Package(){0x$(A_PCI_DEV2_IRQD:.=), 0, 0x$(A_PCI_INTD_APIC)},
!  endif
!  if "$(A_PCI_DEV3_IRQA)" != ""
// Device 3, IRQA
		Package(){0x$(A_PCI_DEV3_IRQA:.=), 0, 0x$(A_PCI_INTA_APIC)},
!  endif
!  if "$(A_PCI_DEV3_IRQB)" != ""
// Device 3, IRQB
		Package(){0x$(A_PCI_DEV3_IRQB:.=), 0, 0x$(A_PCI_INTB_APIC)},
!  endif
!  if "$(A_PCI_DEV3_IRQC)" != ""
// Device 3, IRQC
		Package(){0x$(A_PCI_DEV3_IRQC:.=), 0, 0x$(A_PCI_INTC_APIC)},
!  endif
!  if "$(A_PCI_DEV3_IRQD)" != ""
// Device 3, IRQD
		Package(){0x$(A_PCI_DEV3_IRQD:.=), 0, 0x$(A_PCI_INTD_APIC)},
!  endif
!  if "$(A_PCI_DEV4_IRQA)" != ""
// Device 4, IRQA
		Package(){0x$(A_PCI_DEV4_IRQA:.=), 0, 0x$(A_PCI_INTA_APIC)},
!  endif
!  if "$(A_PCI_DEV4_IRQB)" != ""
// Device 4, IRQB
		Package(){0x$(A_PCI_DEV4_IRQB:.=), 0, 0x$(A_PCI_INTB_APIC)},
!  endif
!  if "$(A_PCI_DEV4_IRQC)" != ""
// Device 4, IRQC
		Package(){0x$(A_PCI_DEV4_IRQC:.=), 0, 0x$(A_PCI_INTC_APIC)},
!  endif
!  if "$(A_PCI_DEV4_IRQD)" != ""
// Device 4, IRQD
		Package(){0x$(A_PCI_DEV4_IRQD:.=), 0, 0x$(A_PCI_INTD_APIC)},
!  endif
//-----------------------------------------------------------------------
		} )
                Name(PIC1, Package(){           // Table applies in PIC mode
!  else
                Name(_PRT, Package() {          // Table applies in PIC mode
!  endif
! else
                Name(_PRT, Package() {          // Table applies in PIC mode
! endif
//-----------------------------------------------------------------------

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