📄 oempost.asm
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page ,132
title OEM POST HOOKS
;-----------------------------------------------------------------------;
; This file is derived from POST.ASM and NPOST.ASM files. ;
; ======================== NOTE === NOTE === NOTE ===================== ;
; If the routine name in this file starts with "OEM_", then this routine;
; is called from the corresponding generic chipset hook (in POST.ASM or ;
; NPOST.ASM file). For example, OEM_DO_MEMORY_SIZE routine is called ;
; from DO_MEMORY_SIZE hook in POST.ASM file. ;
; ======================== NOTE === NOTE === NOTE ===================== ;
; If the routine name in this file does not start with "OEM_", then this;
; routine is called directly from Core file. For example, BEFORE_VECTOR ;
; is called from core file RM.ASM. ;
;-----------------------------------------------------------------------;
; NOTE: Do not destroy EBP,FS,GS,SS,DS,ES unless otherwise specified. ;
;-----------------------------------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;** **;
;** (C)Copyright 1985-1996, American Megatrends Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F, Northbelt Parkway, Norcross, **;
;** **;
;** Georgia - 30071, USA. Phone-(770)-246-8600. **;
;** **;
;*****************************************************************;
;*****************************************************************;
;---------------------------------------;
include mbiosmac.mac
include mbiosequ.equ
include cf.equ
include setupequ.ext
include makeflag.equ
;---------------------------------------;
include rt.equ
include pci.equ
include escd.equ
include dim.equ
include dim.dat
include sis530.equ
;---------------------------------------;
extrn check_cmos_data:near
extrn check_cmos_8e:near
extrn disable_l1_cache:near
extrn enable_l1_cache:near
extrn cmos_data_in_x:near
extrn cmos_data_out_x:near
extrn get_cmos_item:near
extrn read_sio_byte:near
extrn write_sio_byte:near
extrn read_bri_byte:near
extrn write_bri_byte:near
extrn read_pci_byte:near
extrn write_pci_byte:near
;---------------------------------------;
cgroup group _text
_text segment word public 'CODE'
assume cs:cgroup
.486p
;---------------------------------------;
public _OEMPOST_STARTS
_OEMPOST_STARTS label byte ; marks start of module
;-----------------------------------------------------------------------;
; THE HOOKS ARE IN ORDER OF EXECUTION ;
;-----------------------------------------------------------------------;
; INIT_AFTER_KB_BAT ;
;-----------------------------------------------------------------------;
; check_point : 0E ;
; This routine can be used if any special work involved after BAT command
; to 8042 keyboard controller is successful in RM.ASM. The special work ;
; can be many things. e.g. auto-sensing of external keyboard & mouse ;
; mostly used in laptop, etc. ;
; input: ;
; DS 0000H ;
; ES 0000H ;
; stack available ;
; register usage -- can destroy any register except BP, DS, ES ;
;-----------------------------------------------------------------------;
init_after_kb_bat proc near
if MKF_KB_PS2_CONNECTOR_SWAP
extrn auto_detect_kb_ms:near
call auto_detect_kb_ms
endif
ret
init_after_kb_bat endp
;-----------------------------------------------------------------------;
; OEM_DETECT_L2_CACHE ;
;-----------------------------------------------------------------------;
; check_point : 13 ;
; This routine is called from CP_INIT (POST.ASM) after chipset register ;
; initialization and L2 cache sizing is done. ;
; This routine can be used to override the result of L2 cache sizing ;
; and testing done in CP_INIT. For example, if OEM motherboard always ;
; has fixed L2 cache (e.g. 512K, as is the case with most Notebooks), ;
; then L2 cache sizing code can be renoved (which will create some space;
; for some other thing) and L2 cache registers can be programmed with ;
; fixed L2 cache size. Of course L2 cache testing must be done in either;
; case. ;
; Note : Another way is not to do the L2 cache sizing and testing in ;
; POST.ASM. Do the L2 cache sizing/testing here according to the ;
; requirement. In that case, the deafult code here must do the ;
; L2 cache sizing and testing. And then the deafult code can be ;
; modified according to OEM requirement. ;
; input : ;
; DS 0000H ;
; ES 0000H ;
; stack available ;
; output: ;
; BL bit-0 = 0 cache is bad ;
; 1 cache is good ;
; bit7-1= MUST BE returned as 0 ;
; register usage -- can destroy any register except EBP,DS,ES,FS,GS ;
; Note: 1. this routine is called from at the end of CP_INIT in POST.ASM;
; 2. this routine should do cache sizing and testing. Use the ;
; routines GO_TO_FLAT_MODE_STACK and COMEBACK_FROM_FLAT_MODE_STACK;
; for going to and coming back from flat mode. ;
; 3. if the board has fixed cache size, then do not do the cache ;
; sizing (this is the case in almost all Notebooks, it will save ;
; a lot of space), do only the testing. ;
;-----------------------------------------------------------------------;
public oem_detect_l2_cache
oem_detect_l2_cache:
pushf ; Save Interrupt Flag
call open_extend_cmos
;; Calculate checksum
sub dx,dx
mov cx,6
mov ah,90h
@@:
mov al,ah
call cmos_data_in_x
or al,al
jz @f
add dl,al
adc dh,0
inc ah
loop @b
@@:
cmp ah,90h ; first byte is zero?
jz keypass_disable
mov ax,08e8fh
call cmos_data_in_x
xchg al,ah
call cmos_data_in_x
cmp ax,dx
jnz keypass_disable
;; Load CMOS Password to Keyboard
mov al,0a5h ; set keyboard pass
extrn write_key_board_command:near
call write_key_board_command
mov ah,90h
mov cx,06h
load_cmos_to_key:
mov al,ah
call cmos_data_in_x
inc ah
or al,al
jz save_in_key_over
extrn write_key_board_data:near
call write_key_board_data
loop load_cmos_to_key
save_in_key_over:
xor al,al
call write_key_board_data
call close_extend_cmos
call open_apc_cmos
mov ax,8383h ; APC Register 03h
call cmos_data_in_x
test al,80h ; Power Lost?
jz normal_path
and al,not 80h ; Disabled Power Button
xchg ah,al
call cmos_data_out_x
mov ax,8585h ; APC Register 05h
call cmos_data_in_x
or al,040h ; Enabled Keyboard Password
xchg ah,al
call cmos_data_out_x
call close_apc_cmos
mov al,34h ; Power Off
mov dx,MKF_PM_BASE_ADDRESS+5
out dx,al
jmp short $
keypass_disable:
call close_extend_cmos
; call open_apc_cmos
; mov ax,8383h ; APC Register 03h
; call cmos_data_in_x
; or al,80h ; Enable Power Button
; xchg al,ah
; call cmos_data_out_x
normal_path:
call close_apc_cmos
popf ; Restore Interrupt Flag
;; for system Fan
mov dx,MKF_LM78_BASE_ADDRESS
mov al,47h
out dx,al
jmp short $+2
inc dx
in al,dx
jmp short $+2
or al,030h
jmp short $+2
out dx,al
ret
row2bankconvert label byte
db 0,1,2,3 ; DIMM 0
db 4,5,6,7 ; DIMM 1
db 8,9,10,11 ; DIMM 2
write_smbus_reg proc near
;; Input:
;; AH = SMBus Register Index
;; AL = Write Value
;; Modified: None ;
push dx
mov dx,MKF_PM_BASE_ADDRESS+38h
xchg al,ah
out dx,al
jcxz short $+2
jcxz short $+2
inc dx
xchg al,ah
out dx,al
pop dx
ret
write_smbus_reg endp
;-----------------------------------------------------------------------;
; BEFORE_VECTOR ;
;-----------------------------------------------------------------------;
; check_point : 24 ;
; This routine ia called from RM.ASM and can be used for any init before;
; interrupt vector table is initialised by BIOS after base 64k memory ;
; test is passed. ;
; input : ;
; SS 0030H ;
; DS 0040H ;
; ES 0000H ;
; stack available ;
; register usage : can destroy any register except EBP,DS,ES,FS,GS ;
;-----------------------------------------------------------------------;
extrn cpu_freq:word
extrn cpu_freq_x100:word
extrn cpu_clock :near
extrn CatProcPRating :near
extrn rt_cmos_byte:byte
public before_vector
before_vector:
cmp cgroup:word ptr cpu_freq,0ffffh
jnz bv_00 ; cpu clock already executed
IF MKF_BUP6
call p6_cpu_clock ; find P6 CPU clock
ELSE
call cpu_clock ; find CPU clock
bv_01:
ENDIF
; AX = CPU clock in MHZ, BX = CPU Clock x 100 in MHz
mov cgroup:cpu_freq,ax
mov cgroup:cpu_freq_x100,bx
bv_00:
IFE MKF_BUP6
; prepare string for display P-Rating needed for CYRIX and AMD.
; this routine must be here before "RET"
call CatProcPRating
endif
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