📄 gpmcpu.inc
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Subttl. Include file for GREEN PC support CPU code...GPMCPU.INC
;-----------------------------------------------;
; FOLLOWING ROUTINES USED FROM OTHER MODULES ;
;-----------------------------------------------;
;; public cpu_support_entry ;
;; public cpu_smi_exit ;
;; public intel_cpu_smi_entry_ext ;
;; public crx_cpu_smi_entry_ext ;
;; public amd_cpu_smi_entry_ext ;
;; public ibm_cpu_smi_entry_ext ;
;; public ti_cpu_smi_entry_ext ;
;; public umc_cpu_smi_entry_ext ;
;; public intel_amd_plus_relocation ;
;-----------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;** **;
;** (C)Copyright 1985-1996, American Megatrends Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F, Northbelt Parkway, Norcross, **;
;** **;
;** Georgia - 30071, USA. Phone-(770)-246-8600. **;
;** **;
;*****************************************************************;
;*****************************************************************;
;---------------------------------------------------------------;
; THIS MODULE HAS THE CODE FOR ;
; SUPPORTING DIFFERENT CPU ;
;---------------------------------------------------------------;
; CPU_SMI_EXIT ;
;---------------------------------------------------------------;
; Input : NONE ;
; Output: NONE ;
; Register destroyed : ALL ;
;---------------------------------------------------------------;
cpu_smi_exit proc near
call get_cpu_vendor ; returns (si) = cpu vendor no.
shl si,1 ; (si) = cpu vendor # * 2
jmp word ptr cgroup:[si+cgroup:cpu_smi_exit_jmp_table - cgroup:smi_code_begin + orgbase]; execute the function
cpu_smi_exit endp
;---------------------------------------------------------------;
; CPU_SMI_EXIT_JMP_TABLE ;
;---------------------------------------------------------------;
cpu_smi_exit_jmp_table label word
dw cgroup:intel_cpu_smi_exit - cgroup:smi_code_begin + orgbase; INTEL CPU
dw cgroup:crx_cpu_smi_exit - cgroup:smi_code_begin + orgbase ; CYRIX CPU
dw cgroup:amd_cpu_smi_exit - cgroup:smi_code_begin + orgbase ; AMD CPU
dw cgroup:ibm_cpu_smi_exit - cgroup:smi_code_begin + orgbase ; IBM CPU
dw cgroup:ti_cpu_smi_exit - cgroup:smi_code_begin + orgbase ; TI CPU
dw cgroup:umc_cpu_smi_exit - cgroup:smi_code_begin + orgbase ; UMC CPU
;---------------------------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;** **;
;** (C)Copyright 1985-1996, American Megatrends Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F, Northbelt Parkway, Norcross, **;
;** **;
;** Georgia - 30071, USA. Phone-(770)-246-8600. **;
;** **;
;*****************************************************************;
;*****************************************************************;
;---------------------------------------------------------------;
; CPU_SUPPORT_ENTRY ;
;---------------------------------------------------------------;
; Input : (AH) function no. ;
; (DS) PM BIOS data segment ;
; Output: (CY) 00 for no error ;
; (CY) 01 for unsupported func or CPU not specified
; or CPU not supported ;
; Register Destroyed : NONE ;
;---------------------------------------------------------------;
cpu_support_entry proc near
cmp ah,maxm_cpu_func_supported ; valid function no. ?
ja short cpu_support_entry_01 ; no...invalid function
pushad ; save all general purpose registers
movzx si,ah ; (si) = function #
shl si,1 ; (si) = function # * 2
call word ptr cgroup:[si+cgroup:cpu_support_jmp_table - cgroup:smi_code_begin + orgbase]; execute the function
; returns (CY) = 0/1 for no error/error
popad ; restore all general purpose registers
ret
cpu_support_entry_01:
stc ; (CY) = 01 for function not supported
ret
cpu_support_entry endp
;---------------------------------------------------------------;
; CPU_SUPPORT_JMP_TABLE ;
;---------------------------------------------------------------;
cpu_support_jmp_table label word
dw cgroup:cpu_func_00 - cgroup:smi_code_begin + orgbase; FN# = 00 ... get general purpose register
dw cgroup:cpu_func_01 - cgroup:smi_code_begin + orgbase; FN# = 01 ... set general purpose register
;---------------------------------------------------------------;
; CPU_FUNC_00 ;
;---------------------------------------------------------------;
; Input : (DS) PM BIOS data segment ;
; Output: (CY) 00 for no error ;
; (CY) 01 for CPU not specified or CPU not supported
; Register Destroyed : (EAX),(EBX),(ECX),(EDX),(ESI),(EDI);
; NOTE : ;
; Sets up cpu_gen_purpose_reg_entry with on entry smi ;
; values from cpu dump area for (EAX),(EBX),(ECX),(EDX), ;
; (ESI),(EDI),(EBP) & (EFLAGS) ;
;---------------------------------------------------------------;
cpu_func_00 proc near
call get_cpu_vendor ; returns (si) = cpu vendor no.
jc short cpu_func_00_01 ; error...CPU not supported/not specified
shl si,1 ; (si) = cpu vendor # * 2
call word ptr cgroup:[si+cgroup:cpu_func_00_jmp_table - cgroup:smi_code_begin + orgbase ]; execute the function
; returns (CY) = 0/1 for no error/error
cpu_func_00_01:
ret
cpu_func_00 endp
;---------------------------------------------------------------;
; CPU_FUNC_00_JMP_TABLE ;
;---------------------------------------------------------------;
cpu_func_00_jmp_table label word
dw cgroup:intel_func_00 - cgroup:smi_code_begin + orgbase; INTEL CPU
dw cgroup:crx_func_00 - cgroup:smi_code_begin + orgbase ; CYRIX CPU
dw cgroup:amd_func_00 - cgroup:smi_code_begin + orgbase ; AMD CPU
dw cgroup:ibm_func_00 - cgroup:smi_code_begin + orgbase ; IBM CPU
dw cgroup:ti_func_00 - cgroup:smi_code_begin + orgbase ; TI CPU
dw cgroup:umc_func_00 - cgroup:smi_code_begin + orgbase ; UMC CPU
;---------------------------------------------------------------;
; CPU_FUNC_01 ;
;---------------------------------------------------------------;
; Input : (DS) PM BIOS data segment ;
; Output: (CY) 00 for no error ;
; (CY) 01 for CPU not specified or CPU not supported
; Register Destroyed : (EAX),(EBX),(ECX),(EDX),(ESI),(EDI);
; NOTE : ;
; Sets up cpu dump area for (EAX),(EBX),(ECX),(EDX),(ESI),;
; (EDI),(EBP),(EFLAGS) with on exit smi values from cpu_ ;
; gen_purpose_reg_entry ;
;---------------------------------------------------------------;
cpu_func_01 proc near
call get_cpu_vendor ; returns (si) = cpu vendor no.
jc short cpu_func_01_01 ; error...CPU not supported/not specified
shl si,1 ; (si) = cpu vendor # * 2
call word ptr cgroup:[si+cgroup:cpu_func_01_jmp_table - cgroup:smi_code_begin + orgbase]; execute the function
; returns (CY) = 0/1 for no error/error
cpu_func_01_01:
ret
cpu_func_01 endp
;---------------------------------------------------------------;
; CPU_FUNC_01_JMP_TABLE ;
;---------------------------------------------------------------;
cpu_func_01_jmp_table label word
dw cgroup:intel_func_01 - cgroup:smi_code_begin + orgbase; INTEL CPU
dw cgroup:crx_func_01 - cgroup:smi_code_begin + orgbase ; CYRIX CPU
dw cgroup:amd_func_01 - cgroup:smi_code_begin + orgbase ; AMD CPU
dw cgroup:ibm_func_01 - cgroup:smi_code_begin + orgbase ; IBM CPU
dw cgroup:ti_func_01 - cgroup:smi_code_begin + orgbase ; TI CPU
dw cgroup:umc_func_01 - cgroup:smi_code_begin + orgbase ; UMC CPU
;---------------------------------------------------------------;
; GET_CPU_VENDOR ;
;---------------------------------------------------------------;
; Input : (DS) PM BIOS data segment ;
; Output: (CY) 00 for no error ;
; (SI) 00 INTEL CPU ;
; 01 CYRIX CPU ;
; 02 AMD CPU ;
; 03 IBM CPU ;
; 04 TI CPU ;
; 05 UMC CPU ;
; (CY) 01 for CPU not specified or CPU not supported
; Register Destroyed : (SI) ;
;---------------------------------------------------------------;
get_cpu_vendor proc near
bsf si,ds:cpu_vendor ; (si) = cpu manufacturer no.
jz short get_cpu_vendor_01 ; no CPU manufacturer specified
cmp si,no_of_cpu_vendor_supported ; supported CPU vendor ?
jae short get_cpu_vendor_01 ; no...
clc ; (cy) = 00 for no error
ret
get_cpu_vendor_01:
stc ; (cy) = 01 for CPU not specified/not supported
ret
get_cpu_vendor endp
;---------------------------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;** **;
;** (C)Copyright 1985-1996, American Megatrends Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F, Northbelt Parkway, Norcross, **;
;** **;
;** Georgia - 30071, USA. Phone-(770)-246-8600. **;
;** **;
;*****************************************************************;
;*****************************************************************;
;---------------------------------------------------------------;
; THIS PORTION OF CODE SUPPORTS INTEL/AMD PLUS CPU SMI ;
;---------------------------------------------------------------;
; 'S' SERIES, 386SL/486SL ;
; AMD PLUS CPU ;
;---------------------------------------------------------------;
IF INTEL_AMD_PLUS_SUPPORT
intel_cpu_smi_support_start label byte
;---------------------------------------------------------------;
; ACTUAL SMI SUPPORT FOR INTEL/AMD PLUS CPU ;
;---------------------------------------------------------------;
; INTEL_CPU_SMI_ENTRY_EXT ;
;---------------------------------------------------------------;
; Input : NONE ;
; Output: NONE ;
; Register destroyed : ALL ;
;---------------------------------------------------------------;
intel_cpu_smi_entry_ext proc near
cli ; disable interrupts
cld ; clear direction flag
;-----------------------------------------------;
; FOLLOWING PIECE OF CODE IS REQUIRED ;
; IF SMBASE IS RELOCATED, AS CS SELECTOR ;
; WILL STILL CONTAIN 3000H NOT THE ;
; VALUE OF NEW SMBASE ;
;-----------------------------------------------;
mov eax,cs:cpu_dump_smbase_slot_intl; (eax) = absolute SMBASE
shr eax,4 ; (eax) = SMBASE address selector
mov di,(offset cgroup:relocate_jmp_addr_intl - offset cgroup:smi_code_begin + orgbase)
mov cgroup:[di+03],ax ; set segment
jmp short relocate_jmp_addr_intl ; clear prefetch queue
relocate_jmp_addr_intl:
db 0eah ; JMP FAR
dw cgroup:intel_cpu_smi_entry_ext_10 - cgroup:smi_code_begin + orgbase ; offset
dw 0000h ; segment
;-----------------------------------------------;
intel_cpu_smi_entry_ext_10:
;-----------------------------------------------;
; FOLLOWING CODE HAS BEEN ADDED TO TAKE ;
; CARE OF A BUG IN INTEL PENTIUM PRO CPU ;
; (P6). ERRATA #38 (RSM CAN NOT RETURN TO ;
; HALT IN 32BIT OS. ;
;-----------------------------------------------;
test byte ptr cs:cpu_dump_halt_auto_restart_intl,00000001b; previous instruction was 'HLT' ?
jz short intel_cpu_smi_entry_ext_11; no...
and byte ptr cs:cpu_dump_halt_auto_restart_intl,11111110b; do not return to auto halt state
dec dword ptr cs:cpu_dump_eip_intl ; position the EIP to 'HLT' instruction
intel_cpu_smi_entry_ext_11:
;-----------------------------------------------;
mov ax,cs ; (ax) = data segment for SMI execution
mov ds,ax ; set (DS) as PM BIOS data segment
mov es,ax ; set (ES) as PM BIOS data segment
mov ss,ax ; set (SS) as PM BIOS data segment
mov sp,pm_bios_global_stack_ptr ; set (SP) for GLOBAL stack pointer
mov word ptr ds:cpu_vendor,intel_cpu_bit; set for INTEL CPU
call actual_smi_handler ; handle the SMI source
;---------------------------------------------------------------;
; INTEL_CPU_SMI_EXIT ;
;---------------------------------------------------------------;
; Input : NONE ;
; Output: NONE ;
;---------------------------------------------------------------;
intel_cpu_smi_exit proc near
intel_rsm ; RSM (resume from SMI)
intel_cpu_smi_exit endp
intel_cpu_smi_entry_ext endp
;---------------------------------------------------------------;
; INTEL_FUNC_00 ;
;---------------------------------------------------------------;
; Input : (DS) PM BIOS data segment ;
; Output: (CY) 00 for no error ;
; (CY) 01 for CPU not supported ;
; Register destroyed : (EAX),(DI) ;
; NOTE : ;
; Sets up cpu_gen_purpose_reg_entry with on entry smi ;
; values from cpu dump area for (EAX),(EBX),(ECX),(EDX), ;
; (ESI),(EDI),(EBP) & (EFLAGS) ;
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