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📄 i16.asm

📁 AMI 主板的BIOS源码
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;	AL	07h							;
;	DS	0040h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;  register destroyed : AL						;
;-----------------------------------------------------------------------;
	extrn	flash_write_enable:near
ah_e0_7		proc	near
	call	flash_write_enable
	jmp	short ah_e0_exit
ah_e0_7		endp
;-----------------------------------------------------------------------;
;	AH_E0_8..FLASH SELECT						;
;  input :								;
;	AH	function# E0h						;
;	AL	08h							;
;	DS	0040h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;  register destroyed : AL						;
;-----------------------------------------------------------------------;
ah_e0_8		proc	near
	jmp	short ah_e0_exit
ah_e0_8		endp
;-----------------------------------------------------------------------;
;	AH_E0_9..FLASH DE-SELECT					;
;  input :								;
;	AH	function# E0h						;
;	AL	09h							;
;	DS	0040h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;  register destroyed : AL						;
;-----------------------------------------------------------------------;
ah_e0_9		proc	near
	jmp	short ah_e0_exit
ah_e0_9		endp
;-----------------------------------------------------------------------;
;	AH_E0_A..VERIFY ALLOCATED MEMORY				;
;  input :								;
;	AH	function# E0h						;
;	AL	0Ah							;
;	ES	specified memory segment				;
;	BX	memory size in number of paragraphs			;
;	DS	0040h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;  register destroyed : AL						;
;-----------------------------------------------------------------------;
ah_e0_a		proc	near
	jmp	short ah_e0_exit
ah_e0_a		endp
;-----------------------------------------------------------------------;
;	AH_E0_B..SAVE INTERNAL CACHE STATUS				;
;  input :								;
;	AH	function# E0h						;
;	AL	0Bh							;
;	ES:DI	pointer to start of buffer where internal cache		;
;		status will be saved					;
;	DS	0040h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;  register destroyed : AL						;
;-----------------------------------------------------------------------;
ah_e0_b		proc	near
	jmp	short ah_e0_exit
ah_e0_b		endp
;-----------------------------------------------------------------------;
;	AH_E0_C..RESTORE INTERNAL CACHE STATUS				;
;  input :								;
;	AH	function# E0h						;
;	AL	0Ch							;
;	ES:DI	pointer to start of buffer where internal cache		;
;		status will be restored					;
;	DS	0040h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;  register destroyed : AL						;
;-----------------------------------------------------------------------;
ah_e0_c		proc	near
	jmp	short ah_e0_exit
ah_e0_c		endp
;-----------------------------------------------------------------------;
;	AH_E0_FF..GENERATE CPU RESET 					;
;  input :								;
;	AH	function# E0h						;
;	AL	FFh							;
;	DS	0040h							;
;  output:								;
;	NONE								;
;  register destroyed : AX						;
;-----------------------------------------------------------------------;
        extern	StopUsbHostController(dummy_ret):near
	extrn	dummy_ret:near
	extrn	generate_hard_reset:near
ah_e0_ff	proc	near
	mov	ax,0c08eh
	call	cmos_data_out_x		; destroy CMOS checksum
	call	generate_hard_reset
;	call	StopUsbHostController	; disable USB host controller
;	call	empty_8042_input_buffer
;	mov	si,cs:word ptr [0fea8h]
;	mov	dx,cs:[si+0ch]		; DX = power-on CPU ID
;	db	0eah			; JMP FAR F000:FFF0
;	dw	0fff0h
;	dw	0f000h
ah_e0_ff	endp
;-----------------------------------------------------------------------;
;	AH_E0_10..GET FLASH INFO					;
;  input :								;
;	AH	function# E0h						;
;	AL	10h							;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;		BX = Version# in BCD					;
;		CX = #of Flash parts supported by BIOS (1-based)	;
;		DX = Index# of the Flash Part detected by BIOS (0-based);
;  register destroyed : AL BX CX DX					;
;-----------------------------------------------------------------------;
	extrn	flash_support_table:byte
	extrn	no_of_flash_supported:abs
ah_e0_10	proc	near
	mov	bx,0350h		; Ver# 3.50
	mov	cx,no_of_flash_supported
	mov	dx,cgroup:word ptr flash_support_table
	cmp	dx,0ffffh
	jz	ahe010_00		; BIOS did not install any flash part
	xor	dx,dx
ahe010_00:
	jmp	ah_e0_exit
ah_e0_10	endp
;-----------------------------------------------------------------------;
;	AH_E0_11..READ ROM BYTES					;
;  input :								;
;	AH	function# E0h						;
;	AL	11h							;
;		CX = #of bytes to be read				;
;		ES:DI = ptr to read buffer				;
;		DS:SI = ptr to start ROM address			;
;  output:								;
; 	CY 	Error							;
;	NC	Success							;
;		AL = 0FAH 						;
;		CX = #of bytes read					;
;  register destroyed : AL CX						;
;-----------------------------------------------------------------------;
	extrn	e000_read_rom_write_x:near
	extrn	f000_read_rom_write_x:near
	extrn	e000_read_ram_write_rom:near
	extrn	f000_read_ram_write_rom:near
ah_e0_11	proc	near
	pusha
	call	e000_read_rom_write_x
	call	f000_read_rom_write_x
	dec	cx
	rep	movsb
	movsb
	call	e000_read_ram_write_rom
	call	f000_read_ram_write_rom
	popa
	jmp	ah_e0_exit
ah_e0_11	endp
COMMENT ~
;-----------------------------------------------------------------------;
;			CYRIX Cx6x86 M1 Subroutines			;
;-----------------------------------------------------------------------;
;			OFF_CYRIX					;
;  this routine disbales WT_ALLOC bit (bit-0) in CCR5 in M1 cpu.	;
;  input :								;
;	none								;
;  output:								;
;	none								;
;  register destroyed : none						;
;-----------------------------------------------------------------------;
	extern	ReadCCR(dummy_ret):near
	extern	WriteCCR(dummy_ret):near
off_cyrix:
	pusha
	call	check_cyrix
	jnz	oc_00			; Cx6x86 not found
	call	unlock_ccr
	mov	al,0e9h
	call	ReadCCR
	and	ah,0feh			; bit-0 WT_ALLOC = 0
	call	WriteCCR
	call	lock_ccr
oc_00:
	popa
	ret
;-----------------------------------------------------------------------;
;			CHECK_CYRIX_M1					;
;  this routine checks whether current CPU is Cyrix M1.			;
;  input :								;
;	none								;
;  output:								;
;	zr	Cyrix M1						;
;	nz	not Cyrix M1						;
;  register destroyed : none						;
;-----------------------------------------------------------------------;
	extrn	get_processor_info:near
check_cyrix:
	pushad
	call	get_processor_info	; AX = function field
	and	ah,01100000b
	cmp	ah,00100000b		; ZR/NZ = Cx6x86 found/not found
	popad
	ret
;-----------------------------------------------------------------------;
;			UNLOCK_CCR					;
;  this routines locks/unlocks access to CCR registers in Cyrix M1.	;
;  input :								;
;	none								;
;  output:								;
;	zr	Cyrix M1						;
;	nz	not Cyrix M1						;
;  register destroyed : AX BX						;
;-----------------------------------------------------------------------;
unlock_ccr:
	mov	bl,10h
uc_00:
	mov	al,0c3h
	call	ReadCCR
	or	ah,bl
	and	ah,0feh
	call	WriteCCR
	ret
lock_ccr:
	mov	bl,00h
	jmp	short uc_00
~
;-----------------------------------------------------------------------;
;*****************************************************************;
;*****************************************************************;
;**								**;
;**	(C)Copyright 1985-1996, American Megatrends Inc.	**;
;**								**;
;**			All Rights Reserved.			**;
;**								**;
;**		6145-F, Northbelt Parkway, Norcross,		**;
;**								**;
;**		Georgia - 30071, USA. Phone-(770)-246-8600.	**;
;**								**;
;*****************************************************************;
;*****************************************************************;
;-----------------------------------------------------------------------;
IF	MKF_EXTRA_INT16_F0		; INT16 Func F0-F4 supported
	extrn	frequency_low:near
	extrn	frequency_high:near
	extrn	cache_off:near
	extrn	cache_on:near
special_int_16_table		label	word
	dw	offset cgroup:ah_f0	; set cpu speed
	dw	offset cgroup:ah_f1	; return cpu speed
	dw	offset cgroup:ah_invalid; invalid function
	dw	offset cgroup:ah_invalid; invalid function
	dw	offset cgroup:ah_f4	; external cache
special_int_16_table_end	label	word
;-----------------------------------------------------------------------;
;	AH_F0..SET CPU SPEED						;
;  input :								;
;	AH	function# F0h						;
;	AL	speed							;
;		00 low speed						;
;		01 low speed						;
;		02 high speed						;
;		03-FF..RESERVED (no action will taken if used)		;
;	DS	0040h							;
;  output:								;
;	none								;
;  register usage..all registers must be saved except SI		;
;-----------------------------------------------------------------------;
ah_f0	proc	near
	cmp	al,02h			; high speed ?
	ja	ahf0_00			; invalid speed..no action
	mov	si,offset cgroup:frequency_high
	jz	ahf0_01			; high speed
	mov	si,offset cgroup:frequency_low
ahf0_01:
	push	cx
	call	si			; change speed
	pop	cx
	mov	ah,0f0h			; set ah not changed
ahf0_00:
ah_invalid::
	ret
ah_f0	endp
;-----------------------------------------------------------------------;
;	AH_F1..RETURN CPU SPEED						;
;  input :								;
;	AH	function# F1h						;
;	DS	0040h							;
;  output:								;
;	AL	speed							;
;		00 low speed						;
;		01 low speed						;
;		02 high speed						;
;  register usage..all registers must be saved except SI		;
;-----------------------------------------------------------------------;
ah_f1	proc	near
	mov	al,00h			; return code for low speed
	test	ds:byte ptr [0016h],00100000b; bit-5 = 0/1..high/low speed
	jnz	ahf1_00			; low speed
	mov	al,02h			; return code for high speed
ahf1_00:
	ret
ah_f1	endp
;-----------------------------------------------------------------------;
;	AH_F4..CACHE							;
;  input :								;
;	AH	function# F1h						;
;	AL	subfunction#						;
;	DS	0040h							;
;  output:								;
;  register usage..all registers (except return registers) must be	;
;		   saved except SI					;
;-----------------------------------------------------------------------;
ah_f4	proc	near
	or	al,al			; subfunc# 00h ?
	jz	ahf4_00			; yes..
	mov	si,offset cgroup:cache_off
	cmp	al,02h			; subfunc# 02h ?
	ja	ahf4_03			; invalid subfunction
	jz	ahf4_02			; subfunc# 02h
	mov	si,offset cgroup:cache_on
ahf4_02:
	push	cx
	call	si			; enable/disable external cache
	or	ch,ch			; cache operation done ?
	pop	cx
	jmp	short ahf4_03
ahf4_00:
;-----------------------------------------------------------------------;
;  subfunction# 00h..return cache controller status			;
;     Input		: AH = function# F4h				;
;			  AL = 00h					;
;     Output		: 						;
;			  AL = cache controller status			;
;			  CX = cache size in KBytes			;
;			  DH = cache write technology			;
;			  DL = cache type				;
;     Register Destroyed: AX CX DX if successful			;
;			  NONE if status can not be determined		;
;-----------------------------------------------------------------------;
	mov	al,33h			; cmos reg 33h..enable NMI
	call	cmos_data_in_x
	test	al,00000001b		; bit-0 = 0/1..cache bad/good
	jnz	ahf4_06			; external cache present
;  external cache not present..check for internal cache..
	smsw	ax
	or	ah,ah
	mov	al,00h			; return code for cache not present
	jnz	ahf4_05			; 386/286 cpu..no internal cache
ahf4_06:
	mov	al,01h			; return code for cache enabled
	test	ds:byte ptr [0016h],00010000b; bit-4 = 0/1..cache dis/en abled
	jnz	ahf4_05			; cache enabled
	mov	al,02h			; return code for cache disabled
ahf4_05:
	call	get_cache_informn	; get cache information
ahf4_03:
	mov	ah,0f4h			; ah remain same as this routine is called
	ret
ah_f4	endp
;-----------------------------------------------------------------------;
;			GET_CACHE_INFORMN				;
;  this routine returns the external cache information.			;
;  input :								;
;	DS	0040h							;
;  	stack	available						;
;  output:								;
;	cx	cache size						;
;		bit 15	= 0/1..cache size information valid/invalid	;
;		bit 14-0= cache size in KBytes				;
;	dh	cache write technology					;
;		bit 7	= 0/1..cache write technology informn valid/invalid
;		bit 6-1 = RESERVED (set to 0)				;
;		bit 0	= 0..write-through cache			;
;			  1..write-back    cache			;
;	dl	cache type						;
;		bit 7	= 0/1..cache type information valid/invalid	;
;		bit 6-1 = RESERVED (set to 0)				;
;		bit 0	= 0..direct mapped cache			;
;			  1..2-way set associative cache		;
;  register usage -- DO NOT DESTROY ANY REGISTER except CX DX		;
;-----------------------------------------------------------------------;
get_cache_informn	proc	near
;  this routine has to return information of cache size in CX, of cache write
;  technology in DH, of cache type in DL..
;  DO NOT DESTROY ANY REGISTER EXCEPT CX, DX
;  let us take some examples:
;  example 1.	NONE OF THE INFORMATION IS AVAILABLE
;		in this case return value of CX = 8000h, DX = 8080h
;  example 2.	64KB CACHE, CACHE WRITE AND CACHE TYPE INFORMATION IS
;		NOT AVAILABLE
;		in this case return value of CX = 0040h, DX = 8080h
;  example 3.	WRITE-BACK CACHE, CACHE SIZE AND CACHE TYPE INFORMATION IS
;		NOT AVAILABLE
;		in this case return value of CX = 8000h, DX = 0180h
;  example 4.	2-WAY SET ASSOCIATIVE CACHE, CACHE SIZE AND CACHE WRITE
;		INFORMATION IS NOT AVAILABLE
;		in this case return value of CX = 8000h, DX = 8001h
;  example 5.	512KB, WRITE-THROUGH, DIRECT-MAPPED CACHE
;		in this case return value of CX = 0200h, DX = 0000h

	mov	cx,8000h		; cache size informn invalid
	mov	dx,8080h		; cache write, cache type informn invalid
	ret
get_cache_informn	endp
;-----------------------------------------------------------------------;
ENDIF
;-----------------------------------------------------------------------;
	public	_I16_ENDS
_I16_ENDS	label	byte		; marks end of module
;---------------------------------------;
_text	ends
	end

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