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📄 sc6600d_reg.h

📁 展讯SC6600D例程
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#define PWM1_BASE               		(PWM_BASE + 0x0014)
#define PWM2_BASE               		(PWM_BASE + 0x0028)


/*----------Real Timer Counter Register----------*/
//RTC_BASE      0x89000000
#define RTC_SECOND_CNT          		(RTC_BASE + 0x0000)
#define RTC_MINUTE_CNT          		(RTC_BASE + 0x0004)
#define RTC_HOUR_CNT            		(RTC_BASE + 0x0008)
#define RTC_DAY_CNT             		(RTC_BASE + 0x000C)
#define RTC_SECOND_UPDATE       		(RTC_BASE + 0x0010)
#define RTC_MINUTE_UPDATE       		(RTC_BASE + 0x0014)
#define RTC_HOUR_UPDATE         		(RTC_BASE + 0x0018)
#define RTC_DAY_UPDATE          		(RTC_BASE + 0x001C)
#define RTC_SECOND_ALM          		(RTC_BASE + 0x0020)
#define RTC_MINUTE_ALM          		(RTC_BASE + 0x0024)
#define RTC_HOUR_ALM            		(RTC_BASE + 0x0028)
#define RTC_DAY_ALM             		(RTC_BASE + 0x002C)
#define RTC_CTL                 		(RTC_BASE + 0x0030)
#define RTC_STS                 		(RTC_BASE + 0x0034)
#define RTC_ICLR                		(RTC_BASE + 0x0038)
#define RTC_IMSK                		(RTC_BASE + 0x003C)

/*----------Watchdog Timer Counter Register----------*/
//#define WDG_BASE                		0x89003000
#define	WDG_LOAD						(WDG_BASE + 0x0000)
#define	WDG_VALUE						(WDG_BASE + 0x0004)
#define	WDG_CTL							(WDG_BASE + 0x0008)
#define	WDG_INT_CLR						(WDG_BASE + 0x000C)
#define	WDG_INT_RAW_STS					(WDG_BASE + 0x0010)
#define	WDG_INT_MASKED_STS				(WDG_BASE + 0x0014)
#define	WDG_LOCK						(WDG_BASE + 0x0C00)

/*----------GPIO ARM Control Register----------*/
//GPIO_BASE     0x8A000000
#define GPIO_PG0_BASE           		0x8A000000      //GPIO pin15~0 Register Base Address
#define GPIO_PG1_BASE           		0x8A000080      //GPIO pin31~16 Register Base Address
#define GPIO_PG2_BASE           		0x8A000100      //GPIO pin47~32 Register Base Address
#define GPIO_PG3_BASE           		0x8A000180      //GPIO pin49~48 Register Base Address
                               
#define GPIO_DATA               		0x0000    //GPIO data register
#define GPIO_DMSK               		0x0004    //GPIO data mask register, GPIO pin can be read and write if the mask bit is "1"
#define GPIO_DIR                		0x0008    //"1" configure pin to be output"0" configure pin to be input
#define GPIO_IS                 		0x000C    //Interrupt sense register. "1" detect levels, "0" detect edges
#define GPIO_IBE                		0x0010    //Interrupt both edges register. "1" both edges trigger an interrupt, "0" interrupt generation event is controlled by GPIOIEN
#define GPIO_IEV                		0x0014    //Interrupt event register, "1" rising edges or high levels trigger interrupts, "0" falling edges or low levels trigger interrupts.
#define GPIO_IE                 		0x0018    //Interrupt mask register, "1" corresponding pin is not masked. "0" corresponding pin interrupt is masked
#define GPIO_RIS                		0x001C    //Row interrupt status, reflect the status of interrupts trigger conditions detection on pins (prior to masking). "1" interrupt condition met "0" condition not met
#define GPIO_MIS                		0x0020    //Masked interrupt status, "1" Interrupt active "0" interrupt not active
#define GPIO_IC                 		0x0024    //Interrupt clear, "1" clears edge detection interrupt. "0" has no effect.
#define GPIO_ITCR               		0x0040    //Integration test control register, "1" In integration test mode "0" Normal mode
#define GPIO_ITOP1              		0x0044    //Integration test input read/set register. In integration test mode, writes specify the value to be driven on the GPIOMIS lines. Read GPIOMIS checks interrupt active.
#define GPIO_ITOP2              		0x0048    //Integration test input read/set register. In integration test mode, reads return the value of GPIOINTR.

// Caculate the base addr of GPIO
#define GET_GPIO_BASE_ADDR(NUM) \
        (NUM) <= 31 ? (NUM) <= 15 ? 0x8A000000 : 0x8A000080 \
    	: (NUM) <= 47 ? 0x8A000100 : (NUM) <= 63 ? 0x8A000180 : 0xFFFFFFFF
    	
/*----------GEA Interface Control Registers----------*/
//GEA_BASE      0x8D000000
#define GEA_KST_START           		(GEA_BASE + 0x0000)
#define GEA_MODE                		(GEA_BASE + 0x0C80)
#define GEA_WORD_LEN            		(GEA_BASE + 0x0C84)
#define GEA_KC0                 		(GEA_BASE + 0x0C88)
#define GEA_KC1                 		(GEA_BASE + 0x0C8C)
#define GEA_KC2                 		(GEA_BASE + 0x0C90)
#define GEA_KC3                 		(GEA_BASE + 0x0C94)
#define GEA_INPUT0              		(GEA_BASE + 0x0C98)
#define GEA_INPUT1              		(GEA_BASE + 0x0C9C)
#define GEA_START               		(GEA_BASE + 0x0CA0)
#define GEA_POLL                		(GEA_BASE + 0x0CA4)


/*----------Chip Indetity----------*/
#define CHIP_TYPE               0xFFFFFFFC

//*---------the structure that organize a group register----------*/
//External Memory Control.
typedef struct ext_mem_ctl_tag
{
    VOLATILE uint32 ctl0;
    VOLATILE uint32 ctl1;
    VOLATILE uint32 ctl2;
    VOLATILE uint32 ctl3;
    VOLATILE uint32 ctl4;
    VOLATILE uint32 ctl5;
    VOLATILE uint32 ctl6;
    VOLATILE uint32 ctl7;
    VOLATILE uint32 ini;
    VOLATILE uint32 msctl;
}ext_mem_ctl_s;

//IRQ Interrupt Control.
typedef struct int_irq_tag
{
    VOLATILE uint32 sts;
    VOLATILE uint32 raw_sts;
    VOLATILE uint32 en;
    VOLATILE uint32 clr;
    VOLATILE uint32 soft;
}int_irq_s;

typedef struct firq_tag
{
    VOLATILE uint32 sts;
    VOLATILE uint32 raw_sts;
    VOLATILE uint32 en;
    VOLATILE uint32 clr;
}firq_s;

//Timer Control.
typedef struct timer_tag
{
    VOLATILE uint32 load;
    VOLATILE uint32 value;
    VOLATILE uint32 ctl;
    VOLATILE uint32 clr;
}timer_s;

//ARM UART.
typedef struct arm_uart_tag
{
    VOLATILE uint32 txd;
    VOLATILE uint32 rxd;
    VOLATILE uint32 sts0;
    VOLATILE uint32 sts1;
    VOLATILE uint32 ie;
    VOLATILE uint32 iclr;
    VOLATILE uint32 ctl0;
    VOLATILE uint32 ctl1;
    VOLATILE uint32 ctl2;
    VOLATILE uint32 clkd0;
    VOLATILE uint32 clkd1;
    VOLATILE uint32 sts2;
}arm_uart_s;

//SIM Card Interface.
typedef struct sim_tag
{
    VOLATILE uint32 tx;
    VOLATILE uint32 rx;
    VOLATILE uint32 sts0;
    VOLATILE uint32 sts1;
    VOLATILE uint32 ie;
    VOLATILE uint32 iclr;
    VOLATILE uint32 ctl0;
    VOLATILE uint32 ctl1;
    VOLATILE uint32 rx_clkd;
    VOLATILE uint32 she;
    VOLATILE uint32 tgc;
    VOLATILE uint32 wdt;
    VOLATILE uint32 imsk;
    VOLATILE uint32 tx_clkd;
    VOLATILE uint32 wdt1;
}sim_s;

//Real Time Counter.
typedef struct rtc_tag
{
    VOLATILE uint32 sec_cnt;
    VOLATILE uint32 min_cnt;
    VOLATILE uint32 hour_cnt;
    VOLATILE uint32 day_cnt;
    VOLATILE uint32 sec_update;
    VOLATILE uint32 min_update;
    VOLATILE uint32 hour_update;
    VOLATILE uint32 day_update;
    VOLATILE uint32 sec_alm;
    VOLATILE uint32 min_alm;
    VOLATILE uint32 hour_alm;
    VOLATILE uint32 day_alm;
    VOLATILE uint32 ctl;
    VOLATILE uint32 sts;
    VOLATILE uint32 iclr;
    VOLATILE uint32 imsk;   
}rtc_s;

//GPIO ARM Control.
typedef struct gpio_ctl_tag
{
    VOLATILE uint32 data;
    VOLATILE uint32 dmsk;
    VOLATILE uint32 dir;
    VOLATILE uint32 is;
    VOLATILE uint32 ibe;
    VOLATILE uint32 iev;
    VOLATILE uint32 ie;
    VOLATILE uint32 ris;
    VOLATILE uint32 mis;
    VOLATILE uint32 ic;
    VOLATILE uint32 itcr;
    VOLATILE uint32 itop1;
    VOLATILE uint32 itop2;
}gpio_ctl_s;

//LCD Interface Control.
typedef struct lcd_tag
{
    VOLATILE uint32 data;
    VOLATILE uint32 clk;
    VOLATILE uint32 cnt;
    VOLATILE uint32 sts;
    VOLATILE uint32 iclr;   
}lcd_s;

// KEYPAD Interface Control.
typedef struct kpd_tag
{
    VOLATILE uint32    status;
    VOLATILE uint32    ctl;
    VOLATILE uint32    iclr;
    VOLATILE uint32    polarity;
    VOLATILE uint32    div0;
    VOLATILE uint32    div1;
    VOLATILE uint32    masked_int;     
}kpd_s;

typedef struct pwm_tag
{
	VOLATILE uint32     prescale;
	VOLATILE uint32     cnt_duty;
	VOLATILE uint32     tone;
	VOLATILE uint32     pattern_low;
	VOLATILE uint32     pattern_high;
}pwm_s;

// SPI control register filed definitions  
typedef struct
{
	VOLATILE uint32 data;				// data register
	VOLATILE uint32 sts0;				// interrupt status reigster
	VOLATILE uint32 sts1;				// fifo cnt register, bit[5:0] for RX and [13:8] for TX
	VOLATILE uint32 ien;				// interrutp enable register
	VOLATILE uint32 ctl0;				// control register
	VOLATILE uint32 ctl1;				// Receive Data full threshold/Receive Data full threshold
	VOLATILE uint32 ctl2;				// 2-wire mode reigster
	VOLATILE uint32 clkd;				// clock dividor register
	VOLATILE uint32 sts2;				// masked interrupt status register
	VOLATILE uint32 iclr;				// interrupt clear register
	VOLATILE uint32 ctl3;				// transmit data interval 
} SPI_CTL_REG_T;

//I2C control register
typedef struct i2c_tag
{
    VOLATILE uint32 ctl;
    VOLATILE uint32 cmd;
    VOLATILE uint32 div0;
    VOLATILE uint32 div1;
    VOLATILE uint32 rst;
    VOLATILE uint32 cmd_buf;
}I2C_CTL_REG_T;

#define SYSTEM_CURRENT_CLOCK (*((volatile uint32 *)SYS_CNT0) & 0xFFFFFFFF)

#endif  //_SC6600D_REG_H_

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