📄 sc6600d_reg.h
字号:
#define SIMIE_B_RX_PARITY_ERR (1 << 2) //Enable bit for rx_parity_error
#define SIMIE_B_TX_PARITY_ERR (1 << 3) //Enable bit for tx_parity_error
#define SIMIE_B_UNRESP_CARD (1 << 4) //Enable bit for unresp_card
#define SIMIE_B_CARD_IN (1 << 5) //Enable bit for card_in
#define SIMIE_B_CARD_OUT (1 << 6) //Enable bit for card_out
#define SIMIE_B_EARLY_ATR (1 << 7) //Enable bit for early answer to reset
#define SIMIE_B_ACTIVE_DONE (1 << 8) //Enable bit for active done
#define SIMIE_B_RX_TOUT (1 << 9) //Enable bit for rx time out
//The corresponding bit of SIM_ICLR register.
#define SIMICLR_B_RX_FULL (1 << 0) //Int clear bit for rx full int
#define SIMICLR_B_TX_EMPTY (1 << 1) //Int clear bit for tx empty int
#define SIMICLR_B_RX_PARITY_ERR (1 << 2) //Int clear bit for rx_parity_error
#define SIMICLR_B_TX_PARITY_ERR (1 << 3) //Int clear bit for tx_parity_error
#define SIMICLR_B_UNRESP_CARD (1 << 4) //Int clear bit for unresp_card
#define SIMICLR_B_CARD_IN (1 << 5) //Int clear bit for card_in
#define SIMICLR_B_CARD_OUT (1 << 6) //Int clear bit for card_out
#define SIMICLR_B_EARLY_ATR (1 << 7) //Int clear bit for early answer to reset
#define SIMICLR_B_ACTIVE_DONE (1 << 8) //Int clear bit bit for active done
#define SIMICLR_B_RX_TOUT (1 << 9) //Int clear bit bit for rx time out
//The corresponding bit of SIM_CTL0 register.
#define SIMCTL0_B_BIT_CONVENTION (1 << 0) //Bit Convention:0-MSB Transmitted first;1-LSM transmitted first 1
#define SIMCTL0_B_LOGIC_LEVEL (1 << 1) //Logic Level:0-high logic level represet "0";1-high logic level represet "1"
#define SIMCTL0_B_EVEN_PARITY (1 << 2) //0:Even Parity;1:Odd parity
#define SIMCTL0_B_LOOPBACK_MODE (1 << 3) //Transmit data looped back to receive.
#define SIMCTL0_B_RX_FIFO_RST (1 << 4) //Reset the rx fifo
#define SIMCTL0_B_TX_FIFO_RST (1 << 5) //Reset the tx fifo
#define SIMCTL0_B_SIM_RST (1 << 6) //Reset the sim card module
#define SIMCTL0_B_POWER_EN (1 << 7) //Enable the Power supply to sim card
#define SIMCTL0_B_CARD_OUT_LATCHED (1 << 8) //This bit will be 1 if card_out happened.
#define SIMCTL0_B_RX_EN (1 << 9) //Enable the sim rx
#define SIMCTL0_B_TX_EN (1 << 10) //Enable the sim tx
#define SIMCTL0_B_EN_ACTIVE (1 << 11) //Enactive the SIM card
#define SIMCTL0_B_DE_ACTIVE (1 << 12) //Deactive the SIM card
#define SIMCTL0_B_ACT_DEACT_EN (1 << 13) //Enable the active/deactive procedure
#define SIMCTL0_B_AUTO_ACT_DEACT (1 << 14) //Enable the auto start of active/deactive when card_in or card_out happen.
#define SIMCTL0_B_TX_DATA_OUT_LOW (1 << 15) //Force the tx data to low logic level.
//The corresponding bit of SIM_CTL1 register.
//set the rx int mark,that when rx data num in the rx fifo up to the mark
//the sim card will interupt with rx_fifo_full bit of SIM_STS1 set to 1---SIM_CTL1[3:0]
#define SET_RX_INT_MARK(sim_register_map,mark) (((sim_register_map)->ctl1 & 0xfff0) | mark)
//set the tx int mark,that when tx data num in the tx fifo down to the mark
//the sim card will inerupt with tx_fifo_empty bit of SIM_STS1 set to 1---SIM_CTL1[7:4]
#define SET_TX_INT_MARK(sim_register_map,mark) (((sim_register_map)->ctl1 & 0xff0f) | (mark << 4))
//Set the SIM clock mode.SIM clock mode--SIM_CTL1[10:8]
#define SET_CLOCK_MODE(sim_register_map,clock_mode) (((sim_register_map)->ctl1 & 0xf8ff) | (clock_mode << 8))
#define SIMCTL1_B_CLK_ENABLE (1 << 11) //Enable or Disable the SIM clock
#define SIMCTL1_B_CLK_POLARITY (1 << 12) //The logic Level when the SIM clock is Disabled
//set the ad speed ctl,ad speed ctl is the time interval
//between set control register---SIM_CTL1[15:13]
#define SET_AD_SPEED_CTL(sim_register_map,ad_speed_ctl) (((sim_register_map)->ctl1 &3fff) | (ad_speed_ctl << 13))
//The corresponding bit of SIM_SHE register.
//set the RX retransmit time limit---SIM_SHE[3:0]
#define SET_RX_RETRX_LMT(sim_register_map,retransmit_limit) (((sim_register_map)->she & 0xfff0) | retransmit_limit)
//set the TX retransmit time limit---SIM_SHE[7:4]
#define SET_TX_RETRX_LMT(sim_register_map,retransmit_limit) (((sim_register_map)->she & 0xff0f) | (retransmit_limit << 4))
//The corresponding bit of SIM_TGC register
//set the time interval between the tx consecutive byte---SIM_TGC[7:0]
#define SET_GUARD_TIME(sim_register_map,guard_time) (((sim_register_map)->tgc & 0xff00) | guard_time)
//set the time interal between the tx and rx---SIM_TGC[15:8]
#define SET_TURN_AROUND_GUARD_TIME(sim_register_map,turn_around_time) (((sim_register_map)->tgc & 0x00ff) | (trun_around_time << 8))
//the corresponding bit of SIM_WDT register
#define SIMWDT_B_TRIGGER (1 << 0) //Trigger the start of watch dog timmer
#define SIMWDT_B_REPEAT_EN (1 << 1) //Enable the timer repeat mode
//set the watch dog count limit,for example it's in rx,now the rx_int_mark is 8 but there only
//4 byte data to rx,and the rx_full interupt will not happened as soon as rx finish untill the
//watch dog count limit time expired---SIM_WDT[?:2]
#define SET_WATCH_DOG_COUNT_LIMIT(sim_register_map,count_limit) (((sim_register_map->wdt) & 0x0003) | (count_limit << 2))
//The corresponding bit of SIM_IMSK register.
//the status0 that masked with the IE regiseter??
#define SIMIMSK_B_RX_FIFO_FULL (1 << 0) //Masked int bit for rx full int
#define SIMIMSK_B_TX_FIFO_EMPTY (1 << 1) //Masked int bit for tx empty int
#define SIMIMSK_B_RX_PARITY_ERR (1 << 2) //Masked int bit for rx_parity_error
#define SIMIMSK_B_TX_PARITY_ERR (1 << 3) //Masked int bit for tx_parity_error
#define SIMIMSK_B_UNRESP_CARD (1 << 4) //Masked int bit for unresp_card
#define SIMIMSK_B_CARD_IN (1 << 5) //Masked int bit for card_in
#define SIMIMSK_B_CARD_OUT (1 << 6) //Masked int bit for card_out
#define SIMIMSK_B_EARLY_ATR (1 << 7) //Masked int bit for early answer to reset
#define SIMIMSK_B_ACTIVE_DONE (1 << 8) //Masked int bit for active done
//the default register value of SIM register that used to initialize the
//sim register at the drive start,the value may be changed
#define SIM_DEFAULT_STS0 0x0
#define SIM_DEFAULT_STS1 0x0
#define SIM_DEFAULT_IE 0x01fc
#define SIM_DEFAULT_ICLR 0x01ff
#define SIM_DEFAULT_CTL0 0x2003
#define SIM_13M_CTL1 0x0100
#define SIM_39M_CTL1 0x0300
#define SIM_52M_CTL1 0x0300
#define SIM_78M_CTL1 0x0400
#define SIM_DEFAULT_SHE 0x00 //enable the rx and tx retransmit to handle the rx and tx parity error
#define SIM_ENABLED_SHE 0x33 //Rx retransmit limit = 3;Tx retransmit limit = 3
//the tx etu is the same as rx etu
#define SIM_DEFAULT_TGC 0x0505
#define SIM_DEFAULT_WDT 0x802 //Disable the rx time out watch dog
//Enable the rx retransmit watch dog timer
//Watch dog timer limit for rx retransmit watch dog = 0x200
#define SIM_ENABLED_WDT 0x803 //Enable the rx time out watch dog
//Enable the rx retransmit watch dog timer
//Watch dog timer limit for rx retransmit watch dog = 0x200
#define SIM_DEFAULT_IMASKED 0x0
#define SIM_DEFAULT_WDT1 0x800 //Watch dog count limit for rx time out.
//the SIM clock mode
typedef enum sim_clock_mode_tag
{
SIM_CLOCK_DIVIDE_2 = 0x0,
SIM_CLOCK_DIVIDE_4,
SIM_CLOCK_DIVIDE_8,
SIM_CLOCK_DIVIDE_16,
SIM_CLOCK_DIVIDE_32,
SIM_CLOCK_DIVIDE_64,
SIM_CLOCK_DIVIDE_128,
SIM_CLOCK_DIVIDE_256
}sim_clock_mode;
//the sim card fifo buf size
#define SIM_FIFO_BUF_SIZE 16
//The corresponding bit of I2C_CTL register.
#define I2CCTL_INT (1 << 0) //I2c interrupt
#define I2CCTL_ACK (1 << 1) //I2c received ack value
#define I2CCTL_BUSY (1 << 2) //I2c data line value
#define I2CCTL_IE (1 << 3) //I2c interrupt enable
#define I2CCTL_EN (1 << 4) //I2c module enable
#define I2CCTL_CMDBUF_EN (1 << 5) //Enable the cmd buffer mode
#define I2CCTL_CMDBUF_EXEC (1 << 6) //Start to exec the cmd in the cmd buffer
#define I2CCTL_ST_CMDBUF (7 << 7) //The state of I2c cmd buffer state machine.
#define I2CCTL_CMDBUF_WPTR (7 << 7) //I2c command buffer write pointer
//The corresponding bit of I2C_CMD register.
#define I2CCMD_INT_ACK (1 << 0) //I2c interrupt clear bit
#define I2CCMD_TX_ACK (1 << 1) //I2c transmit ack that need to be send
#define I2CCMD_WRITE (1 << 2) //I2c write command
#define I2CCMD_READ (1 << 3) //I2c read command
#define I2CCMD_STOP (1 << 4) //I2c stop command
#define I2CCMD_START (1 << 5) //I2c start command
#define I2CCMD_ACK (1 << 6) //I2c received ack value
#define I2CCMD_BUS (1 << 7) //I2c busy in exec commands
#define I2CCMD_DATA 0xFF00 //I2c data received or data need to be transmitted
//The corresponding bit of KPD_STS register.
#define KPDSTS_KPD (1 << 0) //Keypad interrupt
#define KPDSTS_TOUT (1 << 1) //Time out interrupt
#define KPDSTS_ROW_COUNT (7 << 2) //Row counter
#define KPDSTS_COL_COUNT (7 << 5) //Column counter
//The corresponding bit of KPD_CTL register.
#define KPDCTL_KPD_INT (0x1 << 0) //Keypad interrupt enable
#define KPDCTL_TOUT_INT (0x1 << 1) //Time out interrupt enable
#define KPDCTL_KPD (0x1 << 2) //Keypad enable
#define KPDCTL_READ_ICLR (0x1 << 3) //Write 1 to it, INT will be cleared
//by read the keypad status reg.
#define KPDCTL_ROW (0xF << 4) //Enable bit for rows(Row4~Row7).
#define KPDCTL_COL (0x3 << 8) //Enable bit for cols(Col3~Col4).
// Const value of keypad.
#define KPD_ROW_MIN_NUM 4 //When config keypad type, the value of
#define KPD_ROW_MAX_NUM 8 //row should be one of 4/5/6/7/8.
#define KPD_COL_MIN_NUM 3 //When config keypad type, the value of
#define KPD_COL_MAX_NUM 5 //col should be one of 3/4/5.
//The corresponding bit of KPD_ICLR register.
// Write 1 to this bit will clear the keypad int status bit.
#define KPDICLR_KPD_INT (1 << 0)
// Write 1 to this bit will clear the keypad tout int status bit.
#define KPDICLR_TOUT_INT (1 << 1)
//The corresponding bit of KPD_POLARITY register.
#define KPDPOLARITY_ROW (0x00FF) // Internal row output xor with this
// value to generate row output.
#define KPDPOLARITY_COL (0xFF00) // Column input xor with this value to
// generate the internal column input.
//The corresponding bit of KPD_CLK0, KPD_CLK1 register.
#define KPDCLK0_CLK_DIV0 0xFFFF //Clock dividor [15:0]
#define KPDCLK1_CLK_DIV1 0x003F //Clock dividor [21:16]
#define KPDCLK1_TIME_CNT 0xFFB0 //Time out counter value
//The corresponding bit of KPD_INT_MSK register.
#define KPDINTMSK_KPD 0x003F //Masked_kpd_int
#define KPDINTMSK_TOUT 0xFFB0 //Masked_tout_int
//The corresponding bit of RTC_CTL register.
#define RTCCTL_SEC_IE (1 << 0) //Sec int enable
#define RTCCTL_MIN_IE (1 << 1) //Min int enable
#define RTCCTL_HOUR_IE (1 << 2) //Hour int enable
#define RTCCTL_DAY_IE (1 << 3) //Day int enable
#define RTCCTL_ALARM_IE (1 << 4) //Alarm int enable
#define RTCCTL_HOUR_FMT_SEL_IE (1 << 5) //Hour format select
#define RTCCTL_EN (1 << 6) //Rtc module enable
//The corresponding bit of RTC_STS register.
#define RTCSTS_SEC (1 << 0) //Second int
#define RTCSTS_MIN (1 << 1) //Minute int
#define RTCSTS_HOUR (1 << 2) //Hour int
#define RTCSTS_DAY (1 << 3) //Day int
#define RTCSTS_ALARM (1 << 4) //Alarm int
//The corresponding bit of RTC_ICLR register.
#define RTCICLR_SEC (1 << 0) //Second int is cleared by write 1 to this bit
#define RTCICLR_MIN (1 << 1) //Minute int is cleared by write 1 to this bit
#define RTCICLR_HOUR (1 << 2) //Hour int is cleared by write 1 to this bit
#define RTCICLR_DAY (1 << 3) //Day int is cleared by write 1 to this bit
#define RTCICLR_ALARM (1 << 4) //Alarm int is cleared by write 1 to this bit
//The corresponding bit of RTC_IMSK register.
#define RTCIMSK_SEC (1 << 0) //
#define RTCIMSK_MIN (1 << 1) //
#define RTCIMSK_HOUR (1 << 2) //
#define RTCIMSK_DAY (1 << 3) //
#define RTCIMSK_ALARM (1 << 4) //
//-----------------------------------------------
//Chip Pin Control
//PIN_CTL_BASE 0x8C000000
#define GPIO_UART_KEY_MJTAG_SEL(value) ((*(volatile uint32 *)CPC_GPIO_UART_KEY)=((*(volatile uint32 *)CPC_GPIO_UART_KEY)&0xFFFFF3FF|(value<<10)))
//The corresponding bit of LCD_CNT register.
#define LCDCNT_BM_SERIAL_S8 0
#define LCDCNT_BM_SERIAL_I2C 1
#define LCDCNT_BM_8B_PARALLEL_8080 2
#define LCDCNT_BM_8B_PARALLEL_6800 3
#define LCDCNT_CB_MODE_EN (1 << 4) //if "1", enable MCU buffer mode. In this mode, MCU can continue send 8 commands to LCD.
#define LCDCNT_INF_RST (1 << 5) //lcd interface reset, "1" reset lcd interface, "0" normal mode.
//The corresponding bit of LCD_ICLR register.
#define LCDICLR_INT_PIN 1 //Interrupt pin is high when LCD interface is not busy. MCU can write bit0 of register LCDINTCLR to clear interrupt pin when no data need to be sent. After MCU send new command to LCD, the interrupt pin is automatically set high by LCD interface.
#define LCDICLR_CB_WR_DOWN (1 << 1) //In cb_mode, if MCU send command number smaller than 8, MCU can write this bit to enable LCD interface execute LCD command.
#define LCDICLR_CB_RD_DOWN (1 << 2) //In cb_mode, after LCD interface execute MCU command, if MCU read back data number smaller than 8, MCU can write this bit to enable LCD interface receive new MCU command.
//-----------------------------------------------
//PCM Interface Control Register2
//PCM_BASE 0x8F000000
/*----------memory map address----------*/
//Memory Address Map.
#define EXT_MEM_START 0x00000000 //External Memory (4 CHIP Select).
//#define EXT_MEM_END 0x0FFFFFFF
#define INTER_SHARE_MEM_BEGIN 0x10000000 //Internal Shared Memory.
#define INTER_SHARE_MEM_END 0x1FFFFFFF
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -