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📄 arm_reg.h

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/******************************************************************************
 ** File Name:      arm_reg.h                                                 *
 ** Author:         Xueliang.Wang                                             *
 ** DATE:           26/03/2002                                                *
 ** Copyright:      2002 Spreatrum, Incoporated. All Rights Reserved.         *
 ** Description:    This file definition ARM-IC Registers address.            *
 ******************************************************************************

 ******************************************************************************
 **                        Edit History                                       *
 ** ------------------------------------------------------------------------- *
 ** DATE           NAME             DESCRIPTION                               *
 ** 26/03/2002     Xuelaign.Wang    Create.                                   *
 ******************************************************************************/

#ifndef _ARM_REG_H_
#define _ARM_REG_H_

/**---------------------------------------------------------------------------*
 **                         Dependencies                                      *
 **---------------------------------------------------------------------------*/
#include "sci_types.h"


/**---------------------------------------------------------------------------*
 **                         Compiler Flag                                     *
 **---------------------------------------------------------------------------*/
#ifdef __cplusplus
    extern   "C"
    {
#endif

/*
#ifdef WIN32
#error This file can not be used in WIN32!
#endif
//tony.yao temp removed it. it will add when risa's new sim driver is ok 
*/

//	peripheral register operation.

#define peripheral_reg_or( reg_addr, value )        *(volatile uint32 *)(reg_addr) |= value
#define peripheral_reg_and( reg_addr, value )       *(volatile uint32 *)(reg_addr) &= value
#define peripheral_reg_set( reg_addr, value )       *(volatile uint32 *)(reg_addr)  = value

/*
	Bit define
*/
#define BIT_0               0x00000001
#define BIT_1               0x00000002
#define BIT_2               0x00000004
#define BIT_3               0x00000008
#define BIT_4               0x00000010
#define BIT_5               0x00000020
#define BIT_6               0x00000040
#define BIT_7               0x00000080
#define BIT_8               0x00000100
#define BIT_9               0x00000200
#define BIT_10              0x00000400
#define BIT_11              0x00000800
#define BIT_12              0x00001000
#define BIT_13              0x00002000
#define BIT_14              0x00004000
#define BIT_15              0x00008000
#define BIT_16              0x00010000
#define BIT_17              0x00020000
#define BIT_18              0x00040000
#define BIT_19              0x00080000
#define BIT_20              0x00100000
#define BIT_21              0x00200000
#define BIT_22              0x00400000
#define BIT_23              0x00800000
#define BIT_24              0x01000000
#define BIT_25              0x02000000
#define BIT_26              0x04000000
#define BIT_27              0x08000000
#define BIT_28              0x10000000
#define BIT_29              0x20000000
#define BIT_30              0x40000000 
#define BIT_31              0x80000000

// ARM valid clock.
#define ARM_CLK_13M         13000000
#define ARM_CLK_26M         26000000
#define ARM_CLK_39M         39000000
#define ARM_CLK_52M         52000000
#define ARM_CLK_78M         78000000
#define ARM_CLK_71M         71500000
#define ARM_CLK_104M	   104000000

#define PLL_MN_CLK_P52M				0x1405
#define PLL_MN_CLK_P78M				0x1E05
#define PCTL_CLK_P52M_D52M_A13M     0x0003
#define PCTL_CLK_P52M_D52M_A52M   	0x0000
#define PCTL_CLK_P78M_D39M_A13M   	0x0015
#define PCTL_CLK_P78M_D78M_A13M   	0x0005
#define PCTL_CLK_P78M_D39M_A39M     0x0011

// ChipID number.
#define CHIP_ID_NONE        0
#define CHIP_ID_6600B200    0x6600B200
#define CHIP_ID_6600B300    0x6600B300
#define CHIP_ID_6600B500    0x6600B500
#define CHIP_ID_6600B700    0x660000B6

//Baud Rate. ( CLK = 12.998 MHz )
#define BAUD_1200               0x2A50
#define BAUD_2400               0x1528
#define BAUD_4800               0x0A94
#define BAUD_9600               0x054A
#define BAUD_19200              0x02A5
#define BAUD_38400              0x0152
#define BAUD_57600              0x00E2
#define BAUD_115200             0x0071
#define BAUD_230400             0x0038
#define BAUD_460800             0x001C
#define BAUD_921600             0x000E


//	Jimmy.Jia added for atc.c
#define	ATC_REC_BUF_SIZE		   1200


//	Jimmy.Jia added for diag.c
/*
#define READ_ACC        (1 << 0)
#define WRITE_ACC       (1 << 1)
#define BYTE_ACC        (1 << 2)
#define WORD_ACC        (1 << 3)
#define DWORD_ACC       (1 << 4)


typedef struct
{
    uint32  mem_start;
    uint32  mem_end;
    uint32  acc_condition;
}MEMORY_ACCESS_INFO_T;

*/

#define ATC_MODE          0x01
#define DATA_MODE         0x02
#define MIX_MODE    0x03

#define COM_USER	      0
#define COM_DATA	      0
#define COM_DEBUG	      1

#ifdef __cplusplus
    }
#endif

#endif /* _ARM_REG_H_*/

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