cp15.s

ucos 在 arm9 芯片上的移植

	;movs 	pc, r14
	mov 	pc, r14
;*****************************************************************
;*
;* Function Name
;*    ARM_disableFIQ
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Disable FIQ interrupt for ARM  
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_disableFIQ
ARM_disableFIQ
	stmfd 	r13!, {r0-r2}

	mrs r1, cpsr
	and r2, r1, #0x1F
	cmp r2, #0x11        		; see if currently in FIQ mode
	bne disableFIQ      		; If not in FIQ mode, continue
	ldmfd r13!, {r0-r2}
        bx r14         		

disableFIQ
	orr 	r1, r1, #0x40		; disable FIQ 
	msr 	cpsr_c, r1
	ldmfd 	r13!, {r0-r2}
        ;movs 	pc, r14
	mov 	pc, r14
;*****************************************************************
;*
;* Function Name
;*    ARM_enableFIQ
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Disable FIQ interrupt for ARM  
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_enableFIQ
ARM_enableFIQ
	stmfd 	r13!, {r0-r2}

	mrs 	r1, cpsr
	and 	r2, r1, #0x1F
	cmp 	r2, #0x11       
	bne 	enableFIQ       
	ldmfd 	r13!, {r0-r2}
        bx 	r14          	
                      
enableFIQ
	bic 	r1, r1, #0x40    	; enable FIQ 
	msr 	cpsr_c, r1
	ldmfd 	r13!, {r0-r2}
        ;movs 	pc, r14
	mov 	pc, r14
;*****************************************************************
;*
;* Function Name
;*    ARM_enableICache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Enable I-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_enableICache
ARM_enableICache
	stmfd 	r13!, {r0-r1}
	mrc   	p15, #0, r1, c1, c0, #0
 	mov   	r0,#0x1000
	orr   	r1, r1, r0
	nop
	nop  
	mcr   	p15, #0, r1, c1, c0, #0
	nop
	nop
	ldmfd 	r13!, {r0-r1}
        movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_disableICache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Disable I-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_disableICache
ARM_disableICache
	stmfd 	r13!, {r0-r1}
	mrc   	p15, #0, r1, c1, c0, #0
	mov   	r0,#0x1000
	bic   	r1, r1, r0
	nop
	nop  
	mcr   	p15, #0, r1, c1, c0, #0
	nop
	nop
	ldmfd 	r13!, {r0-r1}
        movs 	pc, r14
;*****************************************************************
;*
;* Function Name
;*    ARM_enableDCache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Enable D-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_enableDCache

	;warning MMU must be enabled and translation table setup before 
	;data cache can be enabled
ARM_enableDCache
	stmfd 	r13!, {r0-r1}
	mrc   	p15, #0, r1, c1, c0, #0
	mov   	r0,#0x0004
	orr   	r1, r1, r0
	nop
	nop  
	mcr   	p15, #0, r1, c1, c0, #0
	nop
	nop
	ldmfd 	r13!, {r0-r1}
        movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_disableDCache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Disable D-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_disableDCache
ARM_disableDCache
	stmfd 	r13!, {r0-r1}
	mrc   	p15, #0, r1, c1, c0, #0
	mov   	r0,#0x0004
	bic   	r1, r1, r0
	nop
	nop  
	mcr   	p15, #0, r1, c1, c0, #0
	nop
	nop
	ldmfd 	r13!, {r0-r1}
	movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_enableMMU
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Enable MMU on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_enableMMU
ARM_enableMMU
	stmfd 	r13!, {r0-r1}
	mrc   	p15, #0, r1, c1, c0, #0
	mov   	r0,#0x0001
	orr   	r1, r1, r0
	nop
	nop  
	mcr   	p15, #0, r1, c1, c0, #0
	nop
	nop
	ldmfd 	r13!, {r0-r1}
	movs 	PC, R14

;*****************************************************************
;*
;* Function Name
;*    ARM_disableMMU
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Disable MMU on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_disableMMU
ARM_disableMMU
	stmfd 	r13!, {r0-r1}
	mrc   	p15, #0, r1, c1, c0, #0
	mov   	r0,#0x0001
	bic   	r1, r1, r0
	nop  	
	nop   	
	mcr   	p15, #0, r1, c1, c0, #0
	nop   	
	nop   	
        ldmfd 	r13!, {r0-r1}
	movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_flushCache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Flush I and D-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_flushCache
ARM_flushCache
	stmfd 	r13!, {r0}
	mov 	r0,#0
	mcr   	p15, #0, r0, c7, c7, #0
	nop
	nop
	ldmfd 	r13!, {r0}
	movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_flushICache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Flush I-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_flushICache
ARM_flushICache
	stmfd 	r13!, {r0}
	mov 	r0,#0
	mcr   	p15, #0, r0, c7, c5, #0
	nop
	nop
	ldmfd 	r13!, {r0}
	movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_flushDCache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Flush D-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_flushDCache
ARM_flushDCache
	stmfd 	r13!, {r0}
	mov 	r0,#0
	mcr   	p15, #0, r0, c7, c6, #0
	nop
	nop
	ldmfd 	r13!, {r0}
	movs 	pc, r14

;*****************************************************************
;*
;* Function Name
;*    ARM_cleanDCache
;* Inputs
;*    None
;* Outputs
;*    None
;* Return Codes
;*    None
;* Description
;*   Clean D-Cache on CP15 for ARM
;* Date:
;*    2008-03-06
;*****************************************************************/
	EXPORT  ARM_cleanDCache
ARM_cleanDCache
	stmfd 	r13!, {r0}
tc_loop
	mrc 	p15, #0, r15, c7, c10, #3
	bne 	tc_loop
	nop
	nop  
	ldmfd 	r13!, {r0}
        movs 	pc, r14

	END