📄 can.h
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#ifndef __CAN__
#define __CAN__
/////////CAN 消息初始化程序////////////////
//////can.h//////////////////
#include "canreg.h"
typedef unsigned char uchar;
typedef unsigned int uint;
typedef unsigned long ulong;
void init_msg_object_TX (char MsgNum,int id)//初始化发送消息体
{ int temp;
SFRPAGE = CAN0_PAGE;
CAN0ADR = IF1CMDMSK; // Point to Command Mask 1
CAN0DAT = 0x00b3; // Set to WRITE, & alter all Msg Obj except ID MASK bits
CAN0ADR = IF1ARB1; // Point to arbitration1 register
CAN0DAT = 0x0000; // Set arbitration1 ID to highest priority
//CAN0DAT = 0xA008; // Autoincrement to Arb2 high byte:发送标识符设置
temp=id<<2;
temp&=0x1fff;
temp|=0xa000;
CAN0DAT=temp;
CAN0DAT = 0x0087; // Msg Cntrl: DLC = 7, remote frame function not enabled,数据字节大小设置
CAN0ADR = IF1CMDRQST; // Point to Command Request reg.
CAN0DAT = MsgNum; // Select Msg Obj passed into function parameter list
// --initiates write to Msg Obj
// 3-6 CAN clock cycles to move IF reg contents to the Msg Obj in CAN RAM.
}
void init_msg_object_RX (char MsgNum,int id)
{
int temp;
int temp1;
SFRPAGE = CAN0_PAGE;
CAN0ADR = IF2CMDMSK; // Point to Command Mask 1
CAN0DAT = 0x00fb; // 必须用f8
// and data bits
CAN0ADR = IF2MSK1;
CAN0DAT = 0x0000; //MSK15~0标识符
// CAN0ADR = IF2MSK2;
temp=id<<2;
temp&=0x1fff;
temp1=temp;
temp1|=0xc000;
CAN0DAT =temp1;
CAN0ADR = IF2ARB1; // Point to arbitration1 register
CAN0DAT = 0x0000; // Set arbitration1 ID to "0"
//CAN0DAT = 0x8000; // Arb2 high byte:Set MsgVal bit, no extended ID,
temp|=0x8000;
CAN0DAT =temp;
CAN0DAT = 0x1487; // Msg Cntrl: set RXIE, remote frame function disabled
CAN0ADR = IF2CMDRQST; // Point to Command Request reg.
CAN0DATL = MsgNum; // Select Msg Obj passed into function parameter list
// --initiates write to Msg Obj
// 3-6 CAN clock cycles to move IF register contents to the Msg Obj in CAN RAM
}
void clear_msg_objects (void) //将所有消息清零
{
uchar i;
SFRPAGE = CAN0_PAGE;
CAN0ADR = IF1CMDMSK;
CAN0DATL = 0xFF;
for (i=1;i<33;i++)
{
CAN0ADR = IF1CMDRQST;
CAN0DATL = i;
}
}
void start_CAN (void)
{
SFRPAGE = CAN0_PAGE;
CAN0CN |= 0x41; // Configuration Change Enable CCE and INIT
CAN0ADR = BITREG ; // Point to Bit Timing register
CAN0DAT = 0x2640; // see above
CAN0ADR = IF1CMDMSK; // Point to Command Mask 1
CAN0DAT = 0x0087; // Config for TX : WRITE to CAN RAM, write data bytes,
// set TXrqst/NewDat, clr IntPnd
// RX-IF2 operation may interrupt TX-IF1 operation
CAN0ADR = IF2CMDMSK; // Point to Command Mask 2
CAN0DATL = 0x1F; // Config for RX : READ CAN RAM, read data bytes,
// clr NewDat and IntPnd
CAN0CN |= 0x06; // Global Int. Enable IE and SIE
CAN0CN &= ~0x41; // Clear CCE and INIT bits, starts CAN state machine
}
#endif
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