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<title>8.5.4 Cycle time definition file </title>
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<h3>
<a name="1205584"> </a><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">8.5.4 Cycle time definition file</font>
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<a name="1205585"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The simulator needs to know instruction cycle times and memory bus widths and access times in order to calculate the number of cycles each instruction takes. The instruction cycle times are the additional cycles taken by an instruction on top of any memory cycles. A set of default values are built into the simulator, which assume normal instruction times and on-chip memory. These default values can be overridden by providing a cycle time definition file.</font>
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<a name="1207449"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">By convention, cycle time definition files have the extension <font size=2 face=Courier><strong>.cdf</strong></font>.</font>
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<h5>
<a name="1207467"> </a><i><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">Generating the default cycle time definition file</font></i>
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<p>
<a name="1205605"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The <font size=2 face=Courier><strong>st20sim</strong></font> command line option <font face="Verdana, Arial, Helvetica, sans-serif"><b>dumpstatdef</b></font> generates a file containing the default cycle times, memory access times and bus widths. This is called a cycle time definition file. The purpose of this file is:</font>
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<ul>
<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1205606"> </a>to see what default values are being used,</font></p>
<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1205607"> </a>to act as a template for editing the file to use as a customized cycle time definition file, as described in the next section.</font></p>
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<p>
<a name="1205608"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">For example:</font>
</p>
<a name="1205609"> </a><font size=2 face=Courier><strong>st20sim -dumpstatdef st20c1.cdf<br></strong></font>
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<a name="1205610"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">This example generates the output file <font size=2 face=Courier><strong>st20c1.cdf</strong></font> containing the cycle times and bus widths of the default memory address ranges.</font>
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<h5>
<a name="1205612"> </a><i><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">Supplying a customized cycle time definition file</font></i>
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<p>
<a name="1205613"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The default cycle time definitions may not be appropriate for generating accurate statistics. In particular, the application needs to use a different memory arrangement, with different address ranges, bus widths and speeds. These details can be supplied in a customized cycle time definition file, using the <font size=2 face=Courier><strong>st20sim</strong></font> option <font size=2 face=Courier><strong>statdef</strong></font>.</font>
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<p>
<a name="1205614"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">In order for the <font face="Verdana, Arial, Helvetica, sans-serif"><b>statdef</b></font> option to have any effect, it must be used in conjunction with the<font size=2 face=Courier><strong> stat</strong></font> option or the application code must contain statistics tags, to enable the generation of cycle time statistics, as described in <a href="st20si17.htm#1205569"><font color="#0000ff" face="Verdana, Arial, Helvetica, sans-serif"><i>Section⌨️ 快捷键说明
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